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Richard Barry 2008-02-10 14:44:30 +00:00
parent 5afe5250e5
commit 93dd04d5dd
7 changed files with 404 additions and 772 deletions
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372
Demo/MB91460_Softune/SRC/MAIN.c
View file

@ -1,372 +0,0 @@
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*------------------------------------------------------------------------
MAIN.C
- description
- See README.TXT for project description and disclaimer.
-------------------------------------------------------------------------*/
/*************************@INCLUDE_START************************/
#include "mb91467d.h"
#include "vectors.h"
#include "FreeRTOS.h"
#include "task.h"
#include "watchdog.h"
/* Demo task priorities. */
#define WTC_TASK_PRIORITY ( tskIDLE_PRIORITY + 5 )
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
#define TASK_UTILITY_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainQUEUE_BLOCK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainDEATH_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainGENERIC_QUEUE_PRIORITY ( tskIDLE_PRIORITY )
/* Baud rate used by the COM test tasks. */
#define mainCOM_TEST_BAUD_RATE ( ( unsigned portLONG ) 19200 )
/* The frequency at which the 'Check' tasks executes. See the comments at the
top of the page. When the system is operating error free the 'Check' task
toggles an LED every three seconds. If an error is discovered in any task the
rate is increased to 500 milliseconds. [in this case the '*' characters on the
LCD represent LED's]*/
#define mainNO_ERROR_CHECK_DELAY ( ( portTickType ) 3000 / portTICK_RATE_MS )
#define mainERROR_CHECK_DELAY ( ( portTickType ) 500 / portTICK_RATE_MS )
/*---------------------------------------------------------------------------*/
#define ledNUMBER_OF_LEDS 8
#define mainCOM_TEST_LED 0x05
#define mainCHECK_TEST_LED 0x07
/*---------------------------------------------------------------------------*/
/*
* The function that implements the Check task. See the comments at the head
* of the page for implementation details.
*/
static void vErrorChecks( void *pvParameters );
/*
* Called by the Check task. Returns pdPASS if all the other tasks are found
* to be operating without error - otherwise returns pdFAIL.
*/
static portSHORT prvCheckOtherTasksAreStillRunning( void );
/*---------------------------------------------------------------------------*/
static unsigned portSHORT sState[ledNUMBER_OF_LEDS] = {pdFALSE};
static unsigned portSHORT sState1[ledNUMBER_OF_LEDS] = {pdFALSE};
/*---------------------------------------------------------------------------
* The below callback function is called from Tick ISR if configUSE_TICK_HOOK
* is configured as 1. This function needs to be uncommented if the crhook.c
* is not used, since the crhook.c has also defined vApplicationTickHook().
*---------------------------------------------------------------------------*/
/*void vApplicationTickHook ( void )
{
#if WATCHDOG == WTC_IN_TICK
Kick_Watchdog();
#endif
}*/
/*---------------------------------------------------------------------------
* The below callback function is called from Delayed ISR if configUSE_IDLE_HOOK
* is configured as 1.
*---------------------------------------------------------------------------*/
void vApplicationIdleHook ( void )
{
#if WATCHDOG == WTC_IN_IDLE
Kick_Watchdog();
#endif
vCoRoutineSchedule();
}
/*---------------------------------------------------------------------------
* Initialize Port 00
*---------------------------------------------------------------------------*/
static void prvInitPort( void )
{
DDR16=0xFF;
DDR25=0xFF;
}
/*---------------------------------------------------------------------------
* Setup the hardware
*---------------------------------------------------------------------------*/
static void prvSetupHardware( void )
{
prvInitPort();
#if WATCHDOG != WTC_NONE
InitWatchdog();
#endif
}
/*********************@FUNCTION_HEADER_START*********************
*@FUNCTION NAME: main() *
* *
*@DESCRIPTION: The main function controls the program flow *
* *
*@PARAMETER: none *
* *
*@RETURN: none *
* *
***********************@FUNCTION_HEADER_END*********************/
void main(void)
{
__set_il(31); /* allow all levels */
InitIrqLevels(); /* init interrupts */
prvSetupHardware();
#if WATCHDOG == WTC_IN_TASK
vStartWatchdogTask( WTC_TASK_PRIORITY );
#endif
/* Start the standard demo application tasks. */
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED - 1 );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartBlockingQueueTasks ( mainQUEUE_BLOCK_PRIORITY );
vStartDynamicPriorityTasks();
vStartMathTasks( tskIDLE_PRIORITY );
vStartFlashCoRoutines(ledNUMBER_OF_LEDS);
vStartHookCoRoutines();
/* Start the 'Check' task which is defined in this file. */
xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
vStartGenericQueueTasks( mainGENERIC_QUEUE_PRIORITY );
vStartQueuePeekTasks();
vTraceListTasks( TASK_UTILITY_PRIORITY );
vCreateBlockTimeTasks();
vCreateSuicidalTasks( mainDEATH_PRIORITY );
vTaskStartScheduler( );
/* Should not reach here */
while (1)
{
__asm(" NOP "); //
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
{
if (uxLED < ledNUMBER_OF_LEDS)
{
vTaskSuspendAll();
/* Toggle the state of the single genuine on board LED. */
if( sState[uxLED])
{
PDR25 |= (1 << uxLED);
}
else
{
PDR25 &= ~(1 << uxLED);
}
sState[uxLED] = !(sState[uxLED]);
xTaskResumeAll();
}
else
{
uxLED -= ledNUMBER_OF_LEDS;
vTaskSuspendAll();
/* Toggle the state of the single genuine on board LED. */
if( sState1[uxLED])
{
PDR16 |= (1 << uxLED);
}
else
{
PDR16 &= ~(1 << uxLED);
}
sState1[uxLED] = !(sState1[uxLED]);
xTaskResumeAll();
}
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
{
/* Set or clear the output [in this case show or hide the '*' character. */
if( uxLED < ledNUMBER_OF_LEDS )
{
vTaskSuspendAll();
{
if( xValue )
{
PDR25 |= (1 << uxLED);
sState[uxLED] = 1;
}
else
{
PDR25 &= ~(1 << uxLED);
sState[uxLED] = 0;
}
}
xTaskResumeAll();
}
else
{
uxLED -= ledNUMBER_OF_LEDS;
vTaskSuspendAll();
{
if( xValue )
{
PDR16 |= (1 << uxLED);
sState1[uxLED] = 1;
}
else
{
PDR16 &= ~(1 << uxLED);
sState1[uxLED] = 0;
}
}
xTaskResumeAll();
}
}
/*-----------------------------------------------------------*/
static void vErrorChecks( void *pvParameters )
{
static volatile unsigned portLONG ulDummyVariable = 3UL;
portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY;
/* Cycle for ever, delaying then checking all the other tasks are still
operating without error. */
for( ;; )
{
/* Wait until it is time to check again. The time we wait here depends
on whether an error has been detected or not. When an error is
detected the time is shortened resulting in a faster LED flash rate. */
vTaskDelay( xDelayPeriod );
/* Perform a bit of 32bit maths to ensure the registers used by the
integer tasks get some exercise outside of the integer tasks
themselves. The result here is not important we are just deliberately
changing registers used by other tasks to ensure that their context
switch is operating as required. - see the demo application
documentation for more info. */
ulDummyVariable *= 3UL;
/* See if the other tasks are all ok. */
if( prvCheckOtherTasksAreStillRunning() != pdPASS )
{
/* An error occurred in one of the tasks so shorten the delay
period - which has the effect of increasing the frequency of the
LED toggle. */
xDelayPeriod = mainERROR_CHECK_DELAY;
}
/* Flash! */
vParTestToggleLED(mainCHECK_TEST_LED);
}
}
/*-----------------------------------------------------------*/
static portSHORT prvCheckOtherTasksAreStillRunning( void )
{
static portSHORT sNoErrorFound = pdTRUE;
/* The demo tasks maintain a count that increments every cycle of the task
provided that the task has never encountered an error. This function
checks the counts maintained by the tasks to ensure they are still being
incremented. A count remaining at the same value between calls therefore
indicates that an error has been detected. Only tasks that do not flash
an LED are checked. */
if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xArePollingQueuesStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xAreComTestTasksStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xAreMathsTaskStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xAreFlashCoRoutinesStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xAreHookCoRoutinesStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xIsCreateTaskStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
if ( xAreQueuePeekTasksStillRunning() != pdTRUE )
{
sNoErrorFound = pdFALSE;
}
return sNoErrorFound;
}
/********************@FUNCTION_DECLARATION_END******************/

10
Demo/MB91460_Softune/SRC/serial/serial.c
View file

@ -74,12 +74,12 @@ xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned
/* Initialize UART asynchronous mode */
BGR02 = configPER_CLOCK_HZ / ulWantedBaud;
SCR02 = 0x17; /* 8N1 */
SMR02 = 0x0d; /* enable SOT3, Reset, normal mode */
SSR02 = 0x02; /* LSB first, enable receive interrupts */
SCR02 = 0x17; /* 8N1 */
SMR02 = 0x0d; /* enable SOT3, Reset, normal mode */
SSR02 = 0x02; /* LSB first, enable receive interrupts */
PFR20_D0 = 1; // enable UART
PFR20_D1 = 1; // enable UART
PFR20_D0 = 1; // enable UART
PFR20_D1 = 1; // enable UART
EPFR20_D1 = 0; // enable UART
}

58
Demo/MB91460_Softune/SRC/utility/taskutility.c
View file

@ -1,7 +1,7 @@
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*------------------------------------------------------------------------
taskutility.C
-
@ -28,36 +28,36 @@ void InitUart5(void)
//Initialize UART asynchronous mode
BGR05 = 1666; // 9600 Baud @ 16MHz
SCR05 = 0x17; // 7N2
SMR05 = 0x0d; // enable SOT3, Reset, normal mode
SSR05 = 0x00; // LSB first
SCR05 = 0x17; // 7N2
SMR05 = 0x0d; // enable SOT3, Reset, normal mode
SSR05 = 0x00; // LSB first
PFR19_D4 = 1; // enable UART
PFR19_D5 = 1; // enable UART
PFR19_D4 = 1; // enable UART
PFR19_D5 = 1; // enable UART
//EPFR19 = 0x00; // enable UART
SSR05_RIE = 1;
}
void Putch5(char ch) /* sends a char */
void Putch5(char ch) /* sends a char */
{
while (SSR05_TDRE == 0); /* wait for transmit buffer empty */
TDR05 = ch; /* put ch into buffer */
while (SSR05_TDRE == 0); /* wait for transmit buffer empty */
TDR05 = ch; /* put ch into buffer */
}
char Getch5(void) /* waits for and returns incomming char */
char Getch5(void) /* waits for and returns incomming char */
{
volatile unsigned ch;
while(SSR05_RDRF == 0); /* wait for data received */
if (SSR05_ORE) /* overrun error */
if (SSR05_ORE) /* overrun error */
{
ch = RDR05; /* reset error flags */
return (char)(-1);
ch = RDR05; /* reset error flags */
return (char)(-1);
}
else
return (RDR05); /* return char */
return (RDR05); /* return char */
}
void Puts5(const char *Name5) /* Puts a String to UART */
@ -65,11 +65,11 @@ void Puts5(const char *Name5) /* Puts a String to UART */
volatile portSHORT i,len;
len = strlen(Name5);
for (i=0; i<strlen(Name5); i++) /* go through string */
for (i=0; i<strlen(Name5); i++) /* go through string */
{
if (Name5[i] == 10)
Putch5(13);
Putch5(Name5[i]); /* send it out */
if (Name5[i] == 10)
Putch5(13);
Putch5(Name5[i]); /* send it out */
}
}
@ -80,9 +80,9 @@ void Puthex5(unsigned long n, unsigned char digits)
div=(4*(digits-1)); /* init shift divisor */
for (i=0;i<digits;i++)
{
digit = ((n >> div)&0xF); /* get hex-digit value */
digit = ((n >> div)&0xF); /* get hex-digit value */
Putch5(digit + ((digit < 0xA) ? '0' : 'A' - 0xA));
div-=4; /* next digit shift */
div-=4; /* next digit shift */
}
}
@ -91,7 +91,7 @@ void Putdec5(unsigned long x, int digits)
portSHORT i;
portCHAR buf[10],sign=1;
if (digits < 0) { /* should be print of zero? */
if (digits < 0) { /* should be print of zero? */
digits *= (-1);
sign =1;
}
@ -102,18 +102,18 @@ void Putdec5(unsigned long x, int digits)
x = x/10;
}
if ( sign )
{
if ( sign )
{
for (i=0; buf[i]=='0'; i++) { /* no print of zero */
if ( i<digits-1)
buf[i] = ' ';
}
}
}
Puts5(buf); /* send string */
}
void vTraceListTasks( unsigned portBASE_TYPE uxPriority )
void vUtilityStartTraceTask( unsigned portBASE_TYPE uxPriority )
{
portENTER_CRITICAL();
InitUart5();
@ -150,7 +150,7 @@ static void vUART5Task( void *pvParameters )
vTaskList( ( signed char * ) tasklist_buff );
Puts5("\n\rThe current task list is as follows....");
Puts5("\n\r----------------------------------------------");
Puts5("\n\rName State Priority Stack Number");
Puts5("\n\rName State Priority Stack Number");
Puts5("\n\r----------------------------------------------");
Puts5(tasklist_buff);
Puts5("\r----------------------------------------------");
@ -164,7 +164,7 @@ static void vUART5Task( void *pvParameters )
Puts5("\n\rThe trace ended!!");
Puts5("\n\rThe trace is as follows....");
Puts5("\n\r--------------------------------------------------------");
Puts5("\n\r Tick | Task Number | Tick | Task Number |");
Puts5("\n\r Tick | Task Number | Tick | Task Number |");
Puts5("\n\r--------------------------------------------------------\n\r");
for( j = 0 ; j < trace_len ; j++ )
{

556
Demo/MB91460_Softune/SRC/vectors.c
View file

@ -1,18 +1,18 @@
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*------------------------------------------------------------------------
VECTORS.C
- Interrupt level (priority) setting
- Interrupt vector definition
31.04.05 1.00 UMa Initial Version
08.11.05 1.01 MSt SWB Mondeb switch for ICR00 Register added
27.02.06 1.02 UMa added comment in DefaultIRQHandler
17.03.06 1.03 UMa comment out ICR01
28.07.06 1.04 UMa changed comment
06.10.06 1.05 UMa changed DefaultIRQHandler
31.04.05 1.00 UMa Initial Version
08.11.05 1.01 MSt SWB Mondeb switch for ICR00 Register added
27.02.06 1.02 UMa added comment in DefaultIRQHandler
17.03.06 1.03 UMa comment out ICR01
28.07.06 1.04 UMa changed comment
06.10.06 1.05 UMa changed DefaultIRQHandler
-------------------------------------------------------------------------*/
#include "mb91467d.h"
@ -31,136 +31,136 @@
-------------------------------------------------------------------------*/
void InitIrqLevels(void)
{
/* ICRxx */
/* Softune Workbench Monitor Debugger is using ext int0 for abort function */
/* ICR00 = 31; *//* External Interrupt 0 */
/* External Interrupt 1 */
ICR01 = 31; /* External Interrupt 2 */
/* External Interrupt 3 */
ICR02 = 31; /* External Interrupt 4 */
/* External Interrupt 5 */
ICR03 = 31; /* External Interrupt 6 */
/* External Interrupt 7 */
ICR04 = 31; /* External Interrupt 8 */
/* External Interrupt 9 */
ICR05 = 31; /* External Interrupt 10 */
/* External Interrupt 11 */
ICR06 = 31; /* External Interrupt 12 */
/* External Interrupt 13 */
ICR07 = 31; /* External Interrupt 14 */
/* External Interrupt 15 */
ICR08 = 23; /* Reload Timer 0 */
/* Reload Timer 1 */
ICR09 = 31; /* Reload Timer 2 */
/* Reload Timer 3 */
ICR10 = 31; /* Reload Timer 4 */
/* Reload Timer 5 */
ICR11 = 31; /* Reload Timer 6 */
/* Reload Timer 7 */
ICR12 = 31; /* Free Run Timer 0 */
/* Free Run Timer 1 */
ICR13 = 31; /* Free Run Timer 2 */
/* Free Run Timer 3 */
ICR14 = 31; /* Free Run Timer 4 */
/* Free Run Timer 5 */
ICR15 = 31; /* Free Run Timer 6 */
/* Free Run Timer 7 */
ICR16 = 31; /* CAN 0 */
/* CAN 1 */
ICR17 = 31; /* CAN 2 */
/* CAN 3 */
ICR18 = 31; /* CAN 4 */
/* CAN 5 */
ICR19 = 31; /* USART (LIN) 0 RX */
/* USART (LIN) 0 TX */
ICR20 = 31; /* USART (LIN) 1 RX */
/* USART (LIN) 1 TX */
ICR21 = 21; /* USART (LIN) 2 RX */
/* USART (LIN) 2 TX */
ICR22 = 31; /* USART (LIN) 3 RX */
/* USART (LIN) 3 TX */
ICR23 = 23; /* System Reserved */
/* Delayed Interrupt */
ICR24 = 31; /* System Reserved */
/* System Reserved */
ICR25 = 31; /* USART (LIN, FIFO) 4 RX */
/* USART (LIN, FIFO) 4 TX */
ICR26 = 21; /* USART (LIN, FIFO) 5 RX */
/* USART (LIN, FIFO) 5 TX */
ICR27 = 31; /* USART (LIN, FIFO) 6 RX */
/* USART (LIN, FIFO) 6 TX */
ICR28 = 31; /* USART (LIN, FIFO) 7 RX */
/* USART (LIN, FIFO) 7 TX */
ICR29 = 31; /* I2C 0 / I2C 2 */
/* I2C 1 / I2C 3 */
ICR30 = 31; /* USART (LIN, FIFO) 8 RX */
/* USART (LIN, FIFO) 8 TX */
ICR31 = 31; /* USART (LIN, FIFO) 9 RX */
/* USART (LIN, FIFO) 9 TX */
ICR32 = 31; /* USART (LIN, FIFO) 10 RX */
/* USART (LIN, FIFO) 10 TX */
ICR33 = 31; /* USART (LIN, FIFO) 11 RX */
/* USART (LIN, FIFO) 11 TX */
ICR34 = 31; /* USART (LIN, FIFO) 12 RX */
/* USART (LIN, FIFO) 12 TX */
ICR35 = 31; /* USART (LIN, FIFO) 13 RX */
/* USART (LIN, FIFO) 13 TX */
ICR36 = 31; /* USART (LIN, FIFO) 14 RX */
/* USART (LIN, FIFO) 14 TX */
ICR37 = 31; /* USART (LIN, FIFO) 15 RX */
/* USART (LIN, FIFO) 15 TX */
ICR38 = 31; /* Input Capture 0 */
/* Input Capture 1 */
ICR39 = 31; /* Input Capture 2 */
/* Input Capture 3 */
ICR40 = 31; /* Input Capture 4 */
/* Input Capture 5 */
ICR41 = 31; /* Input Capture 6 */
/* Input Capture 7 */
ICR42 = 31; /* Output Compare 0 */
/* Output Compare 1 */
ICR43 = 31; /* Output Compare 2 */
/* Output Compare 3 */
ICR44 = 31; /* Output Compare 4 */
/* Output Compare 5 */
ICR45 = 31; /* Output Compare 6 */
/* Output Compare 7 */
ICR46 = 31; /* Sound Generator */
/* Phase Frequ. Modulator */
ICR47 = 31; /* System Reserved */
/* System Reserved */
ICR48 = 31; /* Prog. Pulse Gen. 0 */
/* Prog. Pulse Gen. 1 */
ICR49 = 31; /* Prog. Pulse Gen. 2 */
/* Prog. Pulse Gen. 3 */
ICR50 = 31; /* Prog. Pulse Gen. 4 */
/* Prog. Pulse Gen. 5 */
ICR51 = 31; /* Prog. Pulse Gen. 6 */
/* Prog. Pulse Gen. 7 */
ICR52 = 31; /* Prog. Pulse Gen. 8 */
/* Prog. Pulse Gen. 9 */
ICR53 = 31; /* Prog. Pulse Gen. 10 */
/* Prog. Pulse Gen. 11 */
ICR54 = 31; /* Prog. Pulse Gen. 12 */
/* Prog. Pulse Gen. 13 */
ICR55 = 31; /* Prog. Pulse Gen. 14 */
/* Prog. Pulse Gen. 15 */
ICR56 = 31; /* Up/Down Counter 0 */
/* Up/Down Counter 1 */
ICR57 = 31; /* Up/Down Counter 2 */
/* Up/Down Counter 3 */
ICR58 = 31; /* Real Time Clock */
/* Calibration Unit */
ICR59 = 31; /* A/D Converter 0 */
/* - */
ICR60 = 31; /* Alarm Comperator 0 */
/* Alarm Comperator 1 */
ICR61 = 31; /* Low Volage Detector */
/* SMC Zero Point 0-5 */
ICR62 = 31; /* Timebase Overflow */
/* PLL Clock Gear */
ICR63 = 31; /* DMA Controller */
/* Main/Sub OSC stability wait */
/* ICRxx */
/* Softune Workbench Monitor Debugger is using ext int0 for abort function */
/* ICR00 = 31; *//* External Interrupt 0 */
/* External Interrupt 1 */
ICR01 = 31; /* External Interrupt 2 */
/* External Interrupt 3 */
ICR02 = 31; /* External Interrupt 4 */
/* External Interrupt 5 */
ICR03 = 31; /* External Interrupt 6 */
/* External Interrupt 7 */
ICR04 = 31; /* External Interrupt 8 */
/* External Interrupt 9 */
ICR05 = 31; /* External Interrupt 10 */
/* External Interrupt 11 */
ICR06 = 31; /* External Interrupt 12 */
/* External Interrupt 13 */
ICR07 = 31; /* External Interrupt 14 */
/* External Interrupt 15 */
ICR08 = 23; /* Reload Timer 0 */
/* Reload Timer 1 */
ICR09 = 31; /* Reload Timer 2 */
/* Reload Timer 3 */
ICR10 = 31; /* Reload Timer 4 */
/* Reload Timer 5 */
ICR11 = 31; /* Reload Timer 6 */
/* Reload Timer 7 */
ICR12 = 31; /* Free Run Timer 0 */
/* Free Run Timer 1 */
ICR13 = 31; /* Free Run Timer 2 */
/* Free Run Timer 3 */
ICR14 = 31; /* Free Run Timer 4 */
/* Free Run Timer 5 */
ICR15 = 31; /* Free Run Timer 6 */
/* Free Run Timer 7 */
ICR16 = 31; /* CAN 0 */
/* CAN 1 */
ICR17 = 31; /* CAN 2 */
/* CAN 3 */
ICR18 = 31; /* CAN 4 */
/* CAN 5 */
ICR19 = 31; /* USART (LIN) 0 RX */
/* USART (LIN) 0 TX */
ICR20 = 31; /* USART (LIN) 1 RX */
/* USART (LIN) 1 TX */
ICR21 = 21; /* USART (LIN) 2 RX */
/* USART (LIN) 2 TX */
ICR22 = 31; /* USART (LIN) 3 RX */
/* USART (LIN) 3 TX */
ICR23 = 23; /* System Reserved */
/* Delayed Interrupt */
ICR24 = 31; /* System Reserved */
/* System Reserved */
ICR25 = 31; /* USART (LIN, FIFO) 4 RX */
/* USART (LIN, FIFO) 4 TX */
ICR26 = 21; /* USART (LIN, FIFO) 5 RX */
/* USART (LIN, FIFO) 5 TX */
ICR27 = 31; /* USART (LIN, FIFO) 6 RX */
/* USART (LIN, FIFO) 6 TX */
ICR28 = 31; /* USART (LIN, FIFO) 7 RX */
/* USART (LIN, FIFO) 7 TX */
ICR29 = 31; /* I2C 0 / I2C 2 */
/* I2C 1 / I2C 3 */
ICR30 = 31; /* USART (LIN, FIFO) 8 RX */
/* USART (LIN, FIFO) 8 TX */
ICR31 = 31; /* USART (LIN, FIFO) 9 RX */
/* USART (LIN, FIFO) 9 TX */
ICR32 = 31; /* USART (LIN, FIFO) 10 RX */
/* USART (LIN, FIFO) 10 TX */
ICR33 = 31; /* USART (LIN, FIFO) 11 RX */
/* USART (LIN, FIFO) 11 TX */
ICR34 = 31; /* USART (LIN, FIFO) 12 RX */
/* USART (LIN, FIFO) 12 TX */
ICR35 = 31; /* USART (LIN, FIFO) 13 RX */
/* USART (LIN, FIFO) 13 TX */
ICR36 = 31; /* USART (LIN, FIFO) 14 RX */
/* USART (LIN, FIFO) 14 TX */
ICR37 = 31; /* USART (LIN, FIFO) 15 RX */
/* USART (LIN, FIFO) 15 TX */
ICR38 = 31; /* Input Capture 0 */
/* Input Capture 1 */
ICR39 = 31; /* Input Capture 2 */
/* Input Capture 3 */
ICR40 = 31; /* Input Capture 4 */
/* Input Capture 5 */
ICR41 = 31; /* Input Capture 6 */
/* Input Capture 7 */
ICR42 = 31; /* Output Compare 0 */
/* Output Compare 1 */
ICR43 = 31; /* Output Compare 2 */
/* Output Compare 3 */
ICR44 = 31; /* Output Compare 4 */
/* Output Compare 5 */
ICR45 = 31; /* Output Compare 6 */
/* Output Compare 7 */
ICR46 = 31; /* Sound Generator */
/* Phase Frequ. Modulator */
ICR47 = 31; /* System Reserved */
/* System Reserved */
ICR48 = 31; /* Prog. Pulse Gen. 0 */
/* Prog. Pulse Gen. 1 */
ICR49 = 31; /* Prog. Pulse Gen. 2 */
/* Prog. Pulse Gen. 3 */
ICR50 = 31; /* Prog. Pulse Gen. 4 */
/* Prog. Pulse Gen. 5 */
ICR51 = 31; /* Prog. Pulse Gen. 6 */
/* Prog. Pulse Gen. 7 */
ICR52 = 31; /* Prog. Pulse Gen. 8 */
/* Prog. Pulse Gen. 9 */
ICR53 = 31; /* Prog. Pulse Gen. 10 */
/* Prog. Pulse Gen. 11 */
ICR54 = 31; /* Prog. Pulse Gen. 12 */
/* Prog. Pulse Gen. 13 */
ICR55 = 31; /* Prog. Pulse Gen. 14 */
/* Prog. Pulse Gen. 15 */
ICR56 = 31; /* Up/Down Counter 0 */
/* Up/Down Counter 1 */
ICR57 = 31; /* Up/Down Counter 2 */
/* Up/Down Counter 3 */
ICR58 = 31; /* Real Time Clock */
/* Calibration Unit */
ICR59 = 31; /* A/D Converter 0 */
/* - */
ICR60 = 31; /* Alarm Comperator 0 */
/* Alarm Comperator 1 */
ICR61 = 31; /* Low Volage Detector */
/* SMC Zero Point 0-5 */
ICR62 = 31; /* Timebase Overflow */
/* PLL Clock Gear */
ICR63 = 31; /* DMA Controller */
/* Main/Sub OSC stability wait */
}
@ -186,150 +186,150 @@ extern __interrupt void UART5_RxISR(void);
vectors are predefined. Remaining software interrupts can be added here
as well.
------------------------------------------------------------------------*/
#pragma intvect 0xBFF8 0 /* (fixed) reset vector */
#pragma intvect 0x06000000 1 /* (fixed) Mode Byte */
#pragma intvect 0xBFF8 0 /* (fixed) reset vector */
#pragma intvect 0x06000000 1 /* (fixed) Mode Byte */
#pragma intvect DefaultIRQHandler 15 /* Non Maskable Interrupt */
#pragma intvect DefaultIRQHandler 16 /* External Interrupt 0 */
#pragma intvect DefaultIRQHandler 17 /* External Interrupt 1 */
#pragma intvect DefaultIRQHandler 15 /* Non Maskable Interrupt */
#pragma intvect DefaultIRQHandler 16 /* External Interrupt 0 */
#pragma intvect DefaultIRQHandler 17 /* External Interrupt 1 */
#pragma intvect DefaultIRQHandler 18 /* External Interrupt 2 */
#pragma intvect DefaultIRQHandler 18 /* External Interrupt 2 */
#pragma intvect DefaultIRQHandler 19 /* External Interrupt 3 */
#pragma intvect DefaultIRQHandler 20 /* External Interrupt 4 */
#pragma intvect DefaultIRQHandler 21 /* External Interrupt 5 */
#pragma intvect DefaultIRQHandler 22 /* External Interrupt 6 */
#pragma intvect DefaultIRQHandler 23 /* External Interrupt 7 */
#pragma intvect DefaultIRQHandler 24 /* External Interrupt 8 */
#pragma intvect DefaultIRQHandler 25 /* External Interrupt 9 */
#pragma intvect DefaultIRQHandler 26 /* External Interrupt 10 */
#pragma intvect DefaultIRQHandler 27 /* External Interrupt 11 */
#pragma intvect DefaultIRQHandler 28 /* External Interrupt 12 */
#pragma intvect DefaultIRQHandler 29 /* External Interrupt 13 */
#pragma intvect DefaultIRQHandler 30 /* External Interrupt 14 */
#pragma intvect DefaultIRQHandler 31 /* External Interrupt 15 */
#pragma intvect DefaultIRQHandler 19 /* External Interrupt 3 */
#pragma intvect DefaultIRQHandler 20 /* External Interrupt 4 */
#pragma intvect DefaultIRQHandler 21 /* External Interrupt 5 */
#pragma intvect DefaultIRQHandler 22 /* External Interrupt 6 */
#pragma intvect DefaultIRQHandler 23 /* External Interrupt 7 */
#pragma intvect DefaultIRQHandler 24 /* External Interrupt 8 */
#pragma intvect DefaultIRQHandler 25 /* External Interrupt 9 */
#pragma intvect DefaultIRQHandler 26 /* External Interrupt 10 */
#pragma intvect DefaultIRQHandler 27 /* External Interrupt 11 */
#pragma intvect DefaultIRQHandler 28 /* External Interrupt 12 */
#pragma intvect DefaultIRQHandler 29 /* External Interrupt 13 */
#pragma intvect DefaultIRQHandler 30 /* External Interrupt 14 */
#pragma intvect DefaultIRQHandler 31 /* External Interrupt 15 */
#pragma intvect ReloadTimer0_IRQHandler 32 /* Reload Timer 0 */
#pragma intvect ReloadTimer0_IRQHandler 32 /* Reload Timer 0 */
#pragma intvect DefaultIRQHandler 33 /* Reload Timer 1 */
#pragma intvect DefaultIRQHandler 34 /* Reload Timer 2 */
#pragma intvect DefaultIRQHandler 35 /* Reload Timer 3 */
#pragma intvect DefaultIRQHandler 36 /* Reload Timer 4 */
#pragma intvect DefaultIRQHandler 37 /* Reload Timer 5 */
#pragma intvect DefaultIRQHandler 38 /* Reload Timer 6 */
#pragma intvect DefaultIRQHandler 39 /* Reload Timer 7 */
#pragma intvect DefaultIRQHandler 40 /* Free Run Timer 0 */
#pragma intvect DefaultIRQHandler 41 /* Free Run Timer 1 */
#pragma intvect DefaultIRQHandler 42 /* Free Run Timer 2 */
#pragma intvect DefaultIRQHandler 43 /* Free Run Timer 3 */
#pragma intvect DefaultIRQHandler 44 /* Free Run Timer 4 */
#pragma intvect DefaultIRQHandler 45 /* Free Run Timer 5 */
#pragma intvect DefaultIRQHandler 46 /* Free Run Timer 6 */
#pragma intvect DefaultIRQHandler 47 /* Free Run Timer 7 */
#pragma intvect DefaultIRQHandler 48 /* CAN 0 */
#pragma intvect DefaultIRQHandler 49 /* CAN 1 */
#pragma intvect DefaultIRQHandler 50 /* CAN 2 */
#pragma intvect DefaultIRQHandler 51 /* CAN 3 */
#pragma intvect DefaultIRQHandler 52 /* CAN 4 */
#pragma intvect DefaultIRQHandler 53 /* CAN 5 */
#pragma intvect DefaultIRQHandler 54 /* USART (LIN) 0 RX */
#pragma intvect DefaultIRQHandler 55 /* USART (LIN) 0 TX */
#pragma intvect DefaultIRQHandler 56 /* USART (LIN) 1 RX */
#pragma intvect DefaultIRQHandler 57 /* USART (LIN) 1 TX */
#pragma intvect DefaultIRQHandler 33 /* Reload Timer 1 */
#pragma intvect DefaultIRQHandler 34 /* Reload Timer 2 */
#pragma intvect DefaultIRQHandler 35 /* Reload Timer 3 */
#pragma intvect DefaultIRQHandler 36 /* Reload Timer 4 */
#pragma intvect DefaultIRQHandler 37 /* Reload Timer 5 */
#pragma intvect DefaultIRQHandler 38 /* Reload Timer 6 */
#pragma intvect DefaultIRQHandler 39 /* Reload Timer 7 */
#pragma intvect DefaultIRQHandler 40 /* Free Run Timer 0 */
#pragma intvect DefaultIRQHandler 41 /* Free Run Timer 1 */
#pragma intvect DefaultIRQHandler 42 /* Free Run Timer 2 */
#pragma intvect DefaultIRQHandler 43 /* Free Run Timer 3 */
#pragma intvect DefaultIRQHandler 44 /* Free Run Timer 4 */
#pragma intvect DefaultIRQHandler 45 /* Free Run Timer 5 */
#pragma intvect DefaultIRQHandler 46 /* Free Run Timer 6 */
#pragma intvect DefaultIRQHandler 47 /* Free Run Timer 7 */
#pragma intvect DefaultIRQHandler 48 /* CAN 0 */
#pragma intvect DefaultIRQHandler 49 /* CAN 1 */
#pragma intvect DefaultIRQHandler 50 /* CAN 2 */
#pragma intvect DefaultIRQHandler 51 /* CAN 3 */
#pragma intvect DefaultIRQHandler 52 /* CAN 4 */
#pragma intvect DefaultIRQHandler 53 /* CAN 5 */
#pragma intvect DefaultIRQHandler 54 /* USART (LIN) 0 RX */
#pragma intvect DefaultIRQHandler 55 /* USART (LIN) 0 TX */
#pragma intvect DefaultIRQHandler 56 /* USART (LIN) 1 RX */
#pragma intvect DefaultIRQHandler 57 /* USART (LIN) 1 TX */
#pragma intvect UART2_RxISR 58 /* USART (LIN) 2 RX */
#pragma intvect UART2_TxISR 59 /* USART (LIN) 2 TX */
#pragma intvect UART2_RxISR 58 /* USART (LIN) 2 RX */
#pragma intvect UART2_TxISR 59 /* USART (LIN) 2 TX */
#pragma intvect DefaultIRQHandler 60 /* USART (LIN) 3 RX */
#pragma intvect DefaultIRQHandler 61 /* USART (LIN) 3 TX */
#pragma intvect DefaultIRQHandler 62 /* System Reserved */
#pragma intvect DefaultIRQHandler 60 /* USART (LIN) 3 RX */
#pragma intvect DefaultIRQHandler 61 /* USART (LIN) 3 TX */
#pragma intvect DefaultIRQHandler 62 /* System Reserved */
#pragma intvect vPortYieldDelayed 63 /* Delayed Interrupt */
#pragma intvect vPortYieldDelayed 63 /* Delayed Interrupt */
#pragma intvect vPortYield 64 /* INT 64 */
#pragma intvect vPortYield 64 /* INT 64 */
#pragma intvect DefaultIRQHandler 65 /* System Reserved */
#pragma intvect DefaultIRQHandler 66 /* USART (LIN, FIFO) 4 RX */
#pragma intvect DefaultIRQHandler 67 /* USART (LIN, FIFO) 4 TX */
#pragma intvect DefaultIRQHandler 65 /* System Reserved */
#pragma intvect DefaultIRQHandler 66 /* USART (LIN, FIFO) 4 RX */
#pragma intvect DefaultIRQHandler 67 /* USART (LIN, FIFO) 4 TX */
#pragma intvect UART5_RxISR 68 /* USART (LIN, FIFO) 5 RX */
#pragma intvect UART5_RxISR 68 /* USART (LIN, FIFO) 5 RX */
#pragma intvect DefaultIRQHandler 69 /* USART (LIN, FIFO) 5 TX */
#pragma intvect DefaultIRQHandler 70 /* USART (LIN, FIFO) 6 RX */
#pragma intvect DefaultIRQHandler 71 /* USART (LIN, FIFO) 6 TX */
#pragma intvect DefaultIRQHandler 72 /* USART (LIN, FIFO) 7 RX */
#pragma intvect DefaultIRQHandler 73 /* USART (LIN, FIFO) 7 TX */
#pragma intvect DefaultIRQHandler 74 /* I2C 0 / I2C 2 */
#pragma intvect DefaultIRQHandler 75 /* I2C 1 / I2C 3 */
#pragma intvect DefaultIRQHandler 76 /* USART (LIN, FIFO) 8 RX */
#pragma intvect DefaultIRQHandler 77 /* USART (LIN, FIFO) 8 TX */
#pragma intvect DefaultIRQHandler 78 /* USART (LIN, FIFO) 9 RX */
#pragma intvect DefaultIRQHandler 79 /* USART (LIN, FIFO) 9 TX */
#pragma intvect DefaultIRQHandler 80 /* USART (LIN, FIFO) 10 RX */
#pragma intvect DefaultIRQHandler 81 /* USART (LIN, FIFO) 10 TX */
#pragma intvect DefaultIRQHandler 82 /* USART (LIN, FIFO) 11 RX */
#pragma intvect DefaultIRQHandler 83 /* USART (LIN, FIFO) 11 TX */
#pragma intvect DefaultIRQHandler 84 /* USART (LIN, FIFO) 12 RX */
#pragma intvect DefaultIRQHandler 85 /* USART (LIN, FIFO) 12 TX */
#pragma intvect DefaultIRQHandler 86 /* USART (LIN, FIFO) 13 RX */
#pragma intvect DefaultIRQHandler 87 /* USART (LIN, FIFO) 13 TX */
#pragma intvect DefaultIRQHandler 88 /* USART (LIN, FIFO) 14 RX */
#pragma intvect DefaultIRQHandler 89 /* USART (LIN, FIFO) 14 TX */
#pragma intvect DefaultIRQHandler 90 /* USART (LIN, FIFO) 15 RX */
#pragma intvect DefaultIRQHandler 91 /* USART (LIN, FIFO) 15 TX */
#pragma intvect DefaultIRQHandler 92 /* Input Capture 0 */
#pragma intvect DefaultIRQHandler 93 /* Input Capture 1 */
#pragma intvect DefaultIRQHandler 94 /* Input Capture 2 */
#pragma intvect DefaultIRQHandler 95 /* Input Capture 3 */
#pragma intvect DefaultIRQHandler 96 /* Input Capture 4 */
#pragma intvect DefaultIRQHandler 97 /* Input Capture 5 */
#pragma intvect DefaultIRQHandler 98 /* Input Capture 6 */
#pragma intvect DefaultIRQHandler 99 /* Input Capture 7 */
#pragma intvect DefaultIRQHandler 100 /* Output Compare 0 */
#pragma intvect DefaultIRQHandler 101 /* Output Compare 1 */
#pragma intvect DefaultIRQHandler 102 /* Output Compare 2 */
#pragma intvect DefaultIRQHandler 103 /* Output Compare 3 */
#pragma intvect DefaultIRQHandler 104 /* Output Compare 4 */
#pragma intvect DefaultIRQHandler 105 /* Output Compare 5 */
#pragma intvect DefaultIRQHandler 106 /* Output Compare 6 */
#pragma intvect DefaultIRQHandler 107 /* Output Compare 7 */
#pragma intvect DefaultIRQHandler 108 /* Sound Generator */
#pragma intvect DefaultIRQHandler 109 /* Phase Frequ. Modulator */
#pragma intvect DefaultIRQHandler 110 /* System Reserved */
#pragma intvect DefaultIRQHandler 111 /* System Reserved */
#pragma intvect DefaultIRQHandler 112 /* Prog. Pulse Gen. 0 */
#pragma intvect DefaultIRQHandler 113 /* Prog. Pulse Gen. 1 */
#pragma intvect DefaultIRQHandler 114 /* Prog. Pulse Gen. 2 */
#pragma intvect DefaultIRQHandler 115 /* Prog. Pulse Gen. 3 */
#pragma intvect DefaultIRQHandler 116 /* Prog. Pulse Gen. 4 */
#pragma intvect DefaultIRQHandler 117 /* Prog. Pulse Gen. 5 */
#pragma intvect DefaultIRQHandler 118 /* Prog. Pulse Gen. 6 */
#pragma intvect DefaultIRQHandler 119 /* Prog. Pulse Gen. 7 */
#pragma intvect DefaultIRQHandler 120 /* Prog. Pulse Gen. 8 */
#pragma intvect DefaultIRQHandler 121 /* Prog. Pulse Gen. 9 */
#pragma intvect DefaultIRQHandler 122 /* Prog. Pulse Gen. 10 */
#pragma intvect DefaultIRQHandler 123 /* Prog. Pulse Gen. 11 */
#pragma intvect DefaultIRQHandler 124 /* Prog. Pulse Gen. 12 */
#pragma intvect DefaultIRQHandler 125 /* Prog. Pulse Gen. 13 */
#pragma intvect DefaultIRQHandler 126 /* Prog. Pulse Gen. 14 */
#pragma intvect DefaultIRQHandler 127 /* Prog. Pulse Gen. 15 */
#pragma intvect DefaultIRQHandler 128 /* Up/Down Counter 0 */
#pragma intvect DefaultIRQHandler 129 /* Up/Down Counter 1 */
#pragma intvect DefaultIRQHandler 130 /* Up/Down Counter 2 */
#pragma intvect DefaultIRQHandler 131 /* Up/Down Counter 3 */
#pragma intvect DefaultIRQHandler 132 /* Real Time Clock */
#pragma intvect DefaultIRQHandler 133 /* Calibration Unit */
#pragma intvect DefaultIRQHandler 134 /* A/D Converter 0 */
#pragma intvect DefaultIRQHandler 135 /* - */
#pragma intvect DefaultIRQHandler 136 /* Alarm Comperator 0 */
#pragma intvect DefaultIRQHandler 137 /* Alarm Comperator 1 */
#pragma intvect DefaultIRQHandler 138 /* Low Volage Detector */
#pragma intvect DefaultIRQHandler 139 /* SMC Zero Point 0-5 */
#pragma intvect DefaultIRQHandler 140 /* Timebase Overflow */
#pragma intvect DefaultIRQHandler 141 /* PLL Clock Gear */
#pragma intvect DefaultIRQHandler 142 /* DMA Controller */
#pragma intvect DefaultIRQHandler 69 /* USART (LIN, FIFO) 5 TX */
#pragma intvect DefaultIRQHandler 70 /* USART (LIN, FIFO) 6 RX */
#pragma intvect DefaultIRQHandler 71 /* USART (LIN, FIFO) 6 TX */
#pragma intvect DefaultIRQHandler 72 /* USART (LIN, FIFO) 7 RX */
#pragma intvect DefaultIRQHandler 73 /* USART (LIN, FIFO) 7 TX */
#pragma intvect DefaultIRQHandler 74 /* I2C 0 / I2C 2 */
#pragma intvect DefaultIRQHandler 75 /* I2C 1 / I2C 3 */
#pragma intvect DefaultIRQHandler 76 /* USART (LIN, FIFO) 8 RX */
#pragma intvect DefaultIRQHandler 77 /* USART (LIN, FIFO) 8 TX */
#pragma intvect DefaultIRQHandler 78 /* USART (LIN, FIFO) 9 RX */
#pragma intvect DefaultIRQHandler 79 /* USART (LIN, FIFO) 9 TX */
#pragma intvect DefaultIRQHandler 80 /* USART (LIN, FIFO) 10 RX */
#pragma intvect DefaultIRQHandler 81 /* USART (LIN, FIFO) 10 TX */
#pragma intvect DefaultIRQHandler 82 /* USART (LIN, FIFO) 11 RX */
#pragma intvect DefaultIRQHandler 83 /* USART (LIN, FIFO) 11 TX */
#pragma intvect DefaultIRQHandler 84 /* USART (LIN, FIFO) 12 RX */
#pragma intvect DefaultIRQHandler 85 /* USART (LIN, FIFO) 12 TX */
#pragma intvect DefaultIRQHandler 86 /* USART (LIN, FIFO) 13 RX */
#pragma intvect DefaultIRQHandler 87 /* USART (LIN, FIFO) 13 TX */
#pragma intvect DefaultIRQHandler 88 /* USART (LIN, FIFO) 14 RX */
#pragma intvect DefaultIRQHandler 89 /* USART (LIN, FIFO) 14 TX */
#pragma intvect DefaultIRQHandler 90 /* USART (LIN, FIFO) 15 RX */
#pragma intvect DefaultIRQHandler 91 /* USART (LIN, FIFO) 15 TX */
#pragma intvect DefaultIRQHandler 92 /* Input Capture 0 */
#pragma intvect DefaultIRQHandler 93 /* Input Capture 1 */
#pragma intvect DefaultIRQHandler 94 /* Input Capture 2 */
#pragma intvect DefaultIRQHandler 95 /* Input Capture 3 */
#pragma intvect DefaultIRQHandler 96 /* Input Capture 4 */
#pragma intvect DefaultIRQHandler 97 /* Input Capture 5 */
#pragma intvect DefaultIRQHandler 98 /* Input Capture 6 */
#pragma intvect DefaultIRQHandler 99 /* Input Capture 7 */
#pragma intvect DefaultIRQHandler 100 /* Output Compare 0 */
#pragma intvect DefaultIRQHandler 101 /* Output Compare 1 */
#pragma intvect DefaultIRQHandler 102 /* Output Compare 2 */
#pragma intvect DefaultIRQHandler 103 /* Output Compare 3 */
#pragma intvect DefaultIRQHandler 104 /* Output Compare 4 */
#pragma intvect DefaultIRQHandler 105 /* Output Compare 5 */
#pragma intvect DefaultIRQHandler 106 /* Output Compare 6 */
#pragma intvect DefaultIRQHandler 107 /* Output Compare 7 */
#pragma intvect DefaultIRQHandler 108 /* Sound Generator */
#pragma intvect DefaultIRQHandler 109 /* Phase Frequ. Modulator */
#pragma intvect DefaultIRQHandler 110 /* System Reserved */
#pragma intvect DefaultIRQHandler 111 /* System Reserved */
#pragma intvect DefaultIRQHandler 112 /* Prog. Pulse Gen. 0 */
#pragma intvect DefaultIRQHandler 113 /* Prog. Pulse Gen. 1 */
#pragma intvect DefaultIRQHandler 114 /* Prog. Pulse Gen. 2 */
#pragma intvect DefaultIRQHandler 115 /* Prog. Pulse Gen. 3 */
#pragma intvect DefaultIRQHandler 116 /* Prog. Pulse Gen. 4 */
#pragma intvect DefaultIRQHandler 117 /* Prog. Pulse Gen. 5 */
#pragma intvect DefaultIRQHandler 118 /* Prog. Pulse Gen. 6 */
#pragma intvect DefaultIRQHandler 119 /* Prog. Pulse Gen. 7 */
#pragma intvect DefaultIRQHandler 120 /* Prog. Pulse Gen. 8 */
#pragma intvect DefaultIRQHandler 121 /* Prog. Pulse Gen. 9 */
#pragma intvect DefaultIRQHandler 122 /* Prog. Pulse Gen. 10 */
#pragma intvect DefaultIRQHandler 123 /* Prog. Pulse Gen. 11 */
#pragma intvect DefaultIRQHandler 124 /* Prog. Pulse Gen. 12 */
#pragma intvect DefaultIRQHandler 125 /* Prog. Pulse Gen. 13 */
#pragma intvect DefaultIRQHandler 126 /* Prog. Pulse Gen. 14 */
#pragma intvect DefaultIRQHandler 127 /* Prog. Pulse Gen. 15 */
#pragma intvect DefaultIRQHandler 128 /* Up/Down Counter 0 */
#pragma intvect DefaultIRQHandler 129 /* Up/Down Counter 1 */
#pragma intvect DefaultIRQHandler 130 /* Up/Down Counter 2 */
#pragma intvect DefaultIRQHandler 131 /* Up/Down Counter 3 */
#pragma intvect DefaultIRQHandler 132 /* Real Time Clock */
#pragma intvect DefaultIRQHandler 133 /* Calibration Unit */
#pragma intvect DefaultIRQHandler 134 /* A/D Converter 0 */
#pragma intvect DefaultIRQHandler 135 /* - */
#pragma intvect DefaultIRQHandler 136 /* Alarm Comperator 0 */
#pragma intvect DefaultIRQHandler 137 /* Alarm Comperator 1 */
#pragma intvect DefaultIRQHandler 138 /* Low Volage Detector */
#pragma intvect DefaultIRQHandler 139 /* SMC Zero Point 0-5 */
#pragma intvect DefaultIRQHandler 140 /* Timebase Overflow */
#pragma intvect DefaultIRQHandler 141 /* PLL Clock Gear */
#pragma intvect DefaultIRQHandler 142 /* DMA Controller */
#pragma intvect DefaultIRQHandler 143 /* Main/Sub OSC stability wait */
#pragma intvect 0xFFFFFFFF 144 /* Boot Sec. Vector (MB91V460A) */
#pragma intvect 0xFFFFFFFF 144 /* Boot Sec. Vector (MB91V460A) */
/*------------------------------------------------------------------------
DefaultIRQHandler()
@ -340,13 +340,15 @@ extern __interrupt void UART5_RxISR(void);
__interrupt
void DefaultIRQHandler (void)
{
/* RB_SYNC; */ /* Synchronisation with R-Bus */
/* May be required, if there is */
/* no R-Bus access after the */
/* reset of the interrupt flag */
/* RB_SYNC; */ /* Synchronisation with R-Bus */
/* May be required, if there is */
/* no R-Bus access after the */
/* reset of the interrupt flag */
__DI(); /* disable interrupts */
while(1)
Kick_Watchdog(); /* feed hardware watchdog */
/* halt system */
__DI(); /* disable interrupts */
while(1)
{
Kick_Watchdog(); /* feed hardware watchdog */
}
/* halt system */
}

13
Demo/MB91460_Softune/SRC/watchdog/watchdog.c
View file

@ -1,7 +1,7 @@
/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
/*------------------------------------------------------------------------
watchdog.c
- This file contains the function deefinition for hardware watchdog.
@ -29,16 +29,13 @@ void InitWatchdog(void)
static void prvWatchdogTask ( void *pvParameters )
{
const portTickType xFrequency = WTC_CLR_PER;
portTickType xLastWakeTime;
portTickType xLastWakeTime;
/* Get currrent tick count */
xLastWakeTime = xTaskGetTickCount();
for( ; ; )
{
/* Get currrent tick count */
xLastWakeTime = xTaskGetTickCount();
for( ; ; )
{
Kick_Watchdog();
/* Block the task for WTC_CLR_PER ticks (300 ms) at watchdog overflow