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Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.

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Tested and updated a few Cortex-M projects to use configUSE_PORT_OPTIMISED_TASK_SELECTION set to 1.
This commit is contained in:
Richard Barry 2012-09-24 11:01:17 +00:00
parent 670d172cfc
commit 92f1699055
19 changed files with 412 additions and 120 deletions
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18
FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
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@ -115,6 +115,24 @@ extern void vPortYieldFromISR( void );
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()
/*-----------------------------------------------------------*/
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Check the configuration. */
#if( configMAX_PRIORITIES >= 32 )
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
#endif
/* Store/clear the ready priorities in a bit map. */
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
/*-----------------------------------------------------------*/
#include <intrinsics.h>
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( ( uxReadyPriorities ) ) )
#endif /* taskRECORD_READY_PRIORITY */
/* Critical section management. */