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Xtensa_ESP32: Change _iram_end to _iram_text_end

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xtensa_loadstore_handler.S uses _iram_end to prevent modification of IRAM
code. With the LoadStore exception handler in place, IRAM can also be
used for .bss and .data section. Hence the sanity check should be based
upon _iram_text_end and not _iram_end
This commit is contained in:
Sachin Parekh 2020-02-26 19:08:26 +05:30 committed by Yuhui.Zheng
parent e1b98f0b4b
commit 8e3cf978c4
1 changed files with 2 additions and 2 deletions
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4
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_loadstore_handler.S vendored
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@ -86,7 +86,7 @@ LoadStoreErrorHandler:
/* Check whether the address lies in the valid range */ /* Check whether the address lies in the valid range */
rsr a3, excvaddr rsr a3, excvaddr
movi a4, _iram_end // End of code section of IRAM movi a4, _iram_text_end // End of code section of IRAM
bge a3, a4, 1f bge a3, a4, 1f
movi a4, SOC_CACHE_APP_LOW // Check if in APP cache region movi a4, SOC_CACHE_APP_LOW // Check if in APP cache region
blt a3, a4, .LS_wrong_opcode blt a3, a4, .LS_wrong_opcode
@ -280,7 +280,7 @@ AlignmentErrorHandler:
/* Check whether the address lies in the valid range */ /* Check whether the address lies in the valid range */
rsr a3, excvaddr rsr a3, excvaddr
movi a4, _iram_end // End of code section of IRAM movi a4, _iram_text_end // End of code section of IRAM
bge a3, a4, 1f bge a3, a4, 1f
movi a4, SOC_CACHE_APP_LOW // Check if in APP cache region movi a4, SOC_CACHE_APP_LOW // Check if in APP cache region
blt a3, a4, .LS_wrong_opcode blt a3, a4, .LS_wrong_opcode