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Update Risc-V port to use environment call in place of software interrupt - still very much a work in progress.

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This commit is contained in:
Richard Barry 2018-11-19 06:01:29 +00:00
parent baee711cb6
commit 8cef339aec
3 changed files with 30 additions and 12 deletions
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25
FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
View file

@ -94,6 +94,12 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
x28-31 t3-6 Temporaries Caller x28-31 t3-6 Temporaries Caller
*/ */
/* To ensure alignment. */
//_RB_ pxTopOfStack--;
//_RB_ pxTopOfStack--;
//_RB_pxTopOfStack--;
/* Numbers correspond to the x register number. */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 31; *pxTopOfStack = ( StackType_t ) 31;
pxTopOfStack--; pxTopOfStack--;
@ -185,7 +191,7 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCTR
ullNextTime += ullTimerIncrementsForOneTick; ullNextTime += ullTimerIncrementsForOneTick;
/* Enable timer interrupt */ /* Enable timer interrupt */
__asm volatile( "csrs mie, %0" :: "r"(0x80) ); __asm volatile( "csrs mie, %0" :: "r"(0x80) ); /* 1<<7 for timer interrupt. */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -196,19 +202,21 @@ volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCTRL_BASE;
vTaskSwitchContext(); vTaskSwitchContext();
/* Clear software interrupt. */ /* Clear software interrupt. */
*( ( uint32_t * ) configCTRL_BASE ) = 0UL; *( ( uint32_t * ) configCTRL_BASE ) &= 0x08UL;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void Timer_IRQHandler( void ) void Timer_IRQHandler( void )
{ {
extern void vTaskSwitchContext( void );
/* Reload for the next timer interrupt. */ /* Reload for the next timer interrupt. */
*pullMachineTimerCompareRegister = ullNextTime; *pullMachineTimerCompareRegister = ullNextTime;
ullNextTime += ullTimerIncrementsForOneTick; ullNextTime += ullTimerIncrementsForOneTick;
if( xTaskIncrementTick() != pdFALSE ) if( xTaskIncrementTick() != pdFALSE )
{ {
portYIELD(); vTaskSwitchContext();
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -217,6 +225,17 @@ BaseType_t xPortStartScheduler( void )
{ {
extern void xPortStartFirstTask( void ); extern void xPortStartFirstTask( void );
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t mtvec = 0;
/* Check the least significant two bits of mtvec are 00 - indicating single
vector mode. */
__asm volatile( "csrr %0, mtvec" : "=r"( mtvec ) );
configASSERT( ( mtvec & 0x03UL ) == 0 );
}
#endif
vPortSetupTimerInterrupt(); vPortSetupTimerInterrupt();
xPortStartFirstTask(); xPortStartFirstTask();

15
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S
View file

@ -82,14 +82,14 @@ xPortStartFirstTask:
addi sp, sp, CONTEXT_SIZE addi sp, sp, CONTEXT_SIZE
csrs mstatus, 8 /* Enable machine interrupts. */ csrs mstatus, 8 /* Enable machine interrupts. */
csrs mie, 8 /* Enable soft interrupt. */ csrs mie, 8 /* Enable soft interrupt. */
ret ret
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
.align 8 .align 8
vPortTrapHandler: vPortTrapHandler:
addi sp, sp, -CONTEXT_SIZE addi sp, sp, -CONTEXT_SIZE
sw x1, 1( sp ) sw x1, 1 * WORD_SIZE( sp )
sw x5, 2 * WORD_SIZE( sp ) sw x5, 2 * WORD_SIZE( sp )
sw x6, 3 * WORD_SIZE( sp ) sw x6, 3 * WORD_SIZE( sp )
sw x7, 4 * WORD_SIZE( sp ) sw x7, 4 * WORD_SIZE( sp )
@ -118,10 +118,6 @@ vPortTrapHandler:
sw x30, 27 * WORD_SIZE( sp ) sw x30, 27 * WORD_SIZE( sp )
sw x31, 28 * WORD_SIZE( sp ) sw x31, 28 * WORD_SIZE( sp )
/* Save exception return address. */
csrr t0, mepc
sw t0, 0( sp )
lw t0, pxCurrentTCB /* Load pxCurrentTCB. */ lw t0, pxCurrentTCB /* Load pxCurrentTCB. */
sw sp, 0( t0 ) /* Write sp from first TCB member. */ sw sp, 0( t0 ) /* Write sp from first TCB member. */
@ -130,6 +126,9 @@ vPortTrapHandler:
mv a2, sp mv a2, sp
jal handle_trap jal handle_trap
csrw mepc, a0 csrw mepc, a0
/* Save exception return address. */
sw a0, 0( sp )
# Remain in M-mode after mret # Remain in M-mode after mret
li t0, 0x00001800 /* MSTATUS MPP */ li t0, 0x00001800 /* MSTATUS MPP */
@ -138,11 +137,11 @@ vPortTrapHandler:
lw sp, pxCurrentTCB /* Load pxCurrentTCB. */ lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
lw sp, 0( sp ) /* Read sp from first TCB member. */ lw sp, 0( sp ) /* Read sp from first TCB member. */
/* Load mret with the address of the first task. */ /* Load mret with the address of the next task. */
lw t0, 0( sp ) lw t0, 0( sp )
csrw mepc, t0 csrw mepc, t0
lw x1, 1( sp ) lw x1, 1 * WORD_SIZE( sp )
lw x5, 2 * WORD_SIZE( sp ) /* t0 */ lw x5, 2 * WORD_SIZE( sp ) /* t0 */
lw x6, 3 * WORD_SIZE( sp ) /* t1 */ lw x6, 3 * WORD_SIZE( sp ) /* t1 */
lw x7, 4 * WORD_SIZE( sp ) /* t2 */ lw x7, 4 * WORD_SIZE( sp ) /* t2 */

2
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
View file

@ -70,7 +70,7 @@ not need to be guarded with a critical section. */
/* Scheduler utilities. */ /* Scheduler utilities. */
#define portYIELD() *( ( uint32_t * ) configCTRL_BASE ) = 1UL #define portYIELD() __asm volatile( "ecall" ); // software interrupt alternative *( ( uint32_t * ) configCTRL_BASE ) |= 0x08UL
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield() #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/