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Ensure the PIC32 interrupt stack is 8 byte aligned for all values of configISR_STACK_SIZE.
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@ -188,11 +188,11 @@ volatile UBaseType_t uxInterruptNesting = 0x01;
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UBaseType_t uxSavedTaskStackPointer = 0;
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/* The stack used by interrupt service routines that cause a context switch. */
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StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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__attribute__ ((aligned(8))) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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/* The top of stack value ensures there is enough space to store 6 registers on
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the callers stack, as some functions seem to want to do this. */
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const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
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const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] );
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/*-----------------------------------------------------------*/
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@ -198,7 +198,7 @@ extern void vPortClearInterruptMaskFromISR( UBaseType_t );
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) )
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#endif /* taskRECORD_READY_PRIORITY */
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@ -1,5 +1,5 @@
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/*
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FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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@ -71,8 +71,12 @@
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* Implementation of functions defined in portable.h for the PIC32MZ port.
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*----------------------------------------------------------*/
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/* Microchip specific headers. */
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#include <xc.h>
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/* Standard headers. */
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#include <string.h>
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "task.h"
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@ -189,11 +193,13 @@ volatile UBaseType_t uxInterruptNesting = 0x01;
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UBaseType_t uxSavedTaskStackPointer = 0;
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/* The stack used by interrupt service routines that cause a context switch. */
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StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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__attribute__ ((aligned(8))) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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/* The top of stack value ensures there is enough space to store 6 registers on
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the callers stack, as some functions seem to want to do this. */
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const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
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the callers stack, as some functions seem to want to do this. 8 byte alignment
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is required to allow double word floating point stack pushes generated by the
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compiler. */
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const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 8 ] );
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/* Saved as part of the task context. Set to pdFALSE if the task does not
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require an FPU context. */
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@ -209,7 +209,7 @@ extern void vPortClearInterruptMaskFromISR( UBaseType_t );
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/*-----------------------------------------------------------*/
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - _clz( ( uxReadyPriorities ) ) )
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#endif /* taskRECORD_READY_PRIORITY */
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