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Richard Barry
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11 changed files with 569 additions and 611 deletions
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@ -1,27 +1,27 @@
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/******************************************************************************
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* DISCLAIMER
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* This software is supplied by Renesas Technology Corp. and is only
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* This software is supplied by Renesas Technology Corp. and is only
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* intended for use with Renesas products. No other uses are authorized.
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* This software is owned by Renesas Technology Corp. and is protected under
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* This software is owned by Renesas Technology Corp. and is protected under
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* all applicable laws, including copyright laws.
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* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
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* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
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* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
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* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
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* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
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* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
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* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
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* DISCLAIMED.
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
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* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
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* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
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* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
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* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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* Renesas reserves the right, without notice, to make changes to this
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* software and to discontinue the availability of this software.
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* By using this software, you agree to the additional terms and
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* Renesas reserves the right, without notice, to make changes to this
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* software and to discontinue the availability of this software.
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* By using this software, you agree to the additional terms and
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* conditions found by accessing the following link:
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* http://www.renesas.com/disclaimer
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******************************************************************************
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@ -39,10 +39,9 @@
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/******************************************************************************
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Includes <System Includes> , "Project Includes"
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******************************************************************************/
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#include <iodefine.h>
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#include "iodefine.h"
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#include "yrdkrx62ndef.h"
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// #include "lcd.h" Uncomment this if an LCD is present.
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#include "r_ether.h"
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/******************************************************************************
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Typedef definitions
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@ -63,168 +62,88 @@ Exported global variables and functions (to be accessed by other files)
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/******************************************************************************
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Private global variables and functions
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******************************************************************************/
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void io_set_cpg(void);
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void ConfigurePortPins(void);
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void EnablePeripheralModules(void);
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/******************************************************************************
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* Function Name: HardwareSetup
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* Description : This function does initial setting for CPG port pins used in
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* : the Demo including the MII pins of the Ethernet PHY connection.
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* Arguments : none
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* : the Demo including the MII pins of the Ethernet PHY connection.
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* Arguments : none
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* Return Value : none
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******************************************************************************/
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void HardwareSetup(void)
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{
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/* CPG setting */
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io_set_cpg();
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unsigned long sckcr = 0;
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/* Setup the port pins */
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ConfigurePortPins();
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/* Configure system clocks based on header */
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sckcr += (ICLK_MUL==8) ? (0ul << 24) : (ICLK_MUL==4) ? (1ul << 24) : (ICLK_MUL==2) ? (2ul << 24) : (3ul << 24);
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sckcr += (BCLK_MUL==8) ? (0ul << 16) : (BCLK_MUL==4) ? (1ul << 16) : (BCLK_MUL==2) ? (2ul << 16) : (3ul << 16);
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sckcr += (PCLK_MUL==8) ? (0ul << 8) : (PCLK_MUL==4) ? (1ul << 8) : (PCLK_MUL==2) ? (2ul << 8) : (3ul << 8);
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SYSTEM.SCKCR.LONG = sckcr;
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/* Enables peripherals */
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EnablePeripheralModules();
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/* Module standby clear - EtherC, EDMAC */
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SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;
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#if INCLUDE_LCD == 1
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/* Initialize display */
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InitialiseDisplay();
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#endif
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PORT0.DDR.BYTE = 0x00 ; // Port 0: inputs (IRQ's from ethernet & WiFi)
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PORT1.DDR.BYTE = 0x00 ; // Port 1: inputs (IIC and USB settings will override these later)
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PORT2.DDR.BYTE = 0x1A ; // Port 2: USB signals
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PORT3.DDR.BYTE = 0x04 ; // Port 3: JTAG (P30, P31, P34), CAN (P32=Tx, P33=Rx), NMI (P35)
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PORT4.DDR.BYTE = 0x00 ; // Port 4: Switches (P40-P42), AIN (P43-P47)
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PORT5.DDR.BYTE = 0x3B ; // Port 5: Audio (P55,P54), BCLK (P53), SCI (P52=Rx, P50=Tx), LCD-RS (P51)
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PORTA.DR.BYTE = 0x00 ; // Port A outputs all LOW to start
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PORTA.DDR.BYTE = 0xFF ; // Port A: Expansion (PA0-PA2), Ether (PA3-PA5), Audio (PA6-PA7)
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PORTB.DR.BYTE = 0x00 ;
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PORTB.DDR.BYTE = 0x70 ; // Port B: Ether
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PORTC.DR.BYTE = 0xF7 ; // Port C: Chip selects, clock = high; IO reset = low (not reset, needed by Ether PHY)
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PORTC.DDR.BYTE = 0x7F ; // Port C: SPI (PC0-2, PC4-7), IO reset (PC3)
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// Ethernet settings
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IOPORT.PFENET.BYTE = 0x82; // Enable Ether poins, RMII mode, enable LINKSTA
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PORTA.ICR.BIT.B5 = 1; // ET_LINKSTA
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PORTA.ICR.BIT.B3 = 1; // ET_MDIO
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PORTB.ICR.BIT.B0 = 1; // RMII_RXD1
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PORTB.ICR.BIT.B1 = 1; // RMII_RXD0
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PORTB.ICR.BIT.B2 = 1; // REF50CLK
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PORTB.ICR.BIT.B3 = 1; // RMII_RX_ER
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PORTB.ICR.BIT.B7 = 1; // RMII_CRS_DV
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/* Configure LEDs */
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LED4 = LED_OFF;
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LED5 = LED_OFF;
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LED6 = LED_OFF;
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LED7 = LED_OFF;
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LED8 = LED_OFF;
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LED9 = LED_OFF;
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LED10 = LED_OFF;
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LED11 = LED_OFF;
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LED12 = LED_OFF;
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LED13 = LED_OFF;
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LED14 = LED_OFF;
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LED15 = LED_OFF;
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LED4_DDR = 1;
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LED5_DDR = 1;
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LED6_DDR = 1;
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LED7_DDR = 1;
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LED8_DDR = 1;
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LED9_DDR = 1;
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LED10_DDR = 1;
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LED11_DDR = 1;
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LED12_DDR = 1;
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LED13_DDR = 1;
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LED14_DDR = 1;
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LED15_DDR = 1;
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/* Configure push button switches */
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SW1_DDR = 0;
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SW2_DDR = 0;
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SW3_DDR = 0;
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SW1_ICR = 1;
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SW2_ICR = 1;
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SW3_ICR = 1;
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}
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/******************************************************************************
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* Function Name: EnablePeripheralModules
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* Description : Enables Peripheral Modules before use
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* Arguments : none
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* Return Value : none
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******************************************************************************/
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void EnablePeripheralModules(void)
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{
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/* Module standby clear */
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SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; /* EtherC, EDMAC */
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SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; /* CMT0 */
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}
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/******************************************************************************
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* Function Name: ConfigurePortPins
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* Description : Configures port pins.
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* Arguments : none
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* Return Value : none
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******************************************************************************/
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void ConfigurePortPins(void)
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{
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/* Port pins default to inputs. To ensure safe initialisation set the pin states
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before changing the data direction registers. This will avoid any unintentional
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state changes on the external ports.
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Many peripheral modules will override the setting of the port registers. Ensure
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that the state is safe for external devices if the internal peripheral module is
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disabled or powered down. */
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/* ==== MII/RMII Pins setting ==== */
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/*--------------------------------------*/
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/* Port Function Control Register */
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/*--------------------------------------*/
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#if ETH_MODE_SEL == ETH_MII_MODE
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/* EE=1, PHYMODE=1, ENETE3=1, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
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IOPORT.PFENET.BYTE = 0x9A;
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#endif /* ETH_MODE_SEL */
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#if ETH_MODE_SEL == ETH_RMII_MODE
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/* EE=1, PHYMODE=0, ENETE3=0, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
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IOPORT.PFENET.BYTE = 0x82;
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#endif /* ETH_MODE_SEL */
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/*-------------------------------------------*/
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/* Input Buffer Control Register (ICR) */
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/*-------------------------------------------*/
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#if ETH_MODE_SEL == ETH_MII_MODE
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/* P54=1 Set ET_LINKSTA input */
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PORT5.ICR.BIT.B4 = 1;
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/* P71=1 Set ET_MDIO input */
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PORT7.ICR.BIT.B1 = 1;
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/* P74=1 Set ET_ERXD1 input */
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PORT7.ICR.BIT.B4 = 1;
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/* P75=1 Set ET_ERXD0 input */
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PORT7.ICR.BIT.B5 = 1;
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/* P76=1 Set ET_RX_CLK input */
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PORT7.ICR.BIT.B6 = 1;
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/* P77=1 Set ET_RX_ER input */
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PORT7.ICR.BIT.B7 = 1;
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/* P83=1 Set ET_CRS input */
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PORT8.ICR.BIT.B3 = 1;
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/* PC0=1 Set ET_ERXD3 input */
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PORTC.ICR.BIT.B0 = 1;
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/* PC1=1 Set ET_ERXD2 input */
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PORTC.ICR.BIT.B1 = 1;
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/* PC2=1 Set ET_RX_DV input */
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PORTC.ICR.BIT.B2 = 1;
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/* PC4=1 Set EX_TX_CLK input */
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PORTC.ICR.BIT.B4 = 1;
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/* PC7=1 Set ET_COL input */
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PORTC.ICR.BIT.B7 = 1;
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#endif /* ETH_MODE_SEL */
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#if ETH_MODE_SEL == ETH_RMII_MODE
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/* P54=1 Set ET_LINKSTA input */
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PORT5.ICR.BIT.B4 = 1;
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/* P71=1 Set ET_MDIO input */
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PORT7.ICR.BIT.B1 = 1;
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/* P74=1 Set RMII_RXD1 input */
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PORT7.ICR.BIT.B4 = 1;
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/* P75=1 Set RMII_RXD0 input */
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PORT7.ICR.BIT.B5 = 1;
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/* P76=1 Set REF50CLK input */
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PORT7.ICR.BIT.B6 = 1;
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/* P77=1 Set RMII_RX_ER input */
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PORT7.ICR.BIT.B7 = 1;
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/* P83=1 Set RMII_CRS_DV input */
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PORT8.ICR.BIT.B3 = 1;
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#endif /* ETH_MODE_SEL */
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/* Configure LED 0-5 pin settings */
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PORT0.DR.BIT.B2 = 1;
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PORT0.DR.BIT.B3 = 1;
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PORT0.DR.BIT.B5 = 1;
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PORT3.DR.BIT.B4 = 1;
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PORT6.DR.BIT.B0 = 1;
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PORT7.DR.BIT.B3 = 1;
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PORT0.DDR.BIT.B2 = 1;
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PORT0.DDR.BIT.B3 = 1;
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PORT0.DDR.BIT.B5 = 1;
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PORT3.DDR.BIT.B4 = 1;
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PORT6.DDR.BIT.B0 = 1;
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PORT7.DDR.BIT.B3 = 1;
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/* Configure SW 1-3 pin settings */
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PORT0.DDR.BIT.B0 = 0;
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PORT0.DDR.BIT.B1 = 0;
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PORT0.DDR.BIT.B7 = 0;
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PORT0.ICR.BIT.B0 = 1;
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PORT0.ICR.BIT.B1 = 1;
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PORT0.ICR.BIT.B7 = 1;
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#if INCLUDE_LCD == 1
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/* Set LCD pins as outputs */
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/* LCD-RS */
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PORT8.DDR.BIT.B4 = 1;
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/* LCD-EN */
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PORT8.DDR.BIT.B5 = 1;
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/*LCD-data */
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PORT9.DDR.BYTE = 0xF0;
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#endif
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}
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/******************************************************************************
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* Function Name: io_set_cpg
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* Description : Sets up operating speed
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* Arguments : none
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* Return Value : none
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******************************************************************************/
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void io_set_cpg(void)
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{
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/* Set CPU PLL operating frequencies. Changes to the peripheral clock will require
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changes to the debugger and flash kernel BRR settings. */
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/* ==== CPG setting ==== */
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SYSTEM.SCKCR.LONG = 0x00020100; /* Clockin = 12MHz */
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/* I Clock = 96MHz, B Clock = 24MHz, */
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/* P Clock = 48MHz */
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}
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