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Add barrier instructions to IAR CM3 ports.
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7 changed files with 72 additions and 46 deletions
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@ -56,19 +56,19 @@
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, and our new
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fully thread aware and reentrant UDP/IP stack.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems, who sell the code with commercial support,
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems, who sell the code with commercial support,
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indemnification and middleware, under the OpenRTOS brand.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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*/
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@ -76,6 +76,9 @@
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* Implementation of functions defined in portable.h for the ARM CM0 port.
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*----------------------------------------------------------*/
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/* IAR includes. */
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#include "intrinsics.h"
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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@ -83,12 +86,10 @@
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/* Constants required to manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )
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#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
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#define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_PENDSVSET 0x10000000
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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@ -155,7 +156,7 @@ portBASE_TYPE xPortStartScheduler( void )
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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uxCriticalNesting = 0;
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@ -174,10 +175,15 @@ void vPortEndScheduler( void )
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}
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/*-----------------------------------------------------------*/
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void vPortYieldFromISR( void )
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void vPortYield( void )
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{
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/* Set a PendSV to request a context switch. */
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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/* Barriers are normally not required but do ensure the code is completely
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within the specified behaviour for the architecture. */
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__DSB();
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__ISB();
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}
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/*-----------------------------------------------------------*/
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@ -185,6 +191,8 @@ void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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__DSB();
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__ISB();
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}
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/*-----------------------------------------------------------*/
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@ -204,7 +212,7 @@ unsigned long ulDummy;
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/* If using preemption, also force a context switch. */
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#if configUSE_PREEMPTION == 1
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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#endif
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ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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@ -116,11 +116,11 @@ extern "C" {
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/* Scheduler utilities. */
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extern void vPortYieldFromISR( void );
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#define portYIELD() vPortYieldFromISR()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYieldFromISR()
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extern void vPortYield( void );
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#define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
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#define portNVIC_PENDSVSET 0x10000000
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
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/*-----------------------------------------------------------*/
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