FreeRTOS source:

+ Added Renesas RXv2 port for IAR.

Demo apps:
+ Demo/Rename the CORTEX_R4F_T_GCC_IAR_ARM directory to just Rename the CORTEX_R4F_T_GCC_IAR.
+ Add IAR project for the RX113.
+ Add RX231 e2studio projects for the RX231.
This commit is contained in:
Richard Barry 2015-09-23 12:16:10 +00:00
parent 27ff871a37
commit 87243e4a16
225 changed files with 427176 additions and 220 deletions

View file

@ -120,7 +120,7 @@
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View file

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@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM
@REM Read about available command line parameters in the C-SPY Debugging
@REM Guide. Hints about additional command line parameters that may be
@REM useful in specific cases:
@REM --download_only Downloads a code image without starting a debug
@REM session afterwards.
@REM --silent Omits the sign-on message.
@REM --timeout Limits the maximum allowed execution time.
@REM
@echo off
if not "%1" == "" goto debugFile
@echo on
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX700_RX71M_RSK_GCC_e2studio_IAR\settings\RTOSDemo.Debug.general.xcl" --backend -f "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX700_RX71M_RSK_GCC_e2studio_IAR\settings\RTOSDemo.Debug.driver.xcl"
@echo off
goto end
:debugFile
@echo on
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\common\bin\cspybat" -f "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX700_RX71M_RSK_GCC_e2studio_IAR\settings\RTOSDemo.Debug.general.xcl" "--debug_file=%1" --backend -f "C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX700_RX71M_RSK_GCC_e2studio_IAR\settings\RTOSDemo.Debug.driver.xcl"
@echo off
:end

View file

@ -0,0 +1,37 @@
-B
"-p"
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\rx\config\debugger\ior5f571ml.ddf"
"--endian"
"l"
"--double"
"32"
"--core"
"rxv2"
"--int"
"32"
"-d"
"emue20"
"--drv_mode"
"debugging"
"--drv_communication"
"USB"

View file

@ -0,0 +1,11 @@
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\rx\bin\rxproc.dll"
"C:\DevTools\IAR Systems\Embedded Workbench 7.2\rx\bin\rxe1e20.dll"
"C:\E\Dev\FreeRTOS\WorkingCopy\FreeRTOS\Demo\RX700_RX71M_RSK_GCC_e2studio_IAR\Debug\Exe\RTOSDemo.out"
--plugin "C:\DevTools\IAR Systems\Embedded Workbench 7.2\rx\bin\rxbat.dll"

View file

@ -0,0 +1,244 @@
<?xml version="1.0" encoding="iso-8859-1"?>
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<Column0>255</Column0>
<Column1>27</Column1>
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<Disassembly>
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</col-names>
<col-widths>
<item>500</item>
<item>20</item>
</col-widths>
<DisasmHistory/>
<PreferedWindows>
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<Windows/>
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<Register>
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<Windows>
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View file

@ -0,0 +1,250 @@
[DebugChecksum]
Checksum=-126027898
[CodeCoverage]
Enabled=_ 0
[Stack]
FillEnabled=0
OverflowWarningsEnabled=1
WarningThreshold=90
SpWarningsEnabled=1
WarnLogOnly=1
UseTrigger=1
TriggerName=main
LimitSize=0
ByteLimit=50
[CallStack]
ShowArgs=0
[Disassembly]
MixedMode=1
[E1/E20]
BlockBits=15
B0=1,0
B1=1,1024
B2=1,2048
B3=1,3072
StartEnabled=0
StartSymbol=
StopEnabled=0
StopSymbol=
RecordingCondition=0
TraceMode=0
TraceOutput=0
TraceType=0
TraceCapacity=0
TraceRestart=0
TraceTimeStamp=0
TraceTimestampDivision=0
TraceDataTransfer=1
TraceStackOperation=1
TraceStringOperation=1
TraceArithmeticalOperation=1
TraceLogicalOperation=1
TraceBitOperation=1
TraceFPU=1
TraceException=1
OperatingFrequency=0.000000
PerfEnabled=0
PerfCondition=0,0
PerfDisplayTime=0,0
PerfOnlyOnce=0,0
PerfUse64Bit=0
ChipName=R5F571ML
PinMode=0
RegMode=0
Endian=0
ExtMemBlockNum=55
ExtMemEndian_000=0
ExtMemCondAccess_000=0
ExtMemEndian_001=0
ExtMemCondAccess_001=0
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ExtMemEndian_052=0
ExtMemCondAccess_052=0
ExtMemEndian_053=0
ExtMemCondAccess_053=0
ExtMemEndian_054=0
ExtMemCondAccess_054=0
InputClock=25.000000
ICLK=240.000000
AllowClkSrcChange=0
WorkRamStart=4096
ComunicationSelect=0
UseExtal=1
JtagClock=10
FINE=2000000
EraseFlash=1,0
DebugFlags=0,0
EmulatorMode=0
PowerTargetFromEmulator=1
Voltage=0
UseExtFlashFile_0=0
ExtFlashFile_0=
EraseExtFlashBeforeDownload_0=0
UseExtFlashFile_1=0
ExtFlashFile_1=
EraseExtFlashBeforeDownload_1=0
UseExtFlashFile_2=0
ExtFlashFile_2=
EraseExtFlashBeforeDownload_2=0
UseExtFlashFile_3=0
ExtFlashFile_3=
EraseExtFlashBeforeDownload_3=0
NeedInitExtMem=0
NeedInit=0
[CallStackLog]
Enabled=0
[CallStackStripe]
ShowTiming=1
[InterruptLog]
LogEnabled=0
GraphEnabled=0
ShowTimeLog=1
SumEnabled=0
ShowTimeSum=1
SumSortOrder=0
[DataLog]
LogEnabled=0
GraphEnabled=0
ShowTimeLog=1
SumEnabled=0
ShowTimeSum=1
[Breakpoints2]
Count=0
[Interrupts]
Enabled=1
[MemoryMap]
Enabled=0
Base=0
UseAuto=0
TypeViolation=1
UnspecRange=1
ActionState=1
[Simulator]
Freq=98000000
[DataSample]
LogEnabled=0
GraphEnabled=0
ShowTimeLog=1
[DriverProfiling]
Enabled=0
Mode=1
Graph=0
Symbiont=0
Exclusions=
[Log file]
LoggingEnabled=_ 0
LogFile=_ ""
Category=_ 0
[TermIOLog]
LoggingEnabled=_ 0
LogFile=_ ""
[Breakpoints]
Count=0
[Monitor Execution]
Leave target running=0
Release target=0
[Trace1]
Enabled=0
ShowSource=1
[Aliases]
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SuppressDialog=0

View file

@ -0,0 +1,77 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>RTOSDemo/Debug</Project></CurrentConfigs></ConfigDictionary>
<Desktop>
<Static>
<Workspace>
<ColumnWidths>
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<Build>
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<TerminalIO/>
<Debug-Log>
<ColumnWidth0>20</ColumnWidth0>
<ColumnWidth1>1622</ColumnWidth1>
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</Static>
<Windows>
<Wnd0>
<Tabs>
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<Session>
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<Tab>
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View file

@ -0,0 +1,2 @@
[MainWindow]
WindowPlacement=_ 519 0 1619 872 3

View file

@ -71,7 +71,14 @@
#define FREERTOS_CONFIG_H
/* Renesas hardware definition header. */
#include "iodefine.h"
#ifdef __ICCRX__
#include <iorx71m.h>
#include <machine.h>
#endif
#ifdef __GNUC__
#include "iodefine.h"
#endif
/*-----------------------------------------------------------
* Application specific definitions.
@ -128,7 +135,7 @@ kernel is doing. */
/* The peripheral used to generate the tick interrupt is configured as part of
the application code. This constant should be set to the vector number of the
peripheral chosen. As supplied this is CMT0. */
#define configTICK_VECTOR _CMT0_CMI0
#define configTICK_VECTOR 28 /*vect _CMT0_CMI0*/
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */

View file

@ -68,9 +68,9 @@
*/
/*
* This file contains the non-portable and therefore RX62N specific parts of
* the IntQueue standard demo task - namely the configuration of the timers
* that generate the interrupts and the interrupt entry points.
* This file contains the non-portable and therefore RX specific parts of the
* IntQueue standard demo task - namely the configuration of the timers that
* generate the interrupts and the interrupt entry points.
*/
/* Scheduler includes. */
@ -81,23 +81,8 @@
#include "IntQueueTimer.h"
#include "IntQueue.h"
/* Hardware specifics. */
#include "iodefine.h"
#define IPR_PERIB_INTB128 128
#define IPR_PERIB_INTB129 129
#define IER_PERIB_INTB128 0x10
#define IER_PERIB_INTB129 0x10
#define IEN_PERIB_INTB128 IEN0
#define IEN_PERIB_INTB129 IEN1
#define IR_PERIB_INTB128 128
#define IR_PERIB_INTB129 129
void vIntQTimerISR0( void ) __attribute__ ((interrupt));
void vIntQTimerISR1( void ) __attribute__ ((interrupt));
#define tmrTIMER_0_1_FREQUENCY ( 2000UL )
#define tmrTIMER_2_3_FREQUENCY ( 2001UL )
#define tmrTIMER_2_3_FREQUENCY ( 2301UL )
void vInitialiseTimerForIntQueueTest( void )
{
@ -107,7 +92,7 @@ void vInitialiseTimerForIntQueueTest( void )
/* Give write access. */
SYSTEM.PRCR.WORD = 0xa502;
/* Cascade two 8bit timer channels to generate the interrupts.
/* Cascade two 8bit timer channels to generate the interrupts.
8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
utilised for this test. */
@ -130,11 +115,11 @@ void vInitialiseTimerForIntQueueTest( void )
/* 16 bit operation ( count from timer 1,2 ). */
TMR0.TCCR.BIT.CSS = 3;
TMR2.TCCR.BIT.CSS = 3;
/* Use PCLK as the input. */
TMR1.TCCR.BIT.CSS = 1;
TMR3.TCCR.BIT.CSS = 1;
/* Divide PCLK by 8. */
TMR1.TCCR.BIT.CKS = 2;
TMR3.TCCR.BIT.CKS = 2;
@ -143,11 +128,9 @@ void vInitialiseTimerForIntQueueTest( void )
TMR0.TCR.BIT.CMIEA = 1;
TMR2.TCR.BIT.CMIEA = 1;
/* Map TMR0 CMIA0 interrupt to vector slot B number 128 and set
priority above the kernel's priority, but below the max syscall
priority. */
ICU.SLIBXR128.BYTE = 3; /* Three is TMR0 compare match A. */
IPR( PERIB, INTB128 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
/* Set priority and enable interrupt. */
ICU.SLIBXR128.BYTE = 3; /* Three is TMR0 compare match A. */
IPR( PERIB, INTB128 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
IEN( PERIB, INTB128 ) = 1;
/* Ensure that the flag is set to 0, otherwise the interrupt will not be
@ -155,8 +138,8 @@ void vInitialiseTimerForIntQueueTest( void )
IR( PERIB, INTB128 ) = 0;
/* Do the same for TMR2, but to vector 129. */
ICU.SLIBXR129.BYTE = 9; /* Nine is TMR2 compare match A. */
IPR( PERIB, INTB129 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2;
ICU.SLIBXR129.BYTE = 9; /* Nine is TMR2 compare match A. */
IPR( PERIB, INTB129 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2;
IEN( PERIB, INTB129 ) = 1;
IR( PERIB, INTB129 ) = 0;
}
@ -164,25 +147,49 @@ void vInitialiseTimerForIntQueueTest( void )
}
/*-----------------------------------------------------------*/
/* On vector 128. */
void vIntQTimerISR0( void )
{
/* Enable interrupts to allow interrupt nesting. */
__asm volatile( "setpsw i" );
#ifdef __GNUC__
void vIntQTimerISR0( void ) __attribute__ ((interrupt));
void vIntQTimerISR1( void ) __attribute__ ((interrupt));
void vIntQTimerISR0( void )
{
/* Enable interrupts to allow interrupt nesting. */
__asm volatile( "setpsw i" );
portYIELD_FROM_ISR( xFirstTimerHandler() );
}
/*-----------------------------------------------------------*/
void vIntQTimerISR1( void )
{
/* Enable interrupts to allow interrupt nesting. */
__asm volatile( "setpsw i" );
portYIELD_FROM_ISR( xSecondTimerHandler() );
}
#endif /* __GNUC__ */
/*-----------------------------------------------------------*/
#ifdef __ICCRX__
#pragma vector = VECT_PERIB_INTB128
__interrupt void vT0_1InterruptHandler( void )
{
__enable_interrupt();
portYIELD_FROM_ISR( xFirstTimerHandler() );
}
/*-----------------------------------------------------------*/
/* On vector 129. */
void vIntQTimerISR1( void )
#pragma vector = VECT_PERIB_INTB129
__interrupt void vT2_3InterruptHandler( void )
{
/* Enable interrupts to allow interrupt nesting. */
__asm volatile( "setpsw i" );
__enable_interrupt();
portYIELD_FROM_ISR( xSecondTimerHandler() );
}
#endif /* __ICCRX__ */

View file

@ -0,0 +1,304 @@
/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
PUBLIC _vRegTest1Implementation
PUBLIC _vRegTest2Implementation
EXTERN _ulRegTest1LoopCounter
EXTERN _ulRegTest2LoopCounter
RSEG CODE:CODE(4)
/* This function is explained in the comments at the top of main.c. */
_vRegTest1Implementation:
;/* Put a known value in the guard byte of the accumulators. */
MOV.L #10, R1
MVTACGU R1, A0
MOV.L #20, R1
MVTACGU R1, A1
/* Put a known value in each register. */
MOV #1, R1
MOV #2, R2
MOV #3, R3
MOV #4, R4
MOV #5, R5
MOV #6, R6
MOV #7, R7
MOV #8, R8
MOV #9, R9
MOV #10, R10
MOV #11, R11
MOV #12, R12
MOV #13, R13
MOV #14, R14
MOV #15, R15
;/* Put a known value in the hi and low of the accumulators. */
MVTACHI R1, A0
MVTACLO R2, A0
MVTACHI R3, A1
MVTACLO R4, A1
/* Loop, checking each itteration that each register still contains the
expected value. */
TestLoop1:
/* Push the registers that are going to get clobbered. */
PUSHM R14-R15
/* Increment the loop counter to show this task is still getting CPU time. */
MOV #_ulRegTest1LoopCounter, R14
MOV [ R14 ], R15
ADD #1, R15
MOV R15, [ R14 ]
/* Yield to extend the text coverage. Set the bit in the ITU SWINTR register. */
MOV #1, R14
MOV #0872E0H, R15
MOV.B R14, [R15]
NOP
NOP
;/* Check accumulators. */
MVFACHI #0, A0, R15
CMP #1, R15
BNE RegTest1Error
MVFACLO #0, A0, R15
CMP #2, R15
BNE RegTest1Error
MVFACGU #0, A0, R15
CMP #10, R15
BNE RegTest1Error
MVFACHI #0, A1, R15
CMP #3, R15
BNE RegTest1Error
MVFACLO #0, A1, R15
CMP #4, R15
BNE RegTest1Error
MVFACGU #0, A1, R15
CMP #20, R15
BNE RegTest1Error
/* Restore the clobbered registers. */
POPM R14-R15
/* Now compare each register to ensure it still contains the value that was
set before this loop was entered. */
CMP #1, R1
BNE RegTest1Error
CMP #2, R2
BNE RegTest1Error
CMP #3, R3
BNE RegTest1Error
CMP #4, R4
BNE RegTest1Error
CMP #5, R5
BNE RegTest1Error
CMP #6, R6
BNE RegTest1Error
CMP #7, R7
BNE RegTest1Error
CMP #8, R8
BNE RegTest1Error
CMP #9, R9
BNE RegTest1Error
CMP #10, R10
BNE RegTest1Error
CMP #11, R11
BNE RegTest1Error
CMP #12, R12
BNE RegTest1Error
CMP #13, R13
BNE RegTest1Error
CMP #14, R14
BNE RegTest1Error
CMP #15, R15
BNE RegTest1Error
/* All comparisons passed, start a new itteratio of this loop. */
BRA TestLoop1
RegTest1Error:
/* A compare failed, just loop here so the loop counter stops incrementing
- causing the check task to indicate the error. */
BRA RegTest1Error
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of main.c. */
_vRegTest2Implementation:
;/* Put a known value in the guard byte of the accumulators. */
MOV.L #1H, R1
MVTACGU R1, A0
MOV.L #2H, R1
MVTACGU R1, A1
/* Put a known value in each register. */
MOV #10H, R1
MOV #20H, R2
MOV #30H, R3
MOV #40H, R4
MOV #50H, R5
MOV #60H, R6
MOV #70H, R7
MOV #80H, R8
MOV #90H, R9
MOV #100H, R10
MOV #110H, R11
MOV #120H, R12
MOV #130H, R13
MOV #140H, R14
MOV #150H, R15
;/* Put a known value in the hi and low of the accumulators. */
MVTACHI R1, A0
MVTACLO R2, A0
MVTACHI R3, A1
MVTACLO R4, A1
/* Loop, checking each itteration that each register still contains the
expected value. */
TestLoop2:
/* Push the registers that are going to get clobbered. */
PUSHM R14-R15
/* Increment the loop counter to show this task is still getting CPU time. */
MOV #_ulRegTest2LoopCounter, R14
MOV [ R14 ], R15
ADD #1, R15
MOV R15, [ R14 ]
;/* Check accumulators. */
MVFACHI #0, A0, R15
CMP #10H, R15
BNE RegTest1Error
MVFACLO #0, A0, R15
CMP #20H, R15
BNE RegTest1Error
MVFACGU #0, A0, R15
CMP #1H, R15
BNE RegTest1Error
MVFACHI #0, A1, R15
CMP #30H, R15
BNE RegTest1Error
MVFACLO #0, A1, R15
CMP #40H, R15
BNE RegTest1Error
MVFACGU #0, A1, R15
CMP #2H, R15
BNE RegTest1Error
/* Restore the clobbered registers. */
POPM R14-R15
/* Now compare each register to ensure it still contains the value that was
set before this loop was entered. */
CMP #10H, R1
BNE RegTest2Error
CMP #20H, R2
BNE RegTest2Error
CMP #30H, R3
BNE RegTest2Error
CMP #40H, R4
BNE RegTest2Error
CMP #50H, R5
BNE RegTest2Error
CMP #60H, R6
BNE RegTest2Error
CMP #70H, R7
BNE RegTest2Error
CMP #80H, R8
BNE RegTest2Error
CMP #90H, R9
BNE RegTest2Error
CMP #100H, R10
BNE RegTest2Error
CMP #110H, R11
BNE RegTest2Error
CMP #120H, R12
BNE RegTest2Error
CMP #130H, R13
BNE RegTest2Error
CMP #140H, R14
BNE RegTest2Error
CMP #150H, R15
BNE RegTest2Error
/* All comparisons passed, start a new itteratio of this loop. */
BRA TestLoop2
RegTest2Error:
/* A compare failed, just loop here so the loop counter stops incrementing
- causing the check task to indicate the error. */
BRA RegTest2Error
END

View file

@ -0,0 +1,86 @@
/*
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
All rights reserved
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
***************************************************************************
>>! NOTE: The modification to the GPL is included to allow you to !<<
>>! distribute a combined work that includes FreeRTOS without being !<<
>>! obliged to provide the source code for proprietary components !<<
>>! outside of the FreeRTOS kernel. !<<
***************************************************************************
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. Full license text is available on the following
link: http://www.freertos.org/a00114.html
***************************************************************************
* *
* FreeRTOS provides completely free yet professionally developed, *
* robust, strictly quality controlled, supported, and cross *
* platform software that is more than just the market leader, it *
* is the industry's de facto standard. *
* *
* Help yourself get started quickly while simultaneously helping *
* to support the FreeRTOS project by purchasing a FreeRTOS *
* tutorial book, reference manual, or both: *
* http://www.FreeRTOS.org/Documentation *
* *
***************************************************************************
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
the FAQ page "My application does not run, what could be wrong?". Have you
defined configASSERT()?
http://www.FreeRTOS.org/support - In return for receiving this top quality
embedded software for free we request you assist our global community by
participating in the support forum.
http://www.FreeRTOS.org/training - Investing in training allows your team to
be as productive as possible as early as possible. Now you can receive
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
Ltd, and the world's leading authority on the world's leading RTOS.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
compatible FAT file system, and our tiny thread aware UDP/IP stack.
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
licenses offer ticketed support, indemnification and commercial middleware.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
1 tab == 4 spaces!
*/
#ifndef PRIORITY_DEFINITIONS_H
#define PRIORITY_DEFINITIONS_H
#ifndef __IASMRX__
#error This file is only intended to be included from the FreeRTOS IAR port layer assembly file.
#endif
/* The interrupt priority used by the kernel itself for the tick interrupt and
the pended interrupt. This would normally be the lowest priority. */
#define configKERNEL_INTERRUPT_PRIORITY 1
/* The maximum interrupt priority from which FreeRTOS API calls can be made.
Interrupts that use a priority above this will not be effected by anything the
kernel is doing. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
#endif /* PRIORITY_DEFINITIONS_H */

View file

@ -2,15 +2,15 @@
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
@ -30,8 +30,14 @@
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "../iodefine.h"
//_RB_#include <machine.h>
#ifdef __ICCRX__
#include <iorx71m.h>
#include <machine.h>
#endif
#ifdef __GNUC__
#include "iodefine.h"
#endif
/***********************************************************************************************************************
Macro definitions (Register bit)
@ -66,7 +72,7 @@ Macro definitions
Typedef definitions
***********************************************************************************************************************/
#ifndef __TYPEDEF__
#ifndef _STD_USING_INT_TYPES
#if !defined( _STD_USING_INT_TYPES ) && !defined( _STDINT )
#define _SYS_INT_TYPES_H
#ifndef _STD_USING_BIT_TYPES
#ifndef __int8_t_defined

View file

@ -2,15 +2,15 @@
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
* applicable laws, including copyright laws.
* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
@ -78,11 +78,11 @@ void R_SCI7_Create(void)
SCI7.SPMR.BYTE = _00_SCI_RTS | _00_SCI_CLOCK_NOT_INVERTED | _00_SCI_CLOCK_NOT_DELAYED;
/* Set control registers */
SCI7.SMR.BYTE = _00_SCI_CLOCK_PCLK | _00_SCI_STOP_1 | _00_SCI_PARITY_EVEN | _00_SCI_PARITY_DISABLE |
SCI7.SMR.BYTE = _00_SCI_CLOCK_PCLK | _00_SCI_STOP_1 | _00_SCI_PARITY_EVEN | _00_SCI_PARITY_DISABLE |
_00_SCI_DATA_LENGTH_8 | _00_SCI_MULTI_PROCESSOR_DISABLE | _00_SCI_ASYNCHRONOUS_MODE;
SCI7.SCMR.BYTE = _00_SCI_SERIAL_MODE | _00_SCI_DATA_INVERT_NONE | _00_SCI_DATA_LSB_FIRST |
SCI7.SCMR.BYTE = _00_SCI_SERIAL_MODE | _00_SCI_DATA_INVERT_NONE | _00_SCI_DATA_LSB_FIRST |
_10_SCI_DATA_LENGTH_8_OR_7 | _62_SCI_SCMR_DEFAULT;
SCI7.SEMR.BYTE = _80_SCI_FALLING_EDGE_START_BIT | _00_SCI_NOISE_FILTER_DISABLE | _10_SCI_8_BASE_CLOCK |
SCI7.SEMR.BYTE = _80_SCI_FALLING_EDGE_START_BIT | _00_SCI_NOISE_FILTER_DISABLE | _10_SCI_8_BASE_CLOCK |
_00_SCI_BAUDRATE_SINGLE | _00_SCI_BIT_MODULATION_DISABLE;
/* Set bitrate */

View file

@ -0,0 +1,241 @@
/*Adapted for IAR Embedded Workbench*/
/***********************************************************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
*
* Copyright (C) 2013, 2014 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : r_cg_sci_user.c
* Version : Code Generator for RX64M V1.00.01.01 [09 May 2014]
* Device(s) : R5F571MLCxFC
* Tool-Chain : IAR Embedded Workbench
* Description : This file implements device driver for SCI module.
* Creation Date: 30/06/2014
***********************************************************************************************************************/
/***********************************************************************************************************************
Pragma directive
***********************************************************************************************************************/
/* Start user code for pragma. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
Includes
***********************************************************************************************************************/
#include "r_cg_macrodriver.h"
#include "r_cg_sci.h"
/* Start user code for include. Do not edit comment generated here */
#include "rskrx71mdef.h"
//_RB_#include "r_cg_cmt.h"
/* End user code. Do not edit comment generated here */
#include "r_cg_userdefine.h"
/***********************************************************************************************************************
Global variables and functions
***********************************************************************************************************************/
extern uint8_t * gp_sci7_tx_address; /* SCI7 send buffer address */
extern uint16_t g_sci7_tx_count; /* SCI7 send data number */
extern uint8_t * gp_sci7_rx_address; /* SCI7 receive buffer address */
extern uint16_t g_sci7_rx_count; /* SCI7 receive data number */
extern uint16_t g_sci7_rx_length; /* SCI7 receive data length */
/* Start user code for global. Do not edit comment generated here */
/* Global used to receive a character from the PC terminal */
uint8_t g_rx_char;
/* Flag used to control transmission to PC terminal */
volatile uint8_t g_tx_flag = FALSE;
/* Flag used locally to detect transmission complete */
static volatile uint8_t sci7_txdone;
/* End user code. Do not edit comment generated here */
/***********************************************************************************************************************
* Function Name: r_sci7_transmit_interrupt
* Description : None
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
#pragma vector=VECT(SCI7,TXI7)
__interrupt static void r_sci7_transmit_interrupt(void)
{
if (g_sci7_tx_count > 0U)
{
SCI7.TDR = *gp_sci7_tx_address;
gp_sci7_tx_address++;
g_sci7_tx_count--;
}
else
{
SCI7.SCR.BIT.TIE = 0U;
SCI7.SCR.BIT.TEIE = 1U;
}
}
/***********************************************************************************************************************
* Function Name: r_sci7_transmitend_interrupt
* Description : This function is TEI7 interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void r_sci7_transmitend_interrupt(void)
{
MPC.P90PFS.BYTE = 0x00U;
PORT9.PMR.BYTE &= 0xFEU;
SCI7.SCR.BIT.TIE = 0U;
SCI7.SCR.BIT.TE = 0U;
SCI7.SCR.BIT.TEIE = 0U;
r_sci7_callback_transmitend();
}
/***********************************************************************************************************************
* Function Name: r_sci7_receive_interrupt
* Description : None
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
#pragma vector=VECT(SCI7,RXI7)
__interrupt static void r_sci7_receive_interrupt(void)
{
if (g_sci7_rx_length > g_sci7_rx_count)
{
*gp_sci7_rx_address = SCI7.RDR;
gp_sci7_rx_address++;
g_sci7_rx_count++;
if (g_sci7_rx_length <= g_sci7_rx_count)
{
r_sci7_callback_receiveend();
}
}
}
/***********************************************************************************************************************
* Function Name: r_sci7_receiveerror_interrupt
* Description : This function is ERI7 interrupt service routine.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
void r_sci7_receiveerror_interrupt(void)
{
uint8_t err_type;
r_sci7_callback_receiveerror();
/* Clear overrun, framing and parity error flags */
err_type = SCI7.SSR.BYTE;
err_type &= 0xC7U;
err_type |= 0xC0U;
SCI7.SSR.BYTE = err_type;
}
/***********************************************************************************************************************
* Function Name: r_sci7_callback_transmitend
* Description : This function is a callback function when SCI7 finishes transmission.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void r_sci7_callback_transmitend(void)
{
/* Start user code. Do not edit comment generated here */
sci7_txdone = TRUE;
/* End user code. Do not edit comment generated here */
}
/***********************************************************************************************************************
* Function Name: r_sci7_callback_receiveend
* Description : This function is a callback function when SCI7 finishes reception.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void r_sci7_callback_receiveend(void)
{
/* Start user code. Do not edit comment generated here */
/* Check the contents of g_rx_char */
if ('z' == g_rx_char)
{
/* Stop the timer used to control transmission to PC terminal*/
// R_CMT1_Stop();
/* Turn off LED0 and turn on LED1 to indicate serial transmission
inactive */
LED0 = LED_OFF;
LED1 = LED_ON;
}
else
{
/* Start the timer used to control transmission to PC terminal*/
//_RB_ R_CMT1_Start();
/* Turn on LED0 and turn off LED1 to indicate serial transmission
active */
LED0 = LED_ON;
LED1 = LED_OFF;
}
/* Set up SCI7 receive buffer again */
R_SCI7_Serial_Receive((uint8_t *)&g_rx_char, 1);
/* End user code. Do not edit comment generated here */
}
/***********************************************************************************************************************
* Function Name: r_sci7_callback_receiveerror
* Description : This function is a callback function when SCI7 reception encounters error.
* Arguments : None
* Return Value : None
***********************************************************************************************************************/
static void r_sci7_callback_receiveerror(void)
{
/* Start user code. Do not edit comment generated here */
/* End user code. Do not edit comment generated here */
}
/***********************************************************************************************************************
* Function Name: R_SCI7_AsyncTransmit
* Description : This function sends SCI7 data and waits for the transmit end flag.
* Arguments : tx_buf -
* transfer buffer pointer
* tx_num -
* buffer size
* Return Value : status -
* MD_OK or MD_ARGERROR
***********************************************************************************************************************/
MD_STATUS R_SCI7_AsyncTransmit (uint8_t * const tx_buf, const uint16_t tx_num)
{
MD_STATUS status = MD_OK;
/* clear the flag before initiating a new transmission */
sci7_txdone = FALSE;
/* Send the data using the API */
status = R_SCI7_Serial_Send(tx_buf, tx_num);
/* Wait for the transmit end flag */
while (FALSE == sci7_txdone)
{
/* Wait */
}
return (status);
}
/***********************************************************************************************************************
* End of function R_SCI7_AsyncTransmit
***********************************************************************************************************************/
/* End user code. Do not edit comment generated here */

View file

@ -248,6 +248,23 @@ const uint32_t ulEnableRegisterWrite = 0xA50BUL, ulDisableRegisterWrite = 0xA500
/* Reneable register protection. */
SYSTEM.PRCR.WORD = ulDisableRegisterWrite;
}
/*-----------------------------------------------------------*/
#ifdef __ICCRX__
#include <intrinsics.h>
/* Called from the C start up code when compiled with IAR. */
#pragma diag_suppress = Pm011
int __low_level_init(void)
#pragma diag_default = Pm011
{
extern void R_Systeminit( void );
__disable_interrupt();
R_Systeminit();
return (int)(1U);
}
#endif /* __ICCRX__ */