mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-02 12:24:07 -04:00
FreeRTOS source:
+ Added Renesas RXv2 port for IAR. Demo apps: + Demo/Rename the CORTEX_R4F_T_GCC_IAR_ARM directory to just Rename the CORTEX_R4F_T_GCC_IAR. + Add IAR project for the RX113. + Add RX231 e2studio projects for the RX231.
This commit is contained in:
Richard Barry
parent
27ff871a37
commit
87243e4a16
225 changed files with 427176 additions and 220 deletions
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@ -0,0 +1,230 @@
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/*
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FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
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||||
All rights reserved
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||||
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||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
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||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
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||||
|
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1 tab == 4 spaces!
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*/
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/******************************************************************************
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* NOTE 1: This project provides two demo applications. A simple blinky style
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* project, and a more comprehensive test and demo application. The
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* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select
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* between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY
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* in main.c. This file implements the simply blinky style version.
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*
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* NOTE 2: This file only contains the source code that is specific to the
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* basic demo. Generic functions, such FreeRTOS hook functions, and functions
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* required to configure the hardware are defined in main.c.
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******************************************************************************
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*
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* main_blinky() creates one queue, and two tasks. It then starts the
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* scheduler.
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*
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* The Queue Send Task:
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* The queue send task is implemented by the prvQueueSendTask() function in
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* this file. prvQueueSendTask() sits in a loop that causes it to repeatedly
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* block for 200 milliseconds, before sending the value 100 to the queue that
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* was created within main_blinky(). Once the value is sent, the task loops
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* back around to block for another 200 milliseconds...and so on.
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*
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* The Queue Receive Task:
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* The queue receive task is implemented by the prvQueueReceiveTask() function
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* in this file. prvQueueReceiveTask() sits in a loop where it repeatedly
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* blocks on attempts to read data from the queue that was created within
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* main_blinky(). When data is received, the task checks the value of the
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* data, and if the value equals the expected 100, toggles an LED. The 'block
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* time' parameter passed to the queue receive function specifies that the
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* task should be held in the Blocked state indefinitely to wait for data to
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* be available on the queue. The queue receive task will only leave the
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* Blocked state when the queue send task writes to the queue. As the queue
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* send task writes to the queue every 200 milliseconds, the queue receive
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* task leaves the Blocked state every 200 milliseconds, and therefore toggles
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* the LED every 200 milliseconds.
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*/
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/* Kernel includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#include "semphr.h"
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/* Priorities at which the tasks are created. */
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#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
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#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
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/* The rate at which data is sent to the queue. The 200ms value is converted
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to ticks using the portTICK_PERIOD_MS constant. */
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#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_PERIOD_MS )
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/* The number of items the queue can hold. This is 1 as the receive task
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will remove items as they are added, meaning the send task should always find
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the queue empty. */
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#define mainQUEUE_LENGTH ( 1 )
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/*-----------------------------------------------------------*/
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/*
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* Called by main when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1 in
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* main.c.
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*/
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void main_blinky( void );
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/*
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* The tasks as described in the comments at the top of this file.
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*/
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static void prvQueueReceiveTask( void *pvParameters );
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static void prvQueueSendTask( void *pvParameters );
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/*-----------------------------------------------------------*/
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/* The queue used by both tasks. */
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static QueueHandle_t xQueue = NULL;
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/*-----------------------------------------------------------*/
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void main_blinky( void )
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{
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/* Create the queue. */
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xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) );
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if( xQueue != NULL )
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{
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/* Start the two tasks as described in the comments at the top of this
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file. */
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xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
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"Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */
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configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */
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NULL, /* The parameter passed to the task - not used in this case. */
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mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */
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NULL ); /* The task handle is not required, so NULL is passed. */
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xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL );
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/* Start the tasks and timer running. */
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vTaskStartScheduler();
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}
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/* If all is well, the scheduler will now be running, and the following
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line will never be reached. If the following line does execute, then
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there was either insufficient FreeRTOS heap memory available for the idle
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and/or timer tasks to be created, or vTaskStartScheduler() was called from
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User mode. See the memory management section on the FreeRTOS web site for
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more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The
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mode from which main() is called is set in the C start up code and must be
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a privileged mode (not user mode). */
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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static void prvQueueSendTask( void *pvParameters )
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{
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TickType_t xNextWakeTime;
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const unsigned long ulValueToSend = 100UL;
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/* Remove compiler warning about unused parameter. */
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( void ) pvParameters;
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/* Initialise xNextWakeTime - this only needs to be done once. */
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xNextWakeTime = xTaskGetTickCount();
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for( ;; )
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{
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/* Place this task in the blocked state until it is time to run again. */
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vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );
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/* Send to the queue - causing the queue receive task to unblock and
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toggle the LED. 0 is used as the block time so the sending operation
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will not block - it shouldn't need to block as the queue should always
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be empty at this point in the code. */
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xQueueSend( xQueue, &ulValueToSend, 0U );
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}
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}
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/*-----------------------------------------------------------*/
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static void prvQueueReceiveTask( void *pvParameters )
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{
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unsigned long ulReceivedValue;
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const unsigned long ulExpectedValue = 100UL;
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/* Remove compiler warning about unused parameter. */
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( void ) pvParameters;
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for( ;; )
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{
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/* Wait until something arrives in the queue - this task will block
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indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
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FreeRTOSConfig.h. */
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xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
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/* To get here something must have been received from the queue, but
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is it the expected value? If it is, toggle the LED. */
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if( ulReceivedValue == ulExpectedValue )
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{
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//_RB_ LED0 = !LED0;
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ulReceivedValue = 0U;
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}
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}
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}
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/*-----------------------------------------------------------*/
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|
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@ -0,0 +1,182 @@
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/*
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||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/* Renesas hardware definition header. */
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#include "iodefine.h"
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
|
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* These definitions should be adjusted for your particular hardware and
|
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* application requirements.
|
||||
*
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* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
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*
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* See http://www.freertos.org/a00110.html.
|
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*----------------------------------------------------------*/
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#define configUSE_PREEMPTION 1
|
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#define configUSE_IDLE_HOOK 1
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#define configUSE_TICK_HOOK 1
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#define configCPU_CLOCK_HZ ( 52000000UL ) /*_RB_ guess*/
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#define configPERIPHERAL_CLOCK_HZ ( 26000000UL ) /*_RB_ guess*/
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#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
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#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 140 )
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#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 40 * 1024 ) )
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#define configMAX_TASK_NAME_LEN ( 12 )
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#define configUSE_TRACE_FACILITY 1
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
|
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#define configUSE_CO_ROUTINES 0
|
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#define configUSE_MUTEXES 1
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#define configGENERATE_RUN_TIME_STATS 0
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#define configCHECK_FOR_STACK_OVERFLOW 2
|
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#define configUSE_RECURSIVE_MUTEXES 1
|
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#define configQUEUE_REGISTRY_SIZE 0
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#define configUSE_MALLOC_FAILED_HOOK 1
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#define configUSE_APPLICATION_TASK_TAG 0
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#define configUSE_QUEUE_SETS 1
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configMAX_PRIORITIES ( 7 )
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#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
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/* Software timer definitions. */
|
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#define configUSE_TIMERS 1
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#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
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#define configTIMER_QUEUE_LENGTH 5
|
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#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
|
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|
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/* The interrupt priority used by the kernel itself for the tick interrupt and
|
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the pended interrupt. This would normally be the lowest priority. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY 1
|
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|
||||
/* The maximum interrupt priority from which FreeRTOS API calls can be made.
|
||||
Interrupts that use a priority above this will not be effected by anything the
|
||||
kernel is doing. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
|
||||
|
||||
/* The peripheral used to generate the tick interrupt is configured as part of
|
||||
the application code. This constant should be set to the vector number of the
|
||||
peripheral chosen. As supplied this is CMT0. */
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#define configTICK_VECTOR _CMT0_CMI0
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_eTaskGetState 1
|
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#define INCLUDE_xTimerPendFunctionCall 1
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||||
|
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void vAssertCalled( void );
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#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
|
||||
|
||||
/* Override some of the priorities set in the common demo tasks. This is
|
||||
required to ensure flase positive timing errors are not reported. */
|
||||
#define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 )
|
||||
#define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 4 )
|
||||
#define intqHIGHER_PRIORITY ( configMAX_PRIORITIES - 3 )
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Ethernet configuration.
|
||||
*-----------------------------------------------------------*/
|
||||
|
||||
/* MAC address configuration. */
|
||||
#define configMAC_ADDR0 0x00
|
||||
#define configMAC_ADDR1 0x12
|
||||
#define configMAC_ADDR2 0x13
|
||||
#define configMAC_ADDR3 0x10
|
||||
#define configMAC_ADDR4 0x15
|
||||
#define configMAC_ADDR5 0x11
|
||||
|
||||
/* IP address configuration. */
|
||||
#define configIP_ADDR0 192
|
||||
#define configIP_ADDR1 168
|
||||
#define configIP_ADDR2 0
|
||||
#define configIP_ADDR3 200
|
||||
|
||||
/* Netmask configuration. */
|
||||
#define configNET_MASK0 255
|
||||
#define configNET_MASK1 255
|
||||
#define configNET_MASK2 255
|
||||
#define configNET_MASK3 0
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
|
@ -0,0 +1,187 @@
|
|||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file contains the non-portable and therefore RX62N specific parts of
|
||||
* the IntQueue standard demo task - namely the configuration of the timers
|
||||
* that generate the interrupts and the interrupt entry points.
|
||||
*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Demo includes. */
|
||||
#include "IntQueueTimer.h"
|
||||
#include "IntQueue.h"
|
||||
|
||||
#define tmrTIMER_0_1_FREQUENCY ( 2000UL )
|
||||
#define tmrTIMER_2_3_FREQUENCY ( 2111UL )
|
||||
|
||||
void vInitialiseTimerForIntQueueTest( void )
|
||||
{
|
||||
/* Ensure interrupts do not start until full configuration is complete. */
|
||||
portENTER_CRITICAL();
|
||||
{
|
||||
/* Give write access. */
|
||||
SYSTEM.PRCR.WORD = 0xa502;
|
||||
|
||||
/* Cascade two 8bit timer channels to generate the interrupts.
|
||||
8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
|
||||
utilised for this test. */
|
||||
|
||||
/* Enable the timers. */
|
||||
SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
|
||||
SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
|
||||
|
||||
/* Enable compare match A interrupt request. */
|
||||
TMR0.TCR.BIT.CMIEA = 1;
|
||||
TMR2.TCR.BIT.CMIEA = 1;
|
||||
|
||||
/* Clear the timer on compare match A. */
|
||||
TMR0.TCR.BIT.CCLR = 1;
|
||||
TMR2.TCR.BIT.CCLR = 1;
|
||||
|
||||
/* Set the compare match value. */
|
||||
TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
|
||||
TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
|
||||
|
||||
/* 16 bit operation ( count from timer 1,2 ). */
|
||||
TMR0.TCCR.BIT.CSS = 3;
|
||||
TMR2.TCCR.BIT.CSS = 3;
|
||||
|
||||
/* Use PCLK as the input. */
|
||||
TMR1.TCCR.BIT.CSS = 1;
|
||||
TMR3.TCCR.BIT.CSS = 1;
|
||||
|
||||
/* Divide PCLK by 8. */
|
||||
TMR1.TCCR.BIT.CKS = 2;
|
||||
TMR3.TCCR.BIT.CKS = 2;
|
||||
|
||||
/* Enable TMR 0, 2 interrupts. */
|
||||
TMR0.TCR.BIT.CMIEA = 1;
|
||||
TMR2.TCR.BIT.CMIEA = 1;
|
||||
|
||||
/* Set interrupt priority and enable. */
|
||||
IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
|
||||
IR( TMR0, CMIA0 ) = 0U;
|
||||
IEN( TMR0, CMIA0 ) = 1U;
|
||||
|
||||
/* Do the same for TMR2, but to vector 129. */
|
||||
IPR( TMR2, CMIA2 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 2;
|
||||
IR( TMR2, CMIA2 ) = 0U;
|
||||
IEN( TMR2, CMIA2 ) = 1U;
|
||||
}
|
||||
portEXIT_CRITICAL();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#ifdef __GNUC__
|
||||
|
||||
void vIntQTimerISR0( void ) __attribute__ ((interrupt));
|
||||
void vIntQTimerISR1( void ) __attribute__ ((interrupt));
|
||||
|
||||
void vIntQTimerISR0( void )
|
||||
{
|
||||
/* Enable interrupts to allow interrupt nesting. */
|
||||
__asm volatile( "setpsw i" );
|
||||
|
||||
portYIELD_FROM_ISR( xFirstTimerHandler() );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vIntQTimerISR1( void )
|
||||
{
|
||||
/* Enable interrupts to allow interrupt nesting. */
|
||||
__asm volatile( "setpsw i" );
|
||||
|
||||
portYIELD_FROM_ISR( xSecondTimerHandler() );
|
||||
}
|
||||
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
#ifdef __ICCRX__
|
||||
|
||||
#pragma vector = VECT_TMR0_CMIA0
|
||||
__interrupt void vT0_1InterruptHandler( void )
|
||||
{
|
||||
__enable_interrupt();
|
||||
portYIELD_FROM_ISR( xFirstTimerHandler() );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#pragma vector = VECT_TMR2_CMIA2
|
||||
__interrupt void vT2_3InterruptHandler( void )
|
||||
{
|
||||
__enable_interrupt();
|
||||
portYIELD_FROM_ISR( xSecondTimerHandler() );
|
||||
}
|
||||
|
||||
#endif /* __ICCRX__ */
|
||||
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef INT_QUEUE_TIMER_H
|
||||
#define INT_QUEUE_TIMER_H
|
||||
|
||||
void vInitialiseTimerForIntQueueTest( void );
|
||||
portBASE_TYPE xTimer0Handler( void );
|
||||
portBASE_TYPE xTimer1Handler( void );
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,235 @@
|
|||
;/*
|
||||
; FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
; All rights reserved
|
||||
;
|
||||
; VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * *
|
||||
; * FreeRTOS provides completely free yet professionally developed, *
|
||||
; * robust, strictly quality controlled, supported, and cross *
|
||||
; * platform software that has become a de facto standard. *
|
||||
; * *
|
||||
; * Help yourself get started quickly and support the FreeRTOS *
|
||||
; * project by purchasing a FreeRTOS tutorial book, reference *
|
||||
; * manual, or both from: http://www.FreeRTOS.org/Documentation *
|
||||
; * *
|
||||
; * Thank you! *
|
||||
; * *
|
||||
; ***************************************************************************
|
||||
;
|
||||
; This file is part of the FreeRTOS distribution.
|
||||
;
|
||||
; FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
; the terms of the GNU General Public License (version 2) as published by the
|
||||
; Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
;
|
||||
; >>! NOTE: The modification to the GPL is included to allow you to distribute
|
||||
; >>! a combined work that includes FreeRTOS without being obliged to provide
|
||||
; >>! the source code for proprietary components outside of the FreeRTOS
|
||||
; >>! kernel.
|
||||
;
|
||||
; FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
; WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
; FOR A PARTICULAR PURPOSE. Full license text is available from the following
|
||||
; link: http://www.freertos.org/a00114.html
|
||||
;
|
||||
; 1 tab == 4 spaces!
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * *
|
||||
; * Having a problem? Start by reading the FAQ "My application does *
|
||||
; * not run, what could be wrong?" *
|
||||
; * *
|
||||
; * http://www.FreeRTOS.org/FAQHelp.html *
|
||||
; * *
|
||||
; ***************************************************************************
|
||||
;
|
||||
; http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
; license and Real Time Engineers Ltd. contact details.;
|
||||
;
|
||||
; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
; including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
; compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
;
|
||||
; http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
; Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
; licenses offer ticketed support, indemnification and middleware.
|
||||
;
|
||||
; http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
; engineered and independently SIL3 certified version for use in safety and
|
||||
; mission critical applications that require provable dependability.
|
||||
;
|
||||
; 1 tab == 4 spaces!
|
||||
;*/
|
||||
|
||||
.global _vRegTest1Implementation
|
||||
.global _vRegTest2Implementation
|
||||
|
||||
.extern _ulRegTest1LoopCounter
|
||||
.extern _ulRegTest2LoopCounter
|
||||
|
||||
.text
|
||||
|
||||
|
||||
;/* This function is explained in the comments at the top of main.c. */
|
||||
_vRegTest1Implementation:
|
||||
|
||||
; Put a known value in each register.
|
||||
MOV.L #1, R1
|
||||
MOV.L #2, R2
|
||||
MOV.L #3, R3
|
||||
MOV.L #4, R4
|
||||
MOV.L #5, R5
|
||||
MOV.L #6, R6
|
||||
MOV.L #7, R7
|
||||
MOV.L #8, R8
|
||||
MOV.L #9, R9
|
||||
MOV.L #10, R10
|
||||
MOV.L #11, R11
|
||||
MOV.L #12, R12
|
||||
MOV.L #13, R13
|
||||
MOV.L #14, R14
|
||||
MOV.L #15, R15
|
||||
|
||||
; Loop, checking each itteration that each register still contains the
|
||||
; expected value.
|
||||
TestLoop1:
|
||||
|
||||
; Push the registers that are going to get clobbered.
|
||||
PUSHM R14-R15
|
||||
|
||||
; Increment the loop counter to show this task is still getting CPU time.
|
||||
MOV.L #_ulRegTest1LoopCounter, R14
|
||||
MOV.L [ R14 ], R15
|
||||
ADD #1, R15
|
||||
MOV.L R15, [ R14 ]
|
||||
|
||||
; Yield to extend the text coverage. Set the bit in the ITU SWINTR register.
|
||||
MOV.L #1, R14
|
||||
MOV.L #0872E0H, R15
|
||||
MOV.B R14, [R15]
|
||||
NOP
|
||||
NOP
|
||||
|
||||
; Restore the clobbered registers.
|
||||
POPM R14-R15
|
||||
|
||||
; Now compare each register to ensure it still contains the value that was
|
||||
; set before this loop was entered.
|
||||
CMP #1, R1
|
||||
BNE RegTest1Error
|
||||
CMP #2, R2
|
||||
BNE RegTest1Error
|
||||
CMP #3, R3
|
||||
BNE RegTest1Error
|
||||
CMP #4, R4
|
||||
BNE RegTest1Error
|
||||
CMP #5, R5
|
||||
BNE RegTest1Error
|
||||
CMP #6, R6
|
||||
BNE RegTest1Error
|
||||
CMP #7, R7
|
||||
BNE RegTest1Error
|
||||
CMP #8, R8
|
||||
BNE RegTest1Error
|
||||
CMP #9, R9
|
||||
BNE RegTest1Error
|
||||
CMP #10, R10
|
||||
BNE RegTest1Error
|
||||
CMP #11, R11
|
||||
BNE RegTest1Error
|
||||
CMP #12, R12
|
||||
BNE RegTest1Error
|
||||
CMP #13, R13
|
||||
BNE RegTest1Error
|
||||
CMP #14, R14
|
||||
BNE RegTest1Error
|
||||
CMP #15, R15
|
||||
BNE RegTest1Error
|
||||
|
||||
; All comparisons passed, start a new itteratio of this loop.
|
||||
BRA TestLoop1
|
||||
|
||||
RegTest1Error:
|
||||
; A compare failed, just loop here so the loop counter stops incrementing
|
||||
; causing the check task to indicate the error.
|
||||
BRA RegTest1Error
|
||||
;/*-----------------------------------------------------------*/
|
||||
|
||||
;/* This function is explained in the comments at the top of main.c. */
|
||||
_vRegTest2Implementation:
|
||||
|
||||
; Put a known value in each register.
|
||||
MOV.L #10, R1
|
||||
MOV.L #20, R2
|
||||
MOV.L #30, R3
|
||||
MOV.L #40, R4
|
||||
MOV.L #50, R5
|
||||
MOV.L #60, R6
|
||||
MOV.L #70, R7
|
||||
MOV.L #80, R8
|
||||
MOV.L #90, R9
|
||||
MOV.L #100, R10
|
||||
MOV.L #110, R11
|
||||
MOV.L #120, R12
|
||||
MOV.L #130, R13
|
||||
MOV.L #140, R14
|
||||
MOV.L #150, R15
|
||||
|
||||
; Loop, checking on each itteration that each register still contains the
|
||||
; expected value.
|
||||
TestLoop2:
|
||||
|
||||
; Push the registers that are going to get clobbered.
|
||||
PUSHM R14-R15
|
||||
|
||||
; Increment the loop counter to show this task is still getting CPU time.
|
||||
MOV.L #_ulRegTest2LoopCounter, R14
|
||||
MOV.L [ R14 ], R15
|
||||
ADD #1, R15
|
||||
MOV.L R15, [ R14 ]
|
||||
|
||||
; Restore the clobbered registers.
|
||||
POPM R14-R15
|
||||
|
||||
CMP #10, R1
|
||||
BNE RegTest2Error
|
||||
CMP #20, R2
|
||||
BNE RegTest2Error
|
||||
CMP #30, R3
|
||||
BNE RegTest2Error
|
||||
CMP #40, R4
|
||||
BNE RegTest2Error
|
||||
CMP #50, R5
|
||||
BNE RegTest2Error
|
||||
CMP #60, R6
|
||||
BNE RegTest2Error
|
||||
CMP #70, R7
|
||||
BNE RegTest2Error
|
||||
CMP #80, R8
|
||||
BNE RegTest2Error
|
||||
CMP #90, R9
|
||||
BNE RegTest2Error
|
||||
CMP #100, R10
|
||||
BNE RegTest2Error
|
||||
CMP #110, R11
|
||||
BNE RegTest2Error
|
||||
CMP #120, R12
|
||||
BNE RegTest2Error
|
||||
CMP #130, R13
|
||||
BNE RegTest2Error
|
||||
CMP #140, R14
|
||||
BNE RegTest2Error
|
||||
CMP #150, R15
|
||||
BNE RegTest2Error
|
||||
|
||||
; All comparisons passed, start a new itteratio of this loop.
|
||||
BRA TestLoop2
|
||||
|
||||
RegTest2Error:
|
||||
; A compare failed, just loop here so the loop counter stops incrementing
|
||||
; - causing the check task to indicate the error.
|
||||
BRA RegTest2Error
|
||||
|
||||
.END
|
||||
|
|
@ -0,0 +1,499 @@
|
|||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* NOTE 1: This project provides two demo applications. A simple blinky
|
||||
* style project, and a more comprehensive test and demo application. The
|
||||
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to
|
||||
* select between the two. See the notes on using
|
||||
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY in main.c. This file implements the
|
||||
* comprehensive version.
|
||||
*
|
||||
* NOTE 2: This file only contains the source code that is specific to the
|
||||
* full demo. Generic functions, such FreeRTOS hook functions, and functions
|
||||
* required to configure the hardware, are defined in main.c.
|
||||
*
|
||||
******************************************************************************
|
||||
*
|
||||
* main_full() creates all the demo application tasks and software timers, then
|
||||
* starts the scheduler. The web documentation provides more details of the
|
||||
* standard demo application tasks, which provide no particular functionality,
|
||||
* but do provide a good example of how to use the FreeRTOS API.
|
||||
*
|
||||
* In addition to the standard demo tasks, the following tasks and tests are
|
||||
* defined and/or created within this file:
|
||||
*
|
||||
* "Reg test" tasks - These fill both the core and floating point registers with
|
||||
* known values, then check that each register maintains its expected value for
|
||||
* the lifetime of the task. Each task uses a different set of values. The reg
|
||||
* test tasks execute with a very low priority, so get preempted very
|
||||
* frequently. A register containing an unexpected value is indicative of an
|
||||
* error in the context switching mechanism.
|
||||
*
|
||||
* "Check" task - The check task period is initially set to three seconds. The
|
||||
* task checks that all the standard demo tasks, and the register check tasks,
|
||||
* are not only still executing, but are executing without reporting any errors.
|
||||
* If the check task discovers that a task has either stalled, or reported an
|
||||
* error, then it changes its own execution period from the initial three
|
||||
* seconds, to just 200ms. The check task also toggles an LED each time it is
|
||||
* called. This provides a visual indication of the system status: If the LED
|
||||
* toggles every three seconds, then no issues have been discovered. If the LED
|
||||
* toggles every 200ms, then an issue has been discovered with at least one
|
||||
* task.
|
||||
*/
|
||||
|
||||
/* Standard includes. */
|
||||
#include <stdio.h>
|
||||
|
||||
/* Kernel includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "timers.h"
|
||||
#include "semphr.h"
|
||||
|
||||
/* Standard demo application includes. */
|
||||
#include "flop.h"
|
||||
#include "semtest.h"
|
||||
#include "dynamic.h"
|
||||
#include "BlockQ.h"
|
||||
#include "blocktim.h"
|
||||
#include "countsem.h"
|
||||
#include "GenQTest.h"
|
||||
#include "recmutex.h"
|
||||
#include "death.h"
|
||||
#include "partest.h"
|
||||
#include "comtest2.h"
|
||||
#include "serial.h"
|
||||
#include "TimerDemo.h"
|
||||
#include "QueueOverwrite.h"
|
||||
#include "IntQueue.h"
|
||||
#include "EventGroupsDemo.h"
|
||||
#include "TaskNotify.h"
|
||||
#include "IntSemTest.h"
|
||||
|
||||
/* Priorities for the demo application tasks. */
|
||||
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )
|
||||
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )
|
||||
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )
|
||||
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
|
||||
#define mainUART_COMMAND_CONSOLE_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3UL )
|
||||
#define mainCOM_TEST_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
|
||||
#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY )
|
||||
|
||||
/* The priority used by the UART command console task. */
|
||||
#define mainUART_COMMAND_CONSOLE_TASK_PRIORITY ( configMAX_PRIORITIES - 2 )
|
||||
|
||||
/* A block time of zero simply means "don't block". */
|
||||
#define mainDONT_BLOCK ( 0UL )
|
||||
|
||||
/* The period after which the check timer will expire, in ms, provided no errors
|
||||
have been reported by any of the standard demo tasks. ms are converted to the
|
||||
equivalent in ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainNO_ERROR_CHECK_TASK_PERIOD ( 3000UL / portTICK_PERIOD_MS )
|
||||
|
||||
/* The period at which the check timer will expire, in ms, if an error has been
|
||||
reported in one of the standard demo tasks. ms are converted to the equivalent
|
||||
in ticks using the portTICK_PERIOD_MS constant. */
|
||||
#define mainERROR_CHECK_TASK_PERIOD ( 200UL / portTICK_PERIOD_MS )
|
||||
|
||||
/* Parameters that are passed into the register check tasks solely for the
|
||||
purpose of ensuring parameters are passed into tasks correctly. */
|
||||
#define mainREG_TEST_1_PARAMETER ( ( void * ) 0x12121212UL )
|
||||
#define mainREG_TEST_2_PARAMETER ( ( void * ) 0x12345678UL )
|
||||
|
||||
/* The base period used by the timer test tasks. */
|
||||
#define mainTIMER_TEST_PERIOD ( 50 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Entry point for the comprehensive demo (as opposed to the simple blinky
|
||||
* demo).
|
||||
*/
|
||||
void main_full( void );
|
||||
|
||||
/*
|
||||
* The full demo includes some functionality called from the tick hook.
|
||||
*/
|
||||
void vFullDemoTickHook( void );
|
||||
|
||||
/*
|
||||
* The check task, as described at the top of this file.
|
||||
*/
|
||||
static void prvCheckTask( void *pvParameters );
|
||||
|
||||
/*
|
||||
* Register check tasks, and the tasks used to write over and check the contents
|
||||
* of the registers, as described at the top of this file. The nature of these
|
||||
* files necessitates that they are written in assembly, but the entry points
|
||||
* are kept in the C file for the convenience of checking the task parameter.
|
||||
*/
|
||||
static void prvRegTest1Task( void *pvParameters );
|
||||
static void prvRegTest2Task( void *pvParameters );
|
||||
void vRegTest1Implementation( void );
|
||||
void vRegTest2Implementation( void );
|
||||
|
||||
/*
|
||||
* A high priority task that does nothing other than execute at a pseudo random
|
||||
* time to ensure the other test tasks don't just execute in a repeating
|
||||
* pattern.
|
||||
*/
|
||||
static void prvPseudoRandomiser( void *pvParameters );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The following two variables are used to communicate the status of the
|
||||
register check tasks to the check task. If the variables keep incrementing,
|
||||
then the register check tasks have not discovered any errors. If a variable
|
||||
stops incrementing, then an error has been found. */
|
||||
volatile unsigned long ulRegTest1LoopCounter = 0UL, ulRegTest2LoopCounter = 0UL;
|
||||
|
||||
/* String for display in the web server. It is set to an error message if the
|
||||
check task detects an error. */
|
||||
const char *pcStatusMessage = "All tasks running without error";
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void main_full( void )
|
||||
{
|
||||
/* Start all the other standard demo/test tasks. They have no particular
|
||||
functionality, but do demonstrate how to use the FreeRTOS API and test the
|
||||
kernel port. */
|
||||
vStartInterruptQueueTasks();
|
||||
vStartDynamicPriorityTasks();
|
||||
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
|
||||
vCreateBlockTimeTasks();
|
||||
vStartCountingSemaphoreTasks();
|
||||
vStartGenericQueueTasks( tskIDLE_PRIORITY );
|
||||
vStartRecursiveMutexTasks();
|
||||
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
|
||||
vStartMathTasks( mainFLOP_TASK_PRIORITY );
|
||||
vStartTimerDemoTask( mainTIMER_TEST_PERIOD );
|
||||
vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY );
|
||||
vStartEventGroupTasks();
|
||||
vStartTaskNotifyTask();
|
||||
vStartInterruptSemaphoreTasks();
|
||||
|
||||
/* Create the register check tasks, as described at the top of this file */
|
||||
xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL );
|
||||
xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL );
|
||||
|
||||
/* Create the task that just adds a little random behaviour. */
|
||||
xTaskCreate( prvPseudoRandomiser, "Rnd", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );
|
||||
|
||||
/* Create the task that performs the 'check' functionality, as described at
|
||||
the top of this file. */
|
||||
xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
|
||||
|
||||
/* The set of tasks created by the following function call have to be
|
||||
created last as they keep account of the number of tasks they expect to see
|
||||
running. */
|
||||
vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
|
||||
|
||||
/* Start the scheduler. */
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* If all is well, the scheduler will now be running, and the following
|
||||
line will never be reached. If the following line does execute, then
|
||||
there was either insufficient FreeRTOS heap memory available for the idle
|
||||
and/or timer tasks to be created, or vTaskStartScheduler() was called from
|
||||
User mode. See the memory management section on the FreeRTOS web site for
|
||||
more details on the FreeRTOS heap http://www.freertos.org/a00111.html. The
|
||||
mode from which main() is called is set in the C start up code and must be
|
||||
a privileged mode (not user mode). */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvCheckTask( void *pvParameters )
|
||||
{
|
||||
TickType_t xDelayPeriod = mainNO_ERROR_CHECK_TASK_PERIOD;
|
||||
TickType_t xLastExecutionTime;
|
||||
static unsigned long ulLastRegTest1Value = 0, ulLastRegTest2Value = 0;
|
||||
unsigned long ulErrorFound = pdFALSE;
|
||||
|
||||
/* Just to stop compiler warnings. */
|
||||
( void ) pvParameters;
|
||||
|
||||
/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
|
||||
works correctly. */
|
||||
xLastExecutionTime = xTaskGetTickCount();
|
||||
|
||||
/* Cycle for ever, delaying then checking all the other tasks are still
|
||||
operating without error. The onboard LED is toggled on each iteration.
|
||||
If an error is detected then the delay period is decreased from
|
||||
mainNO_ERROR_CHECK_TASK_PERIOD to mainERROR_CHECK_TASK_PERIOD. This has the
|
||||
effect of increasing the rate at which the onboard LED toggles, and in so
|
||||
doing gives visual feedback of the system status. */
|
||||
for( ;; )
|
||||
{
|
||||
/* Delay until it is time to execute again. */
|
||||
vTaskDelayUntil( &xLastExecutionTime, xDelayPeriod );
|
||||
|
||||
/* Check all the demo tasks (other than the flash tasks) to ensure
|
||||
that they are all still running, and that none have detected an error. */
|
||||
if( xAreIntQueueTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 0UL;
|
||||
}
|
||||
|
||||
if( xAreMathsTaskStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 1UL;
|
||||
}
|
||||
|
||||
if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 2UL;
|
||||
}
|
||||
|
||||
if( xAreBlockingQueuesStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 3UL;
|
||||
}
|
||||
|
||||
if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 4UL;
|
||||
}
|
||||
|
||||
if ( xAreGenericQueueTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 5UL;
|
||||
}
|
||||
|
||||
if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 6UL;
|
||||
}
|
||||
|
||||
if( xIsCreateTaskStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 7UL;
|
||||
}
|
||||
|
||||
if( xAreSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 8UL;
|
||||
}
|
||||
|
||||
if( xAreTimerDemoTasksStillRunning( ( TickType_t ) mainNO_ERROR_CHECK_TASK_PERIOD ) != pdPASS )
|
||||
{
|
||||
ulErrorFound |= 1UL << 9UL;
|
||||
}
|
||||
|
||||
if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 10UL;
|
||||
}
|
||||
|
||||
if( xIsQueueOverwriteTaskStillRunning() != pdPASS )
|
||||
{
|
||||
ulErrorFound |= 1UL << 11UL;
|
||||
}
|
||||
|
||||
if( xAreEventGroupTasksStillRunning() != pdPASS )
|
||||
{
|
||||
ulErrorFound |= 1UL << 12UL;
|
||||
}
|
||||
|
||||
if( xAreTaskNotificationTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 13UL;
|
||||
}
|
||||
|
||||
if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE )
|
||||
{
|
||||
ulErrorFound |= 1UL << 14UL;
|
||||
}
|
||||
|
||||
/* Check that the register test 1 task is still running. */
|
||||
if( ulLastRegTest1Value == ulRegTest1LoopCounter )
|
||||
{
|
||||
ulErrorFound |= 1UL << 15UL;
|
||||
}
|
||||
ulLastRegTest1Value = ulRegTest1LoopCounter;
|
||||
|
||||
/* Check that the register test 2 task is still running. */
|
||||
if( ulLastRegTest2Value == ulRegTest2LoopCounter )
|
||||
{
|
||||
ulErrorFound |= 1UL << 16UL;
|
||||
}
|
||||
ulLastRegTest2Value = ulRegTest2LoopCounter;
|
||||
|
||||
/* Toggle the check LED to give an indication of the system status. If
|
||||
the LED toggles every mainNO_ERROR_CHECK_TASK_PERIOD milliseconds then
|
||||
everything is ok. A faster toggle indicates an error. */
|
||||
//_RB_ LED0 = !LED0;
|
||||
|
||||
if( ulErrorFound != pdFALSE )
|
||||
{
|
||||
/* An error has been detected in one of the tasks - flash the LED
|
||||
at a higher frequency to give visible feedback that something has
|
||||
gone wrong (it might just be that the loop back connector required
|
||||
by the comtest tasks has not been fitted). */
|
||||
xDelayPeriod = mainERROR_CHECK_TASK_PERIOD;
|
||||
pcStatusMessage = "Error found in at least one task.";
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvPseudoRandomiser( void *pvParameters )
|
||||
{
|
||||
const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL, ulMinDelay = ( 35 / portTICK_PERIOD_MS );
|
||||
volatile uint32_t ulNextRand = ( uint32_t ) &pvParameters, ulValue;
|
||||
|
||||
/* This task does nothing other than ensure there is a little bit of
|
||||
disruption in the scheduling pattern of the other tasks. Normally this is
|
||||
done by generating interrupts at pseudo random times. */
|
||||
for( ;; )
|
||||
{
|
||||
ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement;
|
||||
ulValue = ( ulNextRand >> 16UL ) & 0xffUL;
|
||||
|
||||
if( ulValue < ulMinDelay )
|
||||
{
|
||||
ulValue = ulMinDelay;
|
||||
}
|
||||
|
||||
vTaskDelay( ulValue );
|
||||
|
||||
while( ulValue > 0 )
|
||||
{
|
||||
__asm volatile( "NOP" );
|
||||
__asm volatile( "NOP" );
|
||||
__asm volatile( "NOP" );
|
||||
__asm volatile( "NOP" );
|
||||
__asm volatile( "NOP" );
|
||||
__asm volatile( "NOP" );
|
||||
__asm volatile( "NOP" );
|
||||
|
||||
ulValue--;
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vFullDemoTickHook( void )
|
||||
{
|
||||
/* The full demo includes a software timer demo/test that requires
|
||||
prodding periodically from the tick interrupt. */
|
||||
vTimerPeriodicISRTests();
|
||||
|
||||
/* Call the periodic queue overwrite from ISR demo. */
|
||||
vQueueOverwritePeriodicISRDemo();
|
||||
|
||||
/* Call the periodic event group from ISR demo. */
|
||||
vPeriodicEventGroupsProcessing();
|
||||
|
||||
/* Use task notifications from an interrupt. */
|
||||
xNotifyTaskFromISR();
|
||||
|
||||
/* Use mutexes from interrupts. */
|
||||
vInterruptSemaphorePeriodicTest();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* This function is explained in the comments at the top of this file. */
|
||||
static void prvRegTest1Task( void *pvParameters )
|
||||
{
|
||||
if( pvParameters != mainREG_TEST_1_PARAMETER )
|
||||
{
|
||||
/* The parameter did not contain the expected value. */
|
||||
for( ;; )
|
||||
{
|
||||
/* Stop the tick interrupt so its obvious something has gone wrong. */
|
||||
taskDISABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
|
||||
/* This is an inline asm function that never returns. */
|
||||
vRegTest1Implementation();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* This function is explained in the comments at the top of this file. */
|
||||
static void prvRegTest2Task( void *pvParameters )
|
||||
{
|
||||
if( pvParameters != mainREG_TEST_2_PARAMETER )
|
||||
{
|
||||
/* The parameter did not contain the expected value. */
|
||||
for( ;; )
|
||||
{
|
||||
/* Stop the tick interrupt so its obvious something has gone wrong. */
|
||||
taskDISABLE_INTERRUPTS();
|
||||
}
|
||||
}
|
||||
|
||||
/* This is an inline asm function that never returns. */
|
||||
vRegTest2Implementation();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,554 @@
|
|||
/***************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RTOSDemo */
|
||||
/* FILE : interrupt_handlers.c */
|
||||
/* DESCRIPTION : Interrupt Handler */
|
||||
/* CPU SERIES : RX200 */
|
||||
/* CPU TYPE : RX231 */
|
||||
/* */
|
||||
/* This file is generated by e2 studio. */
|
||||
/* */
|
||||
/***************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
/************************************************************************/
|
||||
/* File Version: V1.00 */
|
||||
/* History : 0.50 (2014-09-18) [Hardware Manual Revision : 0.50] */
|
||||
/* : 1.00 (2015-05-18) [Hardware Manual Revision : 1.00] */
|
||||
/* Date Modified: 21/07/2015 */
|
||||
/************************************************************************/
|
||||
|
||||
#include "interrupt_handlers.h"
|
||||
|
||||
// INT_Exception(Supervisor Instruction)
|
||||
void INT_Excep_SuperVisorInst(void){/* brk(); */}
|
||||
|
||||
// INT_Exception(Access Instruction)
|
||||
void INT_Excep_AccessInst(void){/* brk(); */}
|
||||
|
||||
// INT_Exception(Undefined Instruction)
|
||||
void INT_Excep_UndefinedInst(void){/* brk(); */}
|
||||
|
||||
// INT_Exception(Floating Point)
|
||||
void INT_Excep_FloatingPoint(void){/* brk(); */}
|
||||
|
||||
// INT_NMI
|
||||
void INT_NonMaskableInterrupt(void){/* brk(); */}
|
||||
|
||||
// INT_Dummy
|
||||
void INT_Dummy(void){/* brk(); */}
|
||||
|
||||
// BRK
|
||||
void INT_Excep_BRK(void){ /* wait(); */ }
|
||||
|
||||
// BSC BUSERR
|
||||
void INT_Excep_BSC_BUSERR(void){/* brk(); */}
|
||||
|
||||
// FCU FRDYI
|
||||
void INT_Excep_FCU_FRDYI(void){/* brk(); */}
|
||||
|
||||
// ICU SWINT
|
||||
void INT_Excep_ICU_SWINT(void){/* brk(); */}
|
||||
|
||||
// CMT0 CMI0
|
||||
void INT_Excep_CMT0_CMI0(void){/* brk(); */}
|
||||
|
||||
// CMT1 CMI1
|
||||
void INT_Excep_CMT1_CMI1(void){/* brk(); */}
|
||||
|
||||
// CMT2 CMI2
|
||||
void INT_Excep_CMT2_CMI2(void){/* brk(); */}
|
||||
|
||||
// CMT3 CMI3
|
||||
void INT_Excep_CMT3_CMI3(void){/* brk(); */}
|
||||
|
||||
// CAC FERRF
|
||||
void INT_Excep_CAC_FERRF(void){/* brk(); */}
|
||||
|
||||
// CAC MENDF
|
||||
void INT_Excep_CAC_MENDF(void){/* brk(); */}
|
||||
|
||||
// CAC OVFF
|
||||
void INT_Excep_CAC_OVFF(void){/* brk(); */}
|
||||
|
||||
// USB0 D0FIFO0
|
||||
void INT_Excep_USB0_D0FIFO0(void){/* brk(); */}
|
||||
|
||||
// USB0 D1FIFO0
|
||||
void INT_Excep_USB0_D1FIFO0(void){/* brk(); */}
|
||||
|
||||
// USB0 USBI0
|
||||
void INT_Excep_USB0_USBI0(void){/* brk(); */}
|
||||
|
||||
// SDHI SBFAI
|
||||
void INT_Excep_SDHI_SBFAI(void){/* brk(); */}
|
||||
|
||||
// SDHI CDETI
|
||||
void INT_Excep_SDHI_CDETI(void){/* brk(); */}
|
||||
|
||||
// SDHI CACI
|
||||
void INT_Excep_SDHI_CACI(void){/* brk(); */}
|
||||
|
||||
// SDHI SDACI
|
||||
void INT_Excep_SDHI_SDACI(void){/* brk(); */}
|
||||
|
||||
// RSPI0 SPEI0
|
||||
void INT_Excep_RSPI0_SPEI0(void){/* brk(); */}
|
||||
|
||||
// RSPI0 SPRI0
|
||||
void INT_Excep_RSPI0_SPRI0(void){/* brk(); */}
|
||||
|
||||
// RSPI0 SPTI0
|
||||
void INT_Excep_RSPI0_SPTI0(void){/* brk(); */}
|
||||
|
||||
// RSPI0 SPII0
|
||||
void INT_Excep_RSPI0_SPII0(void){/* brk(); */}
|
||||
|
||||
// RSCAN COMFRXINT
|
||||
void INT_Excep_RSCAN_COMFRXINT(void){/* brk(); */}
|
||||
|
||||
// RSCAN RXFINT
|
||||
void INT_Excep_RSCAN_RXFINT(void){/* brk(); */}
|
||||
|
||||
// RSCAN TXINT
|
||||
void INT_Excep_RSCAN_TXINT(void){/* brk(); */}
|
||||
|
||||
// RSCAN CHERRINT
|
||||
void INT_Excep_RSCAN_CHERRINT(void){/* brk(); */}
|
||||
|
||||
// RSCAN GLERRINT
|
||||
void INT_Excep_RSCAN_GLERRINT(void){/* brk(); */}
|
||||
|
||||
// DOC DOPCF
|
||||
void INT_Excep_DOC_DOPCF(void){/* brk(); */}
|
||||
|
||||
// CMPB CMPB0
|
||||
void INT_Excep_CMPB_CMPB0(void){/* brk(); */}
|
||||
|
||||
// CMPB CMPB1
|
||||
void INT_Excep_CMPB_CMPB1(void){/* brk(); */}
|
||||
|
||||
// CTSU CTSUWR
|
||||
void INT_Excep_CTSU_CTSUWR(void){/* brk(); */}
|
||||
|
||||
// CTSU CTSURD
|
||||
void INT_Excep_CTSU_CTSURD(void){/* brk(); */}
|
||||
|
||||
// CTSU CTSUFN
|
||||
void INT_Excep_CTSU_CTSUFN(void){/* brk(); */}
|
||||
|
||||
// RTC CUP
|
||||
void INT_Excep_RTC_CUP(void){/* brk(); */}
|
||||
|
||||
// ICU IRQ0
|
||||
void INT_Excep_ICU_IRQ0(void){/* brk(); */}
|
||||
|
||||
// ICU IRQ1
|
||||
void INT_Excep_ICU_IRQ1(void){/* brk(); */}
|
||||
|
||||
// ICU IRQ2
|
||||
void INT_Excep_ICU_IRQ2(void){/* brk(); */}
|
||||
|
||||
// ICU IRQ3
|
||||
void INT_Excep_ICU_IRQ3(void){/* brk(); */}
|
||||
|
||||
// ICU IRQ4
|
||||
void INT_Excep_ICU_IRQ4(void){/* brk(); */}
|
||||
|
||||
// ICU IRQ5
|
||||
void INT_Excep_ICU_IRQ5(void){/* brk(); */}
|
||||
|
||||
// ICU IRQ6
|
||||
void INT_Excep_ICU_IRQ6(void){/* brk(); */}
|
||||
|
||||
// ICU IRQ7
|
||||
void INT_Excep_ICU_IRQ7(void){/* brk(); */}
|
||||
|
||||
// ELC ELSR8I
|
||||
void INT_Excep_ELC_ELSR8I(void){/* brk(); */}
|
||||
|
||||
// LVD LVD1
|
||||
void INT_Excep_LVD_LVD1(void){/* brk(); */}
|
||||
|
||||
// LVD LVD2
|
||||
void INT_Excep_LVD_LVD2(void){/* brk(); */}
|
||||
|
||||
// CMPA CMPA1
|
||||
//void INT_Excep_CMPA_CMPA1(void){/* brk(); */}
|
||||
|
||||
// CMPA CMPA2
|
||||
//void INT_Excep_CMPA_CMPA2(void){/* brk(); */}
|
||||
|
||||
// USB0 USBR0
|
||||
void INT_Excep_USB0_USBR0(void){/* brk(); */}
|
||||
|
||||
// VBATT VBTLVDI
|
||||
void INT_Excep_VBATT_VBTLVDI(void){/* brk(); */}
|
||||
|
||||
// RTC ALM
|
||||
void INT_Excep_RTC_ALM(void){/* brk(); */}
|
||||
|
||||
// RTC PRD
|
||||
void INT_Excep_RTC_PRD(void){/* brk(); */}
|
||||
|
||||
// S12AD S12ADI0
|
||||
void INT_Excep_S12AD_S12ADI0(void){/* brk(); */}
|
||||
|
||||
// S12AD GBADI
|
||||
void INT_Excep_S12AD_GBADI(void){/* brk(); */}
|
||||
|
||||
// CMPB1 CMPB2
|
||||
void INT_Excep_CMPB1_CMPB2(void){/* brk(); */}
|
||||
|
||||
// CMPB1 CMPB3
|
||||
void INT_Excep_CMPB1_CMPB3(void){/* brk(); */}
|
||||
|
||||
// ELC ELSR18I
|
||||
void INT_Excep_ELC_ELSR18I(void){/* brk(); */}
|
||||
|
||||
// ELC ELSR19I
|
||||
void INT_Excep_ELC_ELSR19I(void){/* brk(); */}
|
||||
|
||||
// SSI0 SSIF0
|
||||
void INT_Excep_SSI0_SSIF0(void){/* brk(); */}
|
||||
|
||||
// SSI0 SSIRXI0
|
||||
void INT_Excep_SSI0_SSIRXI0(void){/* brk(); */}
|
||||
|
||||
// SSI0 SSITXI0
|
||||
void INT_Excep_SSI0_SSITXI0(void){/* brk(); */}
|
||||
|
||||
// SECURITY RD
|
||||
void INT_Excep_SECURITY_RD(void){/* brk(); */}
|
||||
|
||||
// SECURITY WR
|
||||
void INT_Excep_SECURITY_WR(void){/* brk(); */}
|
||||
|
||||
// SECURITY ERR
|
||||
void INT_Excep_SECURITY_ERR(void){/* brk(); */}
|
||||
|
||||
// MTU0 TGIA0
|
||||
void INT_Excep_MTU0_TGIA0(void){/* brk(); */}
|
||||
|
||||
// MTU0 TGIB0
|
||||
void INT_Excep_MTU0_TGIB0(void){/* brk(); */}
|
||||
|
||||
// MTU0 TGIC0
|
||||
void INT_Excep_MTU0_TGIC0(void){/* brk(); */}
|
||||
|
||||
// MTU0 TGID0
|
||||
void INT_Excep_MTU0_TGID0(void){/* brk(); */}
|
||||
|
||||
// MTU0 TCIV0
|
||||
void INT_Excep_MTU0_TCIV0(void){/* brk(); */}
|
||||
|
||||
// MTU0 TGIE0
|
||||
void INT_Excep_MTU0_TGIE0(void){/* brk(); */}
|
||||
|
||||
// MTU0 TGIF0
|
||||
void INT_Excep_MTU0_TGIF0(void){/* brk(); */}
|
||||
|
||||
// MTU1 TGIA1
|
||||
void INT_Excep_MTU1_TGIA1(void){/* brk(); */}
|
||||
|
||||
// MTU1 TGIB1
|
||||
void INT_Excep_MTU1_TGIB1(void){/* brk(); */}
|
||||
|
||||
// MTU1 TCIV1
|
||||
void INT_Excep_MTU1_TCIV1(void){/* brk(); */}
|
||||
|
||||
// MTU1 TCIU1
|
||||
void INT_Excep_MTU1_TCIU1(void){/* brk(); */}
|
||||
|
||||
// MTU2 TGIA2
|
||||
void INT_Excep_MTU2_TGIA2(void){/* brk(); */}
|
||||
|
||||
// MTU2 TGIB2
|
||||
void INT_Excep_MTU2_TGIB2(void){/* brk(); */}
|
||||
|
||||
// MTU2 TCIV2
|
||||
void INT_Excep_MTU2_TCIV2(void){/* brk(); */}
|
||||
|
||||
// MTU2 TCIU2
|
||||
void INT_Excep_MTU2_TCIU2(void){/* brk(); */}
|
||||
|
||||
// MTU3 TGIA3
|
||||
void INT_Excep_MTU3_TGIA3(void){/* brk(); */}
|
||||
|
||||
// MTU3 TGIB3
|
||||
void INT_Excep_MTU3_TGIB3(void){/* brk(); */}
|
||||
|
||||
// MTU3 TGIC3
|
||||
void INT_Excep_MTU3_TGIC3(void){/* brk(); */}
|
||||
|
||||
// MTU3 TGID3
|
||||
void INT_Excep_MTU3_TGID3(void){/* brk(); */}
|
||||
|
||||
// MTU3 TCIV3
|
||||
void INT_Excep_MTU3_TCIV3(void){/* brk(); */}
|
||||
|
||||
// MTU4 TGIA4
|
||||
void INT_Excep_MTU4_TGIA4(void){/* brk(); */}
|
||||
|
||||
// MTU4 TGIB4
|
||||
void INT_Excep_MTU4_TGIB4(void){/* brk(); */}
|
||||
|
||||
// MTU4 TGIC4
|
||||
void INT_Excep_MTU4_TGIC4(void){/* brk(); */}
|
||||
|
||||
// MTU4 TGID4
|
||||
void INT_Excep_MTU4_TGID4(void){/* brk(); */}
|
||||
|
||||
// MTU4 TCIV4
|
||||
void INT_Excep_MTU4_TCIV4(void){/* brk(); */}
|
||||
|
||||
// MTU5 TGIU5
|
||||
void INT_Excep_MTU5_TGIU5(void){/* brk(); */}
|
||||
|
||||
// MTU5 TGIV5
|
||||
void INT_Excep_MTU5_TGIV5(void){/* brk(); */}
|
||||
|
||||
// MTU5 TGIW5
|
||||
void INT_Excep_MTU5_TGIW5(void){/* brk(); */}
|
||||
|
||||
// TPU0 TGI0A
|
||||
void INT_Excep_TPU0_TGI0A(void){/* brk(); */}
|
||||
|
||||
// TPU0 TGI0B
|
||||
void INT_Excep_TPU0_TGI0B(void){/* brk(); */}
|
||||
|
||||
// TPU0 TGI0C
|
||||
void INT_Excep_TPU0_TGI0C(void){/* brk(); */}
|
||||
|
||||
// TPU0 TGI0D
|
||||
void INT_Excep_TPU0_TGI0D(void){/* brk(); */}
|
||||
|
||||
// TPU0 TCI0V
|
||||
void INT_Excep_TPU0_TCI0V(void){/* brk(); */}
|
||||
|
||||
// TPU1 TGI1A
|
||||
void INT_Excep_TPU1_TGI1A(void){/* brk(); */}
|
||||
|
||||
// TPU1 TGI1B
|
||||
void INT_Excep_TPU1_TGI1B(void){/* brk(); */}
|
||||
|
||||
// TPU1 TCI1V
|
||||
void INT_Excep_TPU1_TCI1V(void){/* brk(); */}
|
||||
|
||||
// TPU1 TCI1U
|
||||
void INT_Excep_TPU1_TCI1U(void){/* brk(); */}
|
||||
|
||||
// TPU2 TGI2A
|
||||
void INT_Excep_TPU2_TGI2A(void){/* brk(); */}
|
||||
|
||||
// TPU2 TGI2B
|
||||
void INT_Excep_TPU2_TGI2B(void){/* brk(); */}
|
||||
|
||||
// TPU2 TCI2V
|
||||
void INT_Excep_TPU2_TCI2V(void){/* brk(); */}
|
||||
|
||||
// TPU2 TCI2U
|
||||
void INT_Excep_TPU2_TCI2U(void){/* brk(); */}
|
||||
|
||||
// TPU3 TGI3A
|
||||
void INT_Excep_TPU3_TGI3A(void){/* brk(); */}
|
||||
|
||||
// TPU3 TGI3B
|
||||
void INT_Excep_TPU3_TGI3B(void){/* brk(); */}
|
||||
|
||||
// TPU3 TGI3C
|
||||
void INT_Excep_TPU3_TGI3C(void){/* brk(); */}
|
||||
|
||||
// TPU3 TGI3D
|
||||
void INT_Excep_TPU3_TGI3D(void){/* brk(); */}
|
||||
|
||||
// TPU3 TCI3V
|
||||
void INT_Excep_TPU3_TCI3V(void){/* brk(); */}
|
||||
|
||||
// TPU4 TGI4A
|
||||
void INT_Excep_TPU4_TGI4A(void){/* brk(); */}
|
||||
|
||||
// TPU4 TGI4B
|
||||
void INT_Excep_TPU4_TGI4B(void){/* brk(); */}
|
||||
|
||||
// TPU4 TCI4V
|
||||
void INT_Excep_TPU4_TCI4V(void){/* brk(); */}
|
||||
|
||||
// TPU4 TCI4U
|
||||
void INT_Excep_TPU4_TCI4U(void){/* brk(); */}
|
||||
|
||||
// TPU5 TGI5A
|
||||
void INT_Excep_TPU5_TGI5A(void){/* brk(); */}
|
||||
|
||||
// TPU5 TGI5B
|
||||
void INT_Excep_TPU5_TGI5B(void){/* brk(); */}
|
||||
|
||||
// TPU5 TCI5V
|
||||
void INT_Excep_TPU5_TCI5V(void){/* brk(); */}
|
||||
|
||||
// TPU5 TCI5U
|
||||
void INT_Excep_TPU5_TCI5U(void){/* brk(); */}
|
||||
|
||||
// POE OEI1
|
||||
void INT_Excep_POE_OEI1(void){/* brk(); */}
|
||||
|
||||
// POE OEI2
|
||||
void INT_Excep_POE_OEI2(void){/* brk(); */}
|
||||
|
||||
// TMR0 CMIA0
|
||||
void INT_Excep_TMR0_CMIA0(void){/* brk(); */}
|
||||
|
||||
// TMR0 CMIB0
|
||||
void INT_Excep_TMR0_CMIB0(void){/* brk(); */}
|
||||
|
||||
// TMR0 OVI0
|
||||
void INT_Excep_TMR0_OVI0(void){/* brk(); */}
|
||||
|
||||
// TMR1 CMIA1
|
||||
void INT_Excep_TMR1_CMIA1(void){/* brk(); */}
|
||||
|
||||
// TMR1 CMIB1
|
||||
void INT_Excep_TMR1_CMIB1(void){/* brk(); */}
|
||||
|
||||
// TMR1 OVI1
|
||||
void INT_Excep_TMR1_OVI1(void){/* brk(); */}
|
||||
|
||||
// TMR2 CMIA2
|
||||
void INT_Excep_TMR2_CMIA2(void){/* brk(); */}
|
||||
|
||||
// TMR2 CMIB2
|
||||
void INT_Excep_TMR2_CMIB2(void){/* brk(); */}
|
||||
|
||||
// TMR2 OVI2
|
||||
void INT_Excep_TMR2_OVI2(void){/* brk(); */}
|
||||
|
||||
// TMR3 CMIA3
|
||||
void INT_Excep_TMR3_CMIA3(void){/* brk(); */}
|
||||
|
||||
// TMR3 CMIB3
|
||||
void INT_Excep_TMR3_CMIB3(void){/* brk(); */}
|
||||
|
||||
// TMR3 OVI3
|
||||
void INT_Excep_TMR3_OVI3(void){/* brk(); */}
|
||||
|
||||
// DMAC DMAC0I
|
||||
void INT_Excep_DMAC_DMAC0I(void){/* brk(); */}
|
||||
|
||||
// DMAC DMAC1I
|
||||
void INT_Excep_DMAC_DMAC1I(void){/* brk(); */}
|
||||
|
||||
// DMAC DMAC2I
|
||||
void INT_Excep_DMAC_DMAC2I(void){/* brk(); */}
|
||||
|
||||
// DMAC DMAC3I
|
||||
void INT_Excep_DMAC_DMAC3I(void){/* brk(); */}
|
||||
|
||||
// SCI0 ERI0
|
||||
void INT_Excep_SCI0_ERI0(void){/* brk(); */}
|
||||
|
||||
// SCI0 RXI0
|
||||
void INT_Excep_SCI0_RXI0(void){/* brk(); */}
|
||||
|
||||
// SCI0 TXI0
|
||||
void INT_Excep_SCI0_TXI0(void){/* brk(); */}
|
||||
|
||||
// SCI0 TEI0
|
||||
void INT_Excep_SCI0_TEI0(void){/* brk(); */}
|
||||
|
||||
// SCI1 ERI1
|
||||
void INT_Excep_SCI1_ERI1(void){/* brk(); */}
|
||||
|
||||
// SCI1 RXI1
|
||||
void INT_Excep_SCI1_RXI1(void){/* brk(); */}
|
||||
|
||||
// SCI1 TXI1
|
||||
void INT_Excep_SCI1_TXI1(void){/* brk(); */}
|
||||
|
||||
// SCI1 TEI1
|
||||
void INT_Excep_SCI1_TEI1(void){/* brk(); */}
|
||||
|
||||
// SCI5 ERI5
|
||||
void INT_Excep_SCI5_ERI5(void){/* brk(); */}
|
||||
|
||||
// SCI5 RXI5
|
||||
void INT_Excep_SCI5_RXI5(void){/* brk(); */}
|
||||
|
||||
// SCI5 TXI5
|
||||
void INT_Excep_SCI5_TXI5(void){/* brk(); */}
|
||||
|
||||
// SCI5 TEI5
|
||||
void INT_Excep_SCI5_TEI5(void){/* brk(); */}
|
||||
|
||||
// SCI6 ERI6
|
||||
void INT_Excep_SCI6_ERI6(void){/* brk(); */}
|
||||
|
||||
// SCI6 RXI6
|
||||
void INT_Excep_SCI6_RXI6(void){/* brk(); */}
|
||||
|
||||
// SCI6 TXI6
|
||||
void INT_Excep_SCI6_TXI6(void){/* brk(); */}
|
||||
|
||||
// SCI6 TEI6
|
||||
void INT_Excep_SCI6_TEI6(void){/* brk(); */}
|
||||
|
||||
// SCI8 ERI8
|
||||
void INT_Excep_SCI8_ERI8(void){/* brk(); */}
|
||||
|
||||
// SCI8 RXI8
|
||||
void INT_Excep_SCI8_RXI8(void){/* brk(); */}
|
||||
|
||||
// SCI8 TXI8
|
||||
void INT_Excep_SCI8_TXI8(void){/* brk(); */}
|
||||
|
||||
// SCI8 TEI8
|
||||
void INT_Excep_SCI8_TEI8(void){/* brk(); */}
|
||||
|
||||
// SCI9 ERI9
|
||||
void INT_Excep_SCI9_ERI9(void){/* brk(); */}
|
||||
|
||||
// SCI9 RXI9
|
||||
void INT_Excep_SCI9_RXI9(void){/* brk(); */}
|
||||
|
||||
// SCI9 TXI9
|
||||
void INT_Excep_SCI9_TXI9(void){/* brk(); */}
|
||||
|
||||
// SCI9 TEI9
|
||||
void INT_Excep_SCI9_TEI9(void){/* brk(); */}
|
||||
|
||||
// SCI12 ERI12
|
||||
void INT_Excep_SCI12_ERI12(void){/* brk(); */}
|
||||
|
||||
// SCI12 RXI12
|
||||
void INT_Excep_SCI12_RXI12(void){/* brk(); */}
|
||||
|
||||
// SCI12 TXI12
|
||||
void INT_Excep_SCI12_TXI12(void){/* brk(); */}
|
||||
|
||||
// SCI12 TEI12
|
||||
void INT_Excep_SCI12_TEI12(void){/* brk(); */}
|
||||
|
||||
// SCI12 SCIX0
|
||||
void INT_Excep_SCI12_SCIX0(void){/* brk(); */}
|
||||
|
||||
// SCI12 SCIX1
|
||||
void INT_Excep_SCI12_SCIX1(void){/* brk(); */}
|
||||
|
||||
// SCI12 SCIX2
|
||||
void INT_Excep_SCI12_SCIX2(void){/* brk(); */}
|
||||
|
||||
// SCI12 SCIX3
|
||||
void INT_Excep_SCI12_SCIX3(void){/* brk(); */}
|
||||
|
||||
// RIIC0 EEI0
|
||||
void INT_Excep_RIIC0_EEI0(void){/* brk(); */}
|
||||
|
||||
// RIIC0 RXI0
|
||||
void INT_Excep_RIIC0_RXI0(void){/* brk(); */}
|
||||
|
||||
// RIIC0 TXI0
|
||||
void INT_Excep_RIIC0_TXI0(void){/* brk(); */}
|
||||
|
||||
// RIIC0 TEI0
|
||||
void INT_Excep_RIIC0_TEI0(void){/* brk(); */}
|
||||
|
|
@ -0,0 +1,839 @@
|
|||
/***************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RTOSDemo */
|
||||
/* FILE : interrupt_handlers.h */
|
||||
/* DESCRIPTION : Interrupt Handler Declarations */
|
||||
/* CPU SERIES : RX200 */
|
||||
/* CPU TYPE : RX231 */
|
||||
/* */
|
||||
/* This file is generated by e2 studio. */
|
||||
/* */
|
||||
/***************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
/************************************************************************/
|
||||
/* File Version : V1.00 */
|
||||
/* History : 0.50 (2014-09-18) [Hardware Manual Revision : 0.50] */
|
||||
/* : 1.00 (2015-05-18) [Hardware Manual Revision : 1.00] */
|
||||
/* Date Modified: 21/07/2015 */
|
||||
/************************************************************************/
|
||||
|
||||
#ifndef INTERRUPT_HANDLERS_H
|
||||
#define INTERRUPT_HANDLERS_H
|
||||
|
||||
// INT_Exception(Supervisor Instruction)
|
||||
|
||||
void INT_Excep_SuperVisorInst(void) __attribute__ ((interrupt));
|
||||
|
||||
// INT_Exception(Access Instruction)
|
||||
|
||||
void INT_Excep_AccessInst(void) __attribute__ ((interrupt));
|
||||
|
||||
// INT_Exception(Undefined Instruction)
|
||||
|
||||
void INT_Excep_UndefinedInst(void) __attribute__ ((interrupt));
|
||||
|
||||
// INT_Exception(Floating Point)
|
||||
|
||||
void INT_Excep_FloatingPoint(void) __attribute__ ((interrupt));
|
||||
|
||||
// INT_NMI
|
||||
|
||||
void INT_NonMaskableInterrupt(void) __attribute__ ((interrupt));
|
||||
|
||||
// INT_Dummy
|
||||
|
||||
void INT_Dummy(void) __attribute__ ((interrupt));
|
||||
|
||||
// BRK
|
||||
|
||||
void INT_Excep_BRK(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 1 reserved
|
||||
// vector 2 reserved
|
||||
// vector 3 reserved
|
||||
// vector 4 reserved
|
||||
// vector 5 reserved
|
||||
// vector 6 reserved
|
||||
// vector 7 reserved
|
||||
// vector 8 reserved
|
||||
// vector 9 reserved
|
||||
// vector 10 reserved
|
||||
// vector 11 reserved
|
||||
// vector 12 reserved
|
||||
// vector 13 reserved
|
||||
// vector 14 reserved
|
||||
// vector 15 reserved
|
||||
|
||||
// BSC BUSERR
|
||||
|
||||
void INT_Excep_BSC_BUSERR(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 17 reserved
|
||||
// vector 18 reserved
|
||||
// vector 19 reserved
|
||||
// vector 20 reserved
|
||||
// vector 21 reserved
|
||||
// vector 22 reserved
|
||||
|
||||
// FCU FRDYI
|
||||
|
||||
void INT_Excep_FCU_FRDYI(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 24 reserved
|
||||
// vector 25 reserved
|
||||
// vector 26 reserved
|
||||
|
||||
// ICU SWINT
|
||||
|
||||
void INT_Excep_ICU_SWINT(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMT0 CMI0
|
||||
|
||||
void INT_Excep_CMT0_CMI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMT1 CMI1
|
||||
|
||||
void INT_Excep_CMT1_CMI1(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMT2 CMI2
|
||||
|
||||
void INT_Excep_CMT2_CMI2(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMT3 CMI3
|
||||
|
||||
void INT_Excep_CMT3_CMI3(void) __attribute__ ((interrupt));
|
||||
|
||||
// CAC FERRF
|
||||
|
||||
void INT_Excep_CAC_FERRF(void) __attribute__ ((interrupt));
|
||||
|
||||
// CAC MENDF
|
||||
|
||||
void INT_Excep_CAC_MENDF(void) __attribute__ ((interrupt));
|
||||
|
||||
// CAC OVFF
|
||||
|
||||
void INT_Excep_CAC_OVFF(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 35 reserved
|
||||
|
||||
// USB0 D0FIFO0
|
||||
|
||||
void INT_Excep_USB0_D0FIFO0(void) __attribute__ ((interrupt));
|
||||
|
||||
// USB0 D1FIFO0
|
||||
|
||||
void INT_Excep_USB0_D1FIFO0(void) __attribute__ ((interrupt));
|
||||
|
||||
// USB0 USBI0
|
||||
|
||||
void INT_Excep_USB0_USBI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 39 reserved
|
||||
|
||||
// SDHI SBFAI
|
||||
|
||||
void INT_Excep_SDHI_SBFAI(void) __attribute__ ((interrupt));
|
||||
|
||||
// SDHI CDETI
|
||||
|
||||
void INT_Excep_SDHI_CDETI(void) __attribute__ ((interrupt));
|
||||
|
||||
// SDHI CACI
|
||||
|
||||
void INT_Excep_SDHI_CACI(void) __attribute__ ((interrupt));
|
||||
|
||||
// SDHI SDACI
|
||||
|
||||
void INT_Excep_SDHI_SDACI(void) __attribute__ ((interrupt));
|
||||
|
||||
// RSPI0 SPEI0
|
||||
|
||||
void INT_Excep_RSPI0_SPEI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// RSPI0 SPRI0
|
||||
|
||||
void INT_Excep_RSPI0_SPRI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// RSPI0 SPTI0
|
||||
|
||||
void INT_Excep_RSPI0_SPTI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// RSPI0 SPII0
|
||||
|
||||
void INT_Excep_RSPI0_SPII0(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 48 reserved
|
||||
// vector 49 reserved
|
||||
// vector 50 reserved
|
||||
// vector 51 reserved
|
||||
|
||||
// RSCAN COMFRXINT
|
||||
|
||||
void INT_Excep_RSCAN_COMFRXINT(void) __attribute__ ((interrupt));
|
||||
|
||||
// RSCAN RXFINT
|
||||
|
||||
void INT_Excep_RSCAN_RXFINT(void) __attribute__ ((interrupt));
|
||||
|
||||
// RSCAN TXINT
|
||||
|
||||
void INT_Excep_RSCAN_TXINT(void) __attribute__ ((interrupt));
|
||||
|
||||
// RSCAN CHERRINT
|
||||
|
||||
void INT_Excep_RSCAN_CHERRINT(void) __attribute__ ((interrupt));
|
||||
|
||||
// RSCAN GLERRINT
|
||||
|
||||
void INT_Excep_RSCAN_GLERRINT(void) __attribute__ ((interrupt));
|
||||
|
||||
// DOC DOPCF
|
||||
|
||||
void INT_Excep_DOC_DOPCF(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMPB CMPB0
|
||||
|
||||
void INT_Excep_CMPB_CMPB0(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMPB CMPB1
|
||||
|
||||
void INT_Excep_CMPB_CMPB1(void) __attribute__ ((interrupt));
|
||||
|
||||
// CTSU CTSUWR
|
||||
|
||||
void INT_Excep_CTSU_CTSUWR(void) __attribute__ ((interrupt));
|
||||
|
||||
// CTSU CTSURD
|
||||
|
||||
void INT_Excep_CTSU_CTSURD(void) __attribute__ ((interrupt));
|
||||
|
||||
// CTSU CTSUFN
|
||||
|
||||
void INT_Excep_CTSU_CTSUFN(void) __attribute__ ((interrupt));
|
||||
|
||||
// RTC CUP
|
||||
|
||||
void INT_Excep_RTC_CUP(void) __attribute__ ((interrupt));
|
||||
|
||||
// ICU IRQ0
|
||||
|
||||
void INT_Excep_ICU_IRQ0(void) __attribute__ ((interrupt));
|
||||
|
||||
// ICU IRQ1
|
||||
|
||||
void INT_Excep_ICU_IRQ1(void) __attribute__ ((interrupt));
|
||||
|
||||
// ICU IRQ2
|
||||
|
||||
void INT_Excep_ICU_IRQ2(void) __attribute__ ((interrupt));
|
||||
|
||||
// ICU IRQ3
|
||||
|
||||
void INT_Excep_ICU_IRQ3(void) __attribute__ ((interrupt));
|
||||
|
||||
// ICU IRQ4
|
||||
|
||||
void INT_Excep_ICU_IRQ4(void) __attribute__ ((interrupt));
|
||||
|
||||
// ICU IRQ5
|
||||
|
||||
void INT_Excep_ICU_IRQ5(void) __attribute__ ((interrupt));
|
||||
|
||||
// ICU IRQ6
|
||||
|
||||
void INT_Excep_ICU_IRQ6(void) __attribute__ ((interrupt));
|
||||
|
||||
// ICU IRQ7
|
||||
|
||||
void INT_Excep_ICU_IRQ7(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 72 reserved
|
||||
// vector 73 reserved
|
||||
// vector 74 reserved
|
||||
// vector 75 reserved
|
||||
// vector 76 reserved
|
||||
// vector 77 reserved
|
||||
// vector 78 reserved
|
||||
// vector 79 reserved
|
||||
|
||||
// ELC ELSR8I
|
||||
|
||||
void INT_Excep_ELC_ELSR8I(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 81 reserved
|
||||
// vector 82 reserved
|
||||
// vector 83 reserved
|
||||
// vector 84 reserved
|
||||
// vector 85 reserved
|
||||
// vector 86 reserved
|
||||
// vector 87 reserved
|
||||
|
||||
// LVD LVD1
|
||||
|
||||
void INT_Excep_LVD_LVD1(void) __attribute__ ((interrupt));
|
||||
|
||||
// LVD LVD2
|
||||
|
||||
void INT_Excep_LVD_LVD2(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMPA CMPA1
|
||||
|
||||
//void INT_Excep_CMPA_CMPA1(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMPA CMPA2
|
||||
|
||||
//void INT_Excep_CMPA_CMPA2(void) __attribute__ ((interrupt));
|
||||
|
||||
// USB0 USBR0
|
||||
|
||||
void INT_Excep_USB0_USBR0(void) __attribute__ ((interrupt));
|
||||
|
||||
// VBATT VBTLVDI
|
||||
|
||||
void INT_Excep_VBATT_VBTLVDI(void) __attribute__ ((interrupt));
|
||||
|
||||
// RTC ALM
|
||||
|
||||
void INT_Excep_RTC_ALM(void) __attribute__ ((interrupt));
|
||||
|
||||
// RTC PRD
|
||||
|
||||
void INT_Excep_RTC_PRD(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 94 reserved
|
||||
// vector 95 reserved
|
||||
// vector 96 reserved
|
||||
// vector 97 reserved
|
||||
// vector 98 reserved
|
||||
// vector 99 reserved
|
||||
// vector 100 reserved
|
||||
// vector 101 reserved
|
||||
|
||||
// S12AD S12ADI0
|
||||
|
||||
void INT_Excep_S12AD_S12ADI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// S12AD GBADI
|
||||
|
||||
void INT_Excep_S12AD_GBADI(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMPB1 CMPB2
|
||||
|
||||
void INT_Excep_CMPB1_CMPB2(void) __attribute__ ((interrupt));
|
||||
|
||||
// CMPB1 CMPB3
|
||||
|
||||
void INT_Excep_CMPB1_CMPB3(void) __attribute__ ((interrupt));
|
||||
|
||||
// ELC ELSR18I
|
||||
|
||||
void INT_Excep_ELC_ELSR18I(void) __attribute__ ((interrupt));
|
||||
|
||||
// ELC ELSR19I
|
||||
|
||||
void INT_Excep_ELC_ELSR19I(void) __attribute__ ((interrupt));
|
||||
|
||||
// SSI0 SSIF0
|
||||
|
||||
void INT_Excep_SSI0_SSIF0(void) __attribute__ ((interrupt));
|
||||
|
||||
// SSI0 SSIRXI0
|
||||
|
||||
void INT_Excep_SSI0_SSIRXI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// SSI0 SSITXI0
|
||||
|
||||
void INT_Excep_SSI0_SSITXI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// SECURITY RD
|
||||
|
||||
void INT_Excep_SECURITY_RD(void) __attribute__ ((interrupt));
|
||||
|
||||
// SECURITY WR
|
||||
|
||||
void INT_Excep_SECURITY_WR(void) __attribute__ ((interrupt));
|
||||
|
||||
// SECURITY ERR
|
||||
|
||||
void INT_Excep_SECURITY_ERR(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU0 TGIA0
|
||||
|
||||
void INT_Excep_MTU0_TGIA0(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU0 TGIB0
|
||||
|
||||
void INT_Excep_MTU0_TGIB0(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU0 TGIC0
|
||||
|
||||
void INT_Excep_MTU0_TGIC0(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU0 TGID0
|
||||
|
||||
void INT_Excep_MTU0_TGID0(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU0 TCIV0
|
||||
|
||||
void INT_Excep_MTU0_TCIV0(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU0 TGIE0
|
||||
|
||||
void INT_Excep_MTU0_TGIE0(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU0 TGIF0
|
||||
|
||||
void INT_Excep_MTU0_TGIF0(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU1 TGIA1
|
||||
|
||||
void INT_Excep_MTU1_TGIA1(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU1 TGIB1
|
||||
|
||||
void INT_Excep_MTU1_TGIB1(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU1 TCIV1
|
||||
|
||||
void INT_Excep_MTU1_TCIV1(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU1 TCIU1
|
||||
|
||||
void INT_Excep_MTU1_TCIU1(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU2 TGIA2
|
||||
|
||||
void INT_Excep_MTU2_TGIA2(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU2 TGIB2
|
||||
|
||||
void INT_Excep_MTU2_TGIB2(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU2 TCIV2
|
||||
|
||||
void INT_Excep_MTU2_TCIV2(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU2 TCIU2
|
||||
|
||||
void INT_Excep_MTU2_TCIU2(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU3 TGIA3
|
||||
|
||||
void INT_Excep_MTU3_TGIA3(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU3 TGIB3
|
||||
|
||||
void INT_Excep_MTU3_TGIB3(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU3 TGIC3
|
||||
|
||||
void INT_Excep_MTU3_TGIC3(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU3 TGID3
|
||||
|
||||
void INT_Excep_MTU3_TGID3(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU3 TCIV3
|
||||
|
||||
void INT_Excep_MTU3_TCIV3(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU4 TGIA4
|
||||
|
||||
void INT_Excep_MTU4_TGIA4(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU4 TGIB4
|
||||
|
||||
void INT_Excep_MTU4_TGIB4(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU4 TGIC4
|
||||
|
||||
void INT_Excep_MTU4_TGIC4(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU4 TGID4
|
||||
|
||||
void INT_Excep_MTU4_TGID4(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU4 TCIV4
|
||||
|
||||
void INT_Excep_MTU4_TCIV4(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU5 TGIU5
|
||||
|
||||
void INT_Excep_MTU5_TGIU5(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU5 TGIV5
|
||||
|
||||
void INT_Excep_MTU5_TGIV5(void) __attribute__ ((interrupt));
|
||||
|
||||
// MTU5 TGIW5
|
||||
|
||||
void INT_Excep_MTU5_TGIW5(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU0 TGI0A
|
||||
|
||||
void INT_Excep_TPU0_TGI0A(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU0 TGI0B
|
||||
|
||||
void INT_Excep_TPU0_TGI0B(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU0 TGI0C
|
||||
|
||||
void INT_Excep_TPU0_TGI0C(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU0 TGI0D
|
||||
|
||||
void INT_Excep_TPU0_TGI0D(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU0 TCI0V
|
||||
|
||||
void INT_Excep_TPU0_TCI0V(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU1 TGI1A
|
||||
|
||||
void INT_Excep_TPU1_TGI1A(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU1 TGI1B
|
||||
|
||||
void INT_Excep_TPU1_TGI1B(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU1 TCI1V
|
||||
|
||||
void INT_Excep_TPU1_TCI1V(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU1 TCI1U
|
||||
|
||||
void INT_Excep_TPU1_TCI1U(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU2 TGI2A
|
||||
|
||||
void INT_Excep_TPU2_TGI2A(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU2 TGI2B
|
||||
|
||||
void INT_Excep_TPU2_TGI2B(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU2 TCI2V
|
||||
|
||||
void INT_Excep_TPU2_TCI2V(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU2 TCI2U
|
||||
|
||||
void INT_Excep_TPU2_TCI2U(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU3 TGI3A
|
||||
|
||||
void INT_Excep_TPU3_TGI3A(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU3 TGI3B
|
||||
|
||||
void INT_Excep_TPU3_TGI3B(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU3 TGI3C
|
||||
|
||||
void INT_Excep_TPU3_TGI3C(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU3 TGI3D
|
||||
|
||||
void INT_Excep_TPU3_TGI3D(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU3 TCI3V
|
||||
|
||||
void INT_Excep_TPU3_TCI3V(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU4 TGI4A
|
||||
|
||||
void INT_Excep_TPU4_TGI4A(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU4 TGI4B
|
||||
|
||||
void INT_Excep_TPU4_TGI4B(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU4 TCI4V
|
||||
|
||||
void INT_Excep_TPU4_TCI4V(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU4 TCI4U
|
||||
|
||||
void INT_Excep_TPU4_TCI4U(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU5 TGI5A
|
||||
|
||||
void INT_Excep_TPU5_TGI5A(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU5 TGI5B
|
||||
|
||||
void INT_Excep_TPU5_TGI5B(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU5 TCI5V
|
||||
|
||||
void INT_Excep_TPU5_TCI5V(void) __attribute__ ((interrupt));
|
||||
|
||||
// TPU5 TCI5U
|
||||
|
||||
void INT_Excep_TPU5_TCI5U(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 168 reserved
|
||||
// vector 169 reserved
|
||||
|
||||
// POE OEI1
|
||||
|
||||
void INT_Excep_POE_OEI1(void) __attribute__ ((interrupt));
|
||||
|
||||
// POE OEI2
|
||||
|
||||
void INT_Excep_POE_OEI2(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 172 reserved
|
||||
// vector 173 reserved
|
||||
|
||||
// TMR0 CMIA0
|
||||
|
||||
void INT_Excep_TMR0_CMIA0(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR0 CMIB0
|
||||
|
||||
void INT_Excep_TMR0_CMIB0(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR0 OVI0
|
||||
|
||||
void INT_Excep_TMR0_OVI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR1 CMIA1
|
||||
|
||||
void INT_Excep_TMR1_CMIA1(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR1 CMIB1
|
||||
|
||||
void INT_Excep_TMR1_CMIB1(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR1 OVI1
|
||||
|
||||
void INT_Excep_TMR1_OVI1(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR2 CMIA2
|
||||
|
||||
void INT_Excep_TMR2_CMIA2(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR2 CMIB2
|
||||
|
||||
void INT_Excep_TMR2_CMIB2(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR2 OVI2
|
||||
|
||||
void INT_Excep_TMR2_OVI2(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR3 CMIA3
|
||||
|
||||
void INT_Excep_TMR3_CMIA3(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR3 CMIB3
|
||||
|
||||
void INT_Excep_TMR3_CMIB3(void) __attribute__ ((interrupt));
|
||||
|
||||
// TMR3 OVI3
|
||||
|
||||
void INT_Excep_TMR3_OVI3(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 186 reserved
|
||||
// vector 187 reserved
|
||||
// vector 188 reserved
|
||||
// vector 189 reserved
|
||||
// vector 190 reserved
|
||||
// vector 191 reserved
|
||||
// vector 192 reserved
|
||||
// vector 193 reserved
|
||||
// vector 194 reserved
|
||||
// vector 195 reserved
|
||||
// vector 196 reserved
|
||||
// vector 197 reserved
|
||||
|
||||
// DMAC DMAC0I
|
||||
|
||||
void INT_Excep_DMAC_DMAC0I(void) __attribute__ ((interrupt));
|
||||
|
||||
// DMAC DMAC1I
|
||||
|
||||
void INT_Excep_DMAC_DMAC1I(void) __attribute__ ((interrupt));
|
||||
|
||||
// DMAC DMAC2I
|
||||
|
||||
void INT_Excep_DMAC_DMAC2I(void) __attribute__ ((interrupt));
|
||||
|
||||
// DMAC DMAC3I
|
||||
|
||||
void INT_Excep_DMAC_DMAC3I(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 202 reserved
|
||||
// vector 203 reserved
|
||||
// vector 204 reserved
|
||||
// vector 205 reserved
|
||||
// vector 206 reserved
|
||||
// vector 207 reserved
|
||||
// vector 208 reserved
|
||||
// vector 209 reserved
|
||||
// vector 210 reserved
|
||||
// vector 211 reserved
|
||||
// vector 212 reserved
|
||||
// vector 213 reserved
|
||||
|
||||
// SCI0 ERI0
|
||||
|
||||
void INT_Excep_SCI0_ERI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI0 RXI0
|
||||
|
||||
void INT_Excep_SCI0_RXI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI0 TXI0
|
||||
|
||||
void INT_Excep_SCI0_TXI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI0 TEI0
|
||||
|
||||
void INT_Excep_SCI0_TEI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI1 ERI1
|
||||
|
||||
void INT_Excep_SCI1_ERI1(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI1 RXI1
|
||||
|
||||
void INT_Excep_SCI1_RXI1(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI1 TXI1
|
||||
|
||||
void INT_Excep_SCI1_TXI1(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI1 TEI1
|
||||
|
||||
void INT_Excep_SCI1_TEI1(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI5 ERI5
|
||||
|
||||
void INT_Excep_SCI5_ERI5(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI5 RXI5
|
||||
|
||||
void INT_Excep_SCI5_RXI5(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI5 TXI5
|
||||
|
||||
void INT_Excep_SCI5_TXI5(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI5 TEI5
|
||||
|
||||
void INT_Excep_SCI5_TEI5(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI6 ERI6
|
||||
|
||||
void INT_Excep_SCI6_ERI6(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI6 RXI6
|
||||
|
||||
void INT_Excep_SCI6_RXI6(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI6 TXI6
|
||||
|
||||
void INT_Excep_SCI6_TXI6(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI6 TEI6
|
||||
|
||||
void INT_Excep_SCI6_TEI6(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI8 ERI8
|
||||
|
||||
void INT_Excep_SCI8_ERI8(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI8 RXI8
|
||||
|
||||
void INT_Excep_SCI8_RXI8(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI8 TXI8
|
||||
|
||||
void INT_Excep_SCI8_TXI8(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI8 TEI8
|
||||
|
||||
void INT_Excep_SCI8_TEI8(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI9 ERI9
|
||||
|
||||
void INT_Excep_SCI9_ERI9(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI9 RXI9
|
||||
|
||||
void INT_Excep_SCI9_RXI9(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI9 TXI9
|
||||
|
||||
void INT_Excep_SCI9_TXI9(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI9 TEI9
|
||||
|
||||
void INT_Excep_SCI9_TEI9(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI12 ERI12
|
||||
|
||||
void INT_Excep_SCI12_ERI12(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI12 RXI12
|
||||
|
||||
void INT_Excep_SCI12_RXI12(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI12 TXI12
|
||||
|
||||
void INT_Excep_SCI12_TXI12(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI12 TEI12
|
||||
|
||||
void INT_Excep_SCI12_TEI12(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI12 SCIX0
|
||||
|
||||
void INT_Excep_SCI12_SCIX0(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI12 SCIX1
|
||||
|
||||
void INT_Excep_SCI12_SCIX1(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI12 SCIX2
|
||||
|
||||
void INT_Excep_SCI12_SCIX2(void) __attribute__ ((interrupt));
|
||||
|
||||
// SCI12 SCIX3
|
||||
|
||||
void INT_Excep_SCI12_SCIX3(void) __attribute__ ((interrupt));
|
||||
|
||||
// RIIC0 EEI0
|
||||
|
||||
void INT_Excep_RIIC0_EEI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// RIIC0 RXI0
|
||||
|
||||
void INT_Excep_RIIC0_RXI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// RIIC0 TXI0
|
||||
|
||||
void INT_Excep_RIIC0_TXI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// RIIC0 TEI0
|
||||
|
||||
void INT_Excep_RIIC0_TEI0(void) __attribute__ ((interrupt));
|
||||
|
||||
// vector 250 reserved
|
||||
// vector 251 reserved
|
||||
// vector 252 reserved
|
||||
// vector 253 reserved
|
||||
// vector 254 reserved
|
||||
// vector 255 reserved
|
||||
|
||||
//;<<VECTOR DATA START (POWER ON RESET)>>
|
||||
//;Power On Reset PC
|
||||
extern void PowerON_Reset(void) __attribute__ ((interrupt));
|
||||
//;<<VECTOR DATA END (POWER ON RESET)>>
|
||||
#endif
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
/***************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RTOSDemo */
|
||||
/* FILE : typedefine.h */
|
||||
/* DESCRIPTION : Aliases of Integer Type */
|
||||
/* CPU SERIES : RX200 */
|
||||
/* CPU TYPE : RX231 */
|
||||
/* */
|
||||
/* This file is generated by e2 studio. */
|
||||
/* */
|
||||
/***************************************************************/
|
||||
|
||||
|
||||
/************************************************************************/
|
||||
/* File Version: V1.00 */
|
||||
/* Date Generated: 08/07/2013 */
|
||||
/************************************************************************/
|
||||
|
||||
typedef signed char _SBYTE;
|
||||
typedef unsigned char _UBYTE;
|
||||
typedef signed short _SWORD;
|
||||
typedef unsigned short _UWORD;
|
||||
typedef signed int _SINT;
|
||||
typedef unsigned int _UINT;
|
||||
typedef signed long _SDWORD;
|
||||
typedef unsigned long _UDWORD;
|
||||
typedef signed long long _SQWORD;
|
||||
typedef unsigned long long _UQWORD;
|
||||
|
|
@ -0,0 +1,632 @@
|
|||
/***************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RTOSDemo */
|
||||
/* FILE : vector_table.c */
|
||||
/* DESCRIPTION : Vector Table */
|
||||
/* CPU SERIES : RX200 */
|
||||
/* CPU TYPE : RX231 */
|
||||
/* */
|
||||
/* This file is generated by e2 studio. */
|
||||
/* */
|
||||
/***************************************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
/************************************************************************/
|
||||
/* File Version : V1.00 */
|
||||
/* History: 0.50 (2014-09-05) [Hardware Manual Revision : 0.50] */
|
||||
/* 0.51 (2014-10-01) [Hardware Manual Revision : 0.50] */
|
||||
/* Date Modified: 03/07/2015 */
|
||||
/************************************************************************/
|
||||
|
||||
|
||||
#include "interrupt_handlers.h"
|
||||
|
||||
typedef void (*fp) (void);
|
||||
extern void PowerON_Reset (void);
|
||||
extern void stack (void);
|
||||
extern void vTickISR( void );
|
||||
extern void vSoftwareInterruptISR( void );
|
||||
extern void vIntQTimerISR0( void );
|
||||
extern void vIntQTimerISR1( void );
|
||||
|
||||
|
||||
#define EXVECT_SECT __attribute__ ((section (".exvectors")))
|
||||
|
||||
const void *ExceptVectors[] EXVECT_SECT = {
|
||||
//;0xffffff80 MDES Endian Select Register
|
||||
#ifdef __RX_LITTLE_ENDIAN__
|
||||
(fp)0xffffffff,
|
||||
#endif
|
||||
#ifdef __RX_BIG_ENDIAN__
|
||||
(fp)0xfffffff8,
|
||||
#endif
|
||||
//;0xffffff84 Reserved
|
||||
(fp)0,
|
||||
//;0xffffff88 OFS1 Option byte setting
|
||||
(fp)0xFFFFFFFF,
|
||||
//;0xffffff8C OFS0
|
||||
(fp)0xFFFFFFFF,
|
||||
//;0xffffff90 Reserved
|
||||
(fp)0,
|
||||
//;0xffffff94 Reserved
|
||||
(fp)0,
|
||||
//;0xffffff98 Reserved
|
||||
(fp)0,
|
||||
//;0xffffff9C Reserved
|
||||
(fp)0,
|
||||
//;0xffffffA0 Reserved
|
||||
(fp)0xFFFFFFFF,
|
||||
//;0xffffffA4 Reserved
|
||||
(fp)0xFFFFFFFF,
|
||||
//;0xffffffA8 Reserved
|
||||
(fp)0xFFFFFFFF,
|
||||
//;0xffffffAC Reserved
|
||||
(fp)0xFFFFFFFF,
|
||||
//;0xffffffB0 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffB4 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffB8 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffBC Reserved
|
||||
(fp)0,
|
||||
//;0xffffffC0 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffC4 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffC8 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffCC Reserved
|
||||
(fp)0,
|
||||
//;0xffffffd0 Exception(Supervisor Instruction)
|
||||
INT_Excep_SuperVisorInst,
|
||||
//;0xffffffd4 Exception(Access Instruction)
|
||||
INT_Excep_AccessInst,
|
||||
//;0xffffffd8 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffdc Exception(Undefined Instruction)
|
||||
INT_Excep_UndefinedInst,
|
||||
//;0xffffffe0 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffe4 Exception(Floating Point)
|
||||
INT_Excep_FloatingPoint,
|
||||
//;0xffffffe8 Reserved
|
||||
(fp)0,
|
||||
//;0xffffffec Reserved
|
||||
(fp)0,
|
||||
//;0xfffffff0 Reserved
|
||||
(fp)0,
|
||||
//;0xfffffff4 Reserved
|
||||
(fp)0,
|
||||
//;0xfffffff8 NMI
|
||||
INT_NonMaskableInterrupt,
|
||||
};
|
||||
|
||||
#define FVECT_SECT __attribute__ ((section (".fvectors")))
|
||||
|
||||
const void *HardwareVectors[] FVECT_SECT = {
|
||||
//;0xfffffffc RESET
|
||||
//;<<VECTOR DATA START (POWER ON RESET)>>
|
||||
//;Power On Reset PC
|
||||
/*(void*)*/ PowerON_Reset
|
||||
//;<<VECTOR DATA END (POWER ON RESET)>>
|
||||
};
|
||||
|
||||
#define RVECT_SECT __attribute__ ((section (".rvectors")))
|
||||
|
||||
const fp RelocatableVectors[] RVECT_SECT = {
|
||||
//;0x0000 Reserved
|
||||
(fp)0,
|
||||
//;0x0004 Reserved
|
||||
(fp)0,
|
||||
//;0x0008 Reserved
|
||||
(fp)0,
|
||||
//;0x000C Reserved
|
||||
(fp)0,
|
||||
//;0x0010 Reserved
|
||||
(fp)0,
|
||||
//;0x0014 Reserved
|
||||
(fp)0,
|
||||
//;0x0018 Reserved
|
||||
(fp)0,
|
||||
//;0x001C Reserved
|
||||
(fp)0,
|
||||
//;0x0020 Reserved
|
||||
(fp)0,
|
||||
//;0x0024 Reserved
|
||||
(fp)0,
|
||||
//;0x0028 Reserved
|
||||
(fp)0,
|
||||
//;0x002C Reserved
|
||||
(fp)0,
|
||||
//;0x0030 Reserved
|
||||
(fp)0,
|
||||
//;0x0034 Reserved
|
||||
(fp)0,
|
||||
//;0x0038 Reserved
|
||||
(fp)0,
|
||||
//;0x003C Reserved
|
||||
(fp)0,
|
||||
//;0x0040 BSC_BUSERR
|
||||
(fp)INT_Excep_BSC_BUSERR,
|
||||
//;0x0044 Reserved
|
||||
(fp)0,
|
||||
//;0x0048 Reserved
|
||||
(fp)0,
|
||||
//;0x004C Reserved
|
||||
(fp)0,
|
||||
//;0x0050 Reserved
|
||||
(fp)0,
|
||||
//;0x0054 Reserved
|
||||
(fp)0,
|
||||
//;0x0058 Reserved
|
||||
(fp)0,
|
||||
//;0x005C FCU_FRDYI
|
||||
(fp)INT_Excep_FCU_FRDYI,
|
||||
//;0x0060 Reserved
|
||||
(fp)0,
|
||||
//;0x0064 Reserved
|
||||
(fp)0,
|
||||
//;0x0068 Reserved
|
||||
(fp)0,
|
||||
//;0x006C ICU_SWINT
|
||||
(fp)vSoftwareInterruptISR,
|
||||
//;0x0070 CMT0_CMI0
|
||||
(fp)vTickISR,
|
||||
//;0x0074 CMT1_CMI1
|
||||
(fp)INT_Excep_CMT1_CMI1,
|
||||
//;0x0078 CMT2_CMI2
|
||||
(fp)INT_Excep_CMT2_CMI2,
|
||||
//;0x007C CMT3_CMI3
|
||||
(fp)INT_Excep_CMT3_CMI3,
|
||||
//;0x0080 CAC_FERRF
|
||||
(fp)INT_Excep_CAC_FERRF,
|
||||
//;0x0084 CAC_MENDF
|
||||
(fp)INT_Excep_CAC_MENDF,
|
||||
//;0x0088 CAC_OVFF
|
||||
(fp)INT_Excep_CAC_OVFF,
|
||||
//;0x008C Reserved
|
||||
(fp)0,
|
||||
//;0x0090 USB0_D0FIFO0
|
||||
(fp)INT_Excep_USB0_D0FIFO0,
|
||||
//;0x0094 USB0_D1FIFO0
|
||||
(fp)INT_Excep_USB0_D1FIFO0,
|
||||
//;0x0098 USB0_USBI0
|
||||
(fp)INT_Excep_USB0_USBI0,
|
||||
//;0x009C Reserved
|
||||
(fp)0,
|
||||
//;0x00A0 SDHI_SBFAI
|
||||
(fp)INT_Excep_SDHI_SBFAI,
|
||||
//;0x00A4 SDHI_CDETI
|
||||
(fp)INT_Excep_SDHI_CDETI,
|
||||
//;0x00A8 SDHI_CACI
|
||||
(fp)INT_Excep_SDHI_CACI,
|
||||
//;0x00AC SDHI_SDACI
|
||||
(fp)INT_Excep_SDHI_SDACI,
|
||||
//;0x00B0 RSPI0_SPEI0
|
||||
(fp)INT_Excep_RSPI0_SPEI0,
|
||||
//;0x00B4 RSPI0_SPRI0
|
||||
(fp)INT_Excep_RSPI0_SPRI0,
|
||||
//;0x00B8 RSPI0_SPTI0
|
||||
(fp)INT_Excep_RSPI0_SPTI0,
|
||||
//;0x00BC RSPI0_SPII0
|
||||
(fp)INT_Excep_RSPI0_SPII0,
|
||||
//;0x00C0 Reserved
|
||||
(fp)0,
|
||||
//;0x00C4 Reserved
|
||||
(fp)0,
|
||||
//;0x00C8 Reserved
|
||||
(fp)0,
|
||||
//;0x00CC Reserved
|
||||
(fp)0,
|
||||
//;0x00D0 CAN_COMFRXINT
|
||||
(fp)INT_Excep_RSCAN_COMFRXINT,
|
||||
//;0x00D4 CAN_RXFINT
|
||||
(fp)INT_Excep_RSCAN_RXFINT,
|
||||
//;0x00D8 CAN_TXINT
|
||||
(fp)INT_Excep_RSCAN_TXINT,
|
||||
//;0x00DC CAN_CHERRINT
|
||||
(fp)INT_Excep_RSCAN_CHERRINT,
|
||||
//;0x00E0 CAN_GLERRINT
|
||||
(fp)INT_Excep_RSCAN_GLERRINT,
|
||||
//;0x00E4 DOC_DOPCF
|
||||
(fp)INT_Excep_DOC_DOPCF,
|
||||
//;0x00E8 CMPB_CMPB0
|
||||
(fp)INT_Excep_CMPB_CMPB0,
|
||||
//;0x00EC CMPB_CMPB1
|
||||
(fp)INT_Excep_CMPB_CMPB1,
|
||||
//;0x00F0 CTSU_CTSUWR
|
||||
(fp)INT_Excep_CTSU_CTSUWR,
|
||||
//;0x00F4 CTSU_CTSURD
|
||||
(fp)INT_Excep_CTSU_CTSURD,
|
||||
//;0x00F8 CTSU_CTSUFN
|
||||
(fp)INT_Excep_CTSU_CTSUFN,
|
||||
//;0x00FC RTC_CUP
|
||||
(fp)INT_Excep_RTC_CUP,
|
||||
//;0x0100 ICU_IRQ0
|
||||
(fp)INT_Excep_ICU_IRQ0,
|
||||
//;0x0104 ICU_IRQ1
|
||||
(fp)INT_Excep_ICU_IRQ1,
|
||||
//;0x0108 ICU_IRQ2
|
||||
(fp)INT_Excep_ICU_IRQ2,
|
||||
//;0x010C ICU_IRQ3
|
||||
(fp)INT_Excep_ICU_IRQ3,
|
||||
//;0x0110 ICU_IRQ4
|
||||
(fp)INT_Excep_ICU_IRQ4,
|
||||
//;0x0114 ICU_IRQ5
|
||||
(fp)INT_Excep_ICU_IRQ5,
|
||||
//;0x0118 ICU_IRQ6
|
||||
(fp)INT_Excep_ICU_IRQ6,
|
||||
//;0x011C ICU_IRQ7
|
||||
(fp)INT_Excep_ICU_IRQ7,
|
||||
//;0x0120 Reserved
|
||||
(fp)0,
|
||||
//;0x0124 Reserved
|
||||
(fp)0,
|
||||
//;0x0128 Reserved
|
||||
(fp)0,
|
||||
//;0x012C Reserved
|
||||
(fp)0,
|
||||
//;0x0130 Reserved
|
||||
(fp)0,
|
||||
//;0x0134 Reserved
|
||||
(fp)0,
|
||||
//;0x0138 Reserved
|
||||
(fp)0,
|
||||
//;0x013C Reserved
|
||||
(fp)0,
|
||||
//;0x0140 ELC_ELSR8I
|
||||
(fp)INT_Excep_ELC_ELSR8I,
|
||||
//;0x0144 Reserved
|
||||
(fp)0,
|
||||
//;0x0148 Reserved
|
||||
(fp)0,
|
||||
//;0x014C Reserved
|
||||
(fp)0,
|
||||
//;0x0150 Reserved
|
||||
(fp)0,
|
||||
//;0x0154 Reserved
|
||||
(fp)0,
|
||||
//;0x0158 Reserved
|
||||
(fp)0,
|
||||
//;0x015C Reserved
|
||||
(fp)0,
|
||||
//;0x0160 LVD/CMPA_LVD1/CMPA1
|
||||
(fp)INT_Excep_LVD_LVD1,
|
||||
//;0x0164 LVD/CMPA_LVD2/CMPA2
|
||||
(fp)INT_Excep_LVD_LVD2,
|
||||
//;0x0168 USB0_USBR0
|
||||
(fp)INT_Excep_USB0_USBR0,
|
||||
//;0x016C VBATT_VBTLVDI
|
||||
(fp)INT_Excep_VBATT_VBTLVDI,
|
||||
//;0x0170 RTC_ALM
|
||||
(fp)INT_Excep_RTC_ALM,
|
||||
//;0x0174 RTC_PRD
|
||||
(fp)INT_Excep_RTC_PRD,
|
||||
//;0x0178 Reserved
|
||||
(fp)0,
|
||||
//;0x017C Reserved
|
||||
(fp)0,
|
||||
//;0x0180 Reserved
|
||||
(fp)0,
|
||||
//;0x0184 Reserved
|
||||
(fp)0,
|
||||
//;0x0188 Reserved
|
||||
(fp)0,
|
||||
//;0x018C Reserved
|
||||
(fp)0,
|
||||
//;0x0190 Reserved
|
||||
(fp)0,
|
||||
//;0x0194 Reserved
|
||||
(fp)0,
|
||||
//;0x0198 S12AD_S12ADI0
|
||||
(fp)INT_Excep_S12AD_S12ADI0,
|
||||
//;0x019C S12AD_GBADI
|
||||
(fp)INT_Excep_S12AD_GBADI,
|
||||
//;0x01A0 CMPB1_CMPB2
|
||||
(fp)INT_Excep_CMPB1_CMPB2,
|
||||
//;0x01A4 CMPB1_CMPB3
|
||||
(fp)INT_Excep_CMPB1_CMPB3,
|
||||
//;0x01A8 ELC_ELSR18I
|
||||
(fp)INT_Excep_ELC_ELSR18I,
|
||||
//;0x01AC ELC_ELSR19I
|
||||
(fp)INT_Excep_ELC_ELSR19I,
|
||||
//;0x01B0 SSI0_SSIF0
|
||||
(fp)INT_Excep_SSI0_SSIF0,
|
||||
//;0x01B4 SSI0_SSIRXI0
|
||||
(fp)INT_Excep_SSI0_SSIRXI0,
|
||||
//;0x01B8 SSI0_SSITXI0
|
||||
(fp)INT_Excep_SSI0_SSITXI0,
|
||||
//;0x01BC Secure_RD
|
||||
(fp)INT_Excep_SECURITY_RD,
|
||||
//;0x01C0 Secure_WR
|
||||
(fp)INT_Excep_SECURITY_WR,
|
||||
//;0x01C4 Secure_Error
|
||||
(fp)INT_Excep_SECURITY_ERR,
|
||||
//;0x01C8 MTU0_TGIA0
|
||||
(fp)INT_Excep_MTU0_TGIA0,
|
||||
//;0x01CC MTU0_TGIB0
|
||||
(fp)INT_Excep_MTU0_TGIB0,
|
||||
//;0x01D0 MTU0_TGIC0
|
||||
(fp)INT_Excep_MTU0_TGIC0,
|
||||
//;0x01D4 MTU0_TGID0
|
||||
(fp)INT_Excep_MTU0_TGID0,
|
||||
//;0x01D8 MTU0_TCIV0
|
||||
(fp)INT_Excep_MTU0_TCIV0,
|
||||
//;0x01DC MTU0_TGIE0
|
||||
(fp)INT_Excep_MTU0_TGIE0,
|
||||
//;0x01E0 MTU0_TGIF0
|
||||
(fp)INT_Excep_MTU0_TGIF0,
|
||||
//;0x01E4 MTU1_TGIA1
|
||||
(fp)INT_Excep_MTU1_TGIA1,
|
||||
//;0x01E8 MTU1_TGIB1
|
||||
(fp)INT_Excep_MTU1_TGIB1,
|
||||
//;0x01EC MTU1_TCIV1
|
||||
(fp)INT_Excep_MTU1_TCIV1,
|
||||
//;0x01F0 MTU1_TCIU1
|
||||
(fp)INT_Excep_MTU1_TCIU1,
|
||||
//;0x01F4 MTU2_TGIA2
|
||||
(fp)INT_Excep_MTU2_TGIA2,
|
||||
//;0x01F8 MTU2_TGIB2
|
||||
(fp)INT_Excep_MTU2_TGIB2,
|
||||
//;0x01FC MTU2_TCIV2
|
||||
(fp)INT_Excep_MTU2_TCIV2,
|
||||
//;0x0200 MTU2_TCIU2
|
||||
(fp)INT_Excep_MTU2_TCIU2,
|
||||
//;0x0204 MTU3_TGIA3
|
||||
(fp)INT_Excep_MTU3_TGIA3,
|
||||
//;0x0208 MTU3_TGIB3
|
||||
(fp)INT_Excep_MTU3_TGIB3,
|
||||
//;0x020C MTU3_TGIC3
|
||||
(fp)INT_Excep_MTU3_TGIC3,
|
||||
//;0x0210 MTU3_TGID3
|
||||
(fp)INT_Excep_MTU3_TGID3,
|
||||
//;0x0214 MTU3_TCIV3
|
||||
(fp)INT_Excep_MTU3_TCIV3,
|
||||
//;0x0218 MTU4_TGIA4
|
||||
(fp)INT_Excep_MTU4_TGIA4,
|
||||
//;0x021C MTU4_TGIB4
|
||||
(fp)INT_Excep_MTU4_TGIB4,
|
||||
//;0x0220 MTU4_TGIC4
|
||||
(fp)INT_Excep_MTU4_TGIC4,
|
||||
//;0x0224 MTU4_TGID4
|
||||
(fp)INT_Excep_MTU4_TGID4,
|
||||
//;0x0228 MTU4_TCIV4
|
||||
(fp)INT_Excep_MTU4_TCIV4,
|
||||
//;0x022C MTU5_TGIU5
|
||||
(fp)INT_Excep_MTU5_TGIU5,
|
||||
//;0x0230 MTU5_TGIV5
|
||||
(fp)INT_Excep_MTU5_TGIV5,
|
||||
//;0x0234 MTU5_TGIW5
|
||||
(fp)INT_Excep_MTU5_TGIW5,
|
||||
//;0x0238 TPU0_TGI0A
|
||||
(fp)INT_Excep_TPU0_TGI0A,
|
||||
//;0x023C TPU0_TGI0B
|
||||
(fp)INT_Excep_TPU0_TGI0B,
|
||||
//;0x0240 TPU0_TGI0C
|
||||
(fp)INT_Excep_TPU0_TGI0C,
|
||||
//;0x0244 TPU0_TGI0D
|
||||
(fp)INT_Excep_TPU0_TGI0D,
|
||||
//;0x0248 TPU0_TCI0V
|
||||
(fp)INT_Excep_TPU0_TCI0V,
|
||||
//;0x024C TPU1_TGI1A
|
||||
(fp)INT_Excep_TPU1_TGI1A,
|
||||
//;0x0250 TPU1_TGI1B
|
||||
(fp)INT_Excep_TPU1_TGI1B,
|
||||
//;0x0254 TPU1_TCI1V
|
||||
(fp)INT_Excep_TPU1_TCI1V,
|
||||
//;0x0258 TPU1_TCI1U
|
||||
(fp)INT_Excep_TPU1_TCI1U,
|
||||
//;0x025C TPU2_TGI2A
|
||||
(fp)INT_Excep_TPU2_TGI2A,
|
||||
//;0x0260 TPU2_TGI2B
|
||||
(fp)INT_Excep_TPU2_TGI2B,
|
||||
//;0x0264 TPU2_TCI2V
|
||||
(fp)INT_Excep_TPU2_TCI2V,
|
||||
//;0x0268 TPU2_TCI2U
|
||||
(fp)INT_Excep_TPU2_TCI2U,
|
||||
//;0x026C TPU3_TGI3A
|
||||
(fp)INT_Excep_TPU3_TGI3A,
|
||||
//;0x0270 TPU3_TGI3B
|
||||
(fp)INT_Excep_TPU3_TGI3B,
|
||||
//;0x0274 TPU3_TGI3C
|
||||
(fp)INT_Excep_TPU3_TGI3C,
|
||||
//;0x0278 TPU3_TGI3D
|
||||
(fp)INT_Excep_TPU3_TGI3D,
|
||||
//;0x027C TPU3_TCI3V
|
||||
(fp)INT_Excep_TPU3_TCI3V,
|
||||
//;0x0280 TPU4_TGI4A
|
||||
(fp)INT_Excep_TPU4_TGI4A,
|
||||
//;0x0284 TPU4_TGI4B
|
||||
(fp)INT_Excep_TPU4_TGI4B,
|
||||
//;0x0288 TPU4_TCI4V
|
||||
(fp)INT_Excep_TPU4_TCI4V,
|
||||
//;0x028C TPU4_TCI4U
|
||||
(fp)INT_Excep_TPU4_TCI4U,
|
||||
//;0x0290 TPU5_TGI5A
|
||||
(fp)INT_Excep_TPU5_TGI5A,
|
||||
//;0x0294 TPU5_TGI5B
|
||||
(fp)INT_Excep_TPU5_TGI5B,
|
||||
//;0x0298 TPU5_TCI5V
|
||||
(fp)INT_Excep_TPU5_TCI5V,
|
||||
//;0x029C TPU5_TCI5U
|
||||
(fp)INT_Excep_TPU5_TCI5U,
|
||||
//;0x02A0 Reserved
|
||||
(fp)0,
|
||||
//;0x02A4 Reserved
|
||||
(fp)0,
|
||||
//;0x02A8 POE_OEI1
|
||||
(fp)INT_Excep_POE_OEI1,
|
||||
//;0x02AC POE_OEI2
|
||||
(fp)INT_Excep_POE_OEI2,
|
||||
//;0x02B0 Reserved
|
||||
(fp)0,
|
||||
//;0x02B4 Reserved
|
||||
(fp)0,
|
||||
//;0x02B8 TMR0_CMIA0
|
||||
(fp)vIntQTimerISR0,
|
||||
//;0x02BC TMR0_CMIB0
|
||||
(fp)INT_Excep_TMR0_CMIB0,
|
||||
//;0x02C0 TMR0_OVI0
|
||||
(fp)INT_Excep_TMR0_OVI0,
|
||||
//;0x02C4 TMR1_CMIA1
|
||||
(fp)INT_Excep_TMR1_CMIA1,
|
||||
//;0x02C8 TMR1_CMIB1
|
||||
(fp)INT_Excep_TMR1_CMIB1,
|
||||
//;0x02CC TMR1_OVI1
|
||||
(fp)INT_Excep_TMR1_OVI1,
|
||||
//;0x02D0 TMR2_CMIA2
|
||||
(fp)vIntQTimerISR1,
|
||||
//;0x02D4 TMR2_CMIB2
|
||||
(fp)INT_Excep_TMR2_CMIB2,
|
||||
//;0x02D8 TMR2_OVI2
|
||||
(fp)INT_Excep_TMR2_OVI2,
|
||||
//;0x02DC TMR3_CMIA3
|
||||
(fp)INT_Excep_TMR3_CMIA3,
|
||||
//;0x02E0 TMR3_CMIB3
|
||||
(fp)INT_Excep_TMR3_CMIB3,
|
||||
//;0x02E4 TMR3_OVI3
|
||||
(fp)INT_Excep_TMR3_OVI3,
|
||||
//;0x02E8 Reserved
|
||||
(fp)0,
|
||||
//;0x02EC Reserved
|
||||
(fp)0,
|
||||
//;0x02F0 Reserved
|
||||
(fp)0,
|
||||
//;0x02F4 Reserved
|
||||
(fp)0,
|
||||
//;0x02F8 Reserved
|
||||
(fp)0,
|
||||
//;0x02FC Reserved
|
||||
(fp)0,
|
||||
//;0x0300 Reserved
|
||||
(fp)0,
|
||||
//;0x0304 Reserved
|
||||
(fp)0,
|
||||
//;0x0308 Reserved
|
||||
(fp)0,
|
||||
//;0x030C Reserved
|
||||
(fp)0,
|
||||
//;0x0310 Reserved
|
||||
(fp)0,
|
||||
//;0x0314 Reserved
|
||||
(fp)0,
|
||||
//;0x0318 DMAC_DMAC0I
|
||||
(fp)INT_Excep_DMAC_DMAC0I,
|
||||
//;0x031C DMAC_DMAC1I
|
||||
(fp)INT_Excep_DMAC_DMAC1I,
|
||||
//;0x0320 DMAC_DMAC2I
|
||||
(fp)INT_Excep_DMAC_DMAC2I,
|
||||
//;0x0324 DMAC_DMAC3I
|
||||
(fp)INT_Excep_DMAC_DMAC3I,
|
||||
//;0x0328 Reserved
|
||||
(fp)0,
|
||||
//;0x032C Reserved
|
||||
(fp)0,
|
||||
//;0x0330 Reserved
|
||||
(fp)0,
|
||||
//;0x0334 Reserved
|
||||
(fp)0,
|
||||
//;0x0338 Reserved
|
||||
(fp)0,
|
||||
//;0x033C Reserved
|
||||
(fp)0,
|
||||
//;0x0340 Reserved
|
||||
(fp)0,
|
||||
//;0x0344 Reserved
|
||||
(fp)0,
|
||||
//;0x0348 Reserved
|
||||
(fp)0,
|
||||
//;0x034C Reserved
|
||||
(fp)0,
|
||||
//;0x0350 Reserved
|
||||
(fp)0,
|
||||
//;0x0354 Reserved
|
||||
(fp)0,
|
||||
//;0x0358 SCI0_ERI0
|
||||
(fp)INT_Excep_SCI0_ERI0,
|
||||
//;0x035C SCI0_RXI0
|
||||
(fp)INT_Excep_SCI0_RXI0,
|
||||
//;0x0360 SCI0_TXI0
|
||||
(fp)INT_Excep_SCI0_TXI0,
|
||||
//;0x0364 SCI0_TEI0
|
||||
(fp)INT_Excep_SCI0_TEI0,
|
||||
//;0x0368 SCI1_ERI1
|
||||
(fp)INT_Excep_SCI1_ERI1,
|
||||
//;0x036C SCI1_RXI1
|
||||
(fp)INT_Excep_SCI1_RXI1,
|
||||
//;0x0370 SCI1_TXI1
|
||||
(fp)INT_Excep_SCI1_TXI1,
|
||||
//;0x0374 SCI1_TEI1
|
||||
(fp)INT_Excep_SCI1_TEI1,
|
||||
//;0x0378 SCI5_ERI5
|
||||
(fp)INT_Excep_SCI5_ERI5,
|
||||
//;0x037C SCI5_RXI5
|
||||
(fp)INT_Excep_SCI5_RXI5,
|
||||
//;0x0380 SCI5_TXI5
|
||||
(fp)INT_Excep_SCI5_TXI5,
|
||||
//;0x0384 SCI5_TEI5
|
||||
(fp)INT_Excep_SCI5_TEI5,
|
||||
//;0x0388 SCI6_ERI6
|
||||
(fp)INT_Excep_SCI6_ERI6,
|
||||
//;0x038C SCI6_RXI6
|
||||
(fp)INT_Excep_SCI6_RXI6,
|
||||
//;0x0390 SCI6_TXI6
|
||||
(fp)INT_Excep_SCI6_TXI6,
|
||||
//;0x0394 SCI6_TEI6
|
||||
(fp)INT_Excep_SCI6_TEI6,
|
||||
//;0x0398 SCI8_ERI8
|
||||
(fp)INT_Excep_SCI8_ERI8,
|
||||
//;0x039C SCI8_RXI8
|
||||
(fp)INT_Excep_SCI8_RXI8,
|
||||
//;0x03A0 SCI8_TXI8
|
||||
(fp)INT_Excep_SCI8_TXI8,
|
||||
//;0x03A4 SCI8_TEI8
|
||||
(fp)INT_Excep_SCI8_TEI8,
|
||||
//;0x03A8 SCI9_ERI9
|
||||
(fp)INT_Excep_SCI9_ERI9,
|
||||
//;0x03AC SCI9_RXI9
|
||||
(fp)INT_Excep_SCI9_RXI9,
|
||||
//;0x03B0 SCI9_TXI9
|
||||
(fp)INT_Excep_SCI9_TXI9,
|
||||
//;0x03B4 SCI9_TEI9
|
||||
(fp)INT_Excep_SCI9_TEI9,
|
||||
//;0x03B8 SCI12_ERI12
|
||||
(fp)INT_Excep_SCI12_ERI12,
|
||||
//;0x03BC SCI12_RXI12
|
||||
(fp)INT_Excep_SCI12_RXI12,
|
||||
//;0x03C0 SCI12_TXI12
|
||||
(fp)INT_Excep_SCI12_TXI12,
|
||||
//;0x03C4 SCI12_TEI12
|
||||
(fp)INT_Excep_SCI12_TEI12,
|
||||
//;0x03C8 SCI12_SCIX0
|
||||
(fp)INT_Excep_SCI12_SCIX0,
|
||||
//;0x03CC SCI12_SCIX1
|
||||
(fp)INT_Excep_SCI12_SCIX1,
|
||||
//;0x03D0 SCI12_SCIX2
|
||||
(fp)INT_Excep_SCI12_SCIX2,
|
||||
//;0x03D4 SCI12_SCIX3
|
||||
(fp)INT_Excep_SCI12_SCIX3,
|
||||
//;0x03D8 RIIC0_EEI0
|
||||
(fp)INT_Excep_RIIC0_EEI0,
|
||||
//;0x03DC RIIC0_RXI0
|
||||
(fp)INT_Excep_RIIC0_RXI0,
|
||||
//;0x03E0 RIIC0_TXI0
|
||||
(fp)INT_Excep_RIIC0_TXI0,
|
||||
//;0x03E4 RIIC0_TEI0
|
||||
(fp)INT_Excep_RIIC0_TEI0,
|
||||
//;0x03E8 Reserved
|
||||
(fp)0,
|
||||
//;0x03EC Reserved
|
||||
(fp)0,
|
||||
//;0x03F0 Reserved
|
||||
(fp)0,
|
||||
//;0x03F4 Reserved
|
||||
(fp)0,
|
||||
//;0x03F8 Reserved
|
||||
(fp)0,
|
||||
//;0x03FC Reserved
|
||||
(fp)0,
|
||||
};
|
||||
|
|
@ -0,0 +1,115 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_cgc.c
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file implements device driver for CGC module.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Pragma directive
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for pragma. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Includes
|
||||
***********************************************************************************************************************/
|
||||
#include "r_cg_macrodriver.h"
|
||||
#include "r_cg_cgc.h"
|
||||
/* Start user code for include. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
#include "r_cg_userdefine.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Global variables and functions
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for global. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: R_CGC_Create
|
||||
* Description : This function initializes the clock generator.
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void R_CGC_Create(void)
|
||||
{
|
||||
uint32_t sckcr_dummy;
|
||||
volatile uint32_t memorywaitcycle;
|
||||
|
||||
/* Set main clock control registers */
|
||||
SYSTEM.MOFCR.BYTE = _00_CGC_MAINOSC_RESONATOR | _00_CGC_MAINOSC_UNDER10M;
|
||||
SYSTEM.MOSCWTCR.BYTE = _06_CGC_OSC_WAIT_CYCLE_32768;
|
||||
|
||||
/* Set main clock operation */
|
||||
SYSTEM.MOSCCR.BIT.MOSTP = 0U;
|
||||
|
||||
/* Wait for main clock oscillator wait counter overflow */
|
||||
while (1U != SYSTEM.OSCOVFSR.BIT.MOOVF);
|
||||
|
||||
/* Set system clock */
|
||||
sckcr_dummy = _00000000_CGC_PCLKD_DIV_1 | _00000100_CGC_PCLKB_DIV_2 | _00001000_CGC_PCLKA_DIV_2 |
|
||||
_00010000_CGC_BCLK_DIV_2 | _00000000_CGC_ICLK_DIV_1 | _10000000_CGC_FCLK_DIV_2;
|
||||
SYSTEM.SCKCR.LONG = sckcr_dummy;
|
||||
|
||||
while (SYSTEM.SCKCR.LONG != sckcr_dummy);
|
||||
|
||||
/* Set PLL circuit */
|
||||
SYSTEM.PLLCR.WORD = _0000_CGC_PLL_FREQ_DIV_1 | _0C00_CGC_PLL_FREQ_MUL_6_5;
|
||||
SYSTEM.PLLCR2.BIT.PLLEN = 0U;
|
||||
|
||||
/* Wait for PLL wait counter overflow */
|
||||
while (1U != SYSTEM.OSCOVFSR.BIT.PLOVF);
|
||||
|
||||
/* Disable sub-clock */
|
||||
SYSTEM.SOSCCR.BIT.SOSTP = 1U;
|
||||
|
||||
/* Wait for the register modification to complete */
|
||||
while (1U != SYSTEM.SOSCCR.BIT.SOSTP);
|
||||
|
||||
/* Disable sub-clock */
|
||||
RTC.RCR3.BIT.RTCEN = 0U;
|
||||
|
||||
/* Wait for the register modification to complete */
|
||||
while (0U != RTC.RCR3.BIT.RTCEN);
|
||||
|
||||
/* Set BCLK */
|
||||
SYSTEM.SCKCR.BIT.PSTOP1 = 1U;
|
||||
|
||||
/* Set memory wait cycle setting register */
|
||||
SYSTEM.MEMWAIT.BIT.MEMWAIT = 1U;
|
||||
memorywaitcycle = SYSTEM.MEMWAIT.BYTE;
|
||||
memorywaitcycle++;
|
||||
|
||||
/* Set clock source */
|
||||
SYSTEM.SCKCR3.WORD = _0400_CGC_CLOCKSOURCE_PLL;
|
||||
|
||||
while (SYSTEM.SCKCR3.WORD != _0400_CGC_CLOCKSOURCE_PLL);
|
||||
|
||||
/* Set LOCO */
|
||||
SYSTEM.LOCOCR.BIT.LCSTP = 1U;
|
||||
}
|
||||
|
||||
/* Start user code for adding. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
|
@ -0,0 +1,227 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_cgc.h
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file implements device driver for CGC module.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
#ifndef CGC_H
|
||||
#define CGC_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Macro definitions (Register bit)
|
||||
***********************************************************************************************************************/
|
||||
/*
|
||||
System Clock Control Register (SCKCR)
|
||||
*/
|
||||
/* Peripheral Module Clock D (PCLKD) */
|
||||
#define _00000000_CGC_PCLKD_DIV_1 (0x00000000UL) /* x1 */
|
||||
#define _00000001_CGC_PCLKD_DIV_2 (0x00000001UL) /* x1/2 */
|
||||
#define _00000002_CGC_PCLKD_DIV_4 (0x00000002UL) /* x1/4 */
|
||||
#define _00000003_CGC_PCLKD_DIV_8 (0x00000003UL) /* x1/8 */
|
||||
#define _00000004_CGC_PCLKD_DIV_16 (0x00000004UL) /* x1/16 */
|
||||
#define _00000005_CGC_PCLKD_DIV_32 (0x00000005UL) /* x1/32 */
|
||||
#define _00000006_CGC_PCLKD_DIV_64 (0x00000006UL) /* x1/64 */
|
||||
/* Peripheral Module Clock B (PCLKB) */
|
||||
#define _00000000_CGC_PCLKB_DIV_1 (0x00000000UL) /* x1 */
|
||||
#define _00000100_CGC_PCLKB_DIV_2 (0x00000100UL) /* x1/2 */
|
||||
#define _00000200_CGC_PCLKB_DIV_4 (0x00000200UL) /* x1/4 */
|
||||
#define _00000300_CGC_PCLKB_DIV_8 (0x00000300UL) /* x1/8 */
|
||||
#define _00000400_CGC_PCLKB_DIV_16 (0x00000400UL) /* x1/16 */
|
||||
#define _00000500_CGC_PCLKB_DIV_32 (0x00000500UL) /* x1/32 */
|
||||
#define _00000600_CGC_PCLKB_DIV_64 (0x00000600UL) /* x1/64 */
|
||||
/* Peripheral Module Clock A (PCLKA) */
|
||||
#define _00000000_CGC_PCLKA_DIV_1 (0x00000000UL) /* x1 */
|
||||
#define _00001000_CGC_PCLKA_DIV_2 (0x00001000UL) /* x1/2 */
|
||||
#define _00002000_CGC_PCLKA_DIV_4 (0x00002000UL) /* x1/4 */
|
||||
#define _00003000_CGC_PCLKA_DIV_8 (0x00003000UL) /* x1/8 */
|
||||
#define _00004000_CGC_PCLKA_DIV_16 (0x00004000UL) /* x1/16 */
|
||||
#define _00005000_CGC_PCLKA_DIV_32 (0x00005000UL) /* x1/32 */
|
||||
#define _00006000_CGC_PCLKA_DIV_64 (0x00006000UL) /* x1/64 */
|
||||
/* External Bus Clock (BCLK) */
|
||||
#define _00000000_CGC_BCLK_DIV_1 (0x00000000UL) /* x1 */
|
||||
#define _00010000_CGC_BCLK_DIV_2 (0x00010000UL) /* x1/2 */
|
||||
#define _00020000_CGC_BCLK_DIV_4 (0x00020000UL) /* x1/4 */
|
||||
#define _00030000_CGC_BCLK_DIV_8 (0x00030000UL) /* x1/8 */
|
||||
#define _00040000_CGC_BCLK_DIV_16 (0x00040000UL) /* x1/16 */
|
||||
#define _00050000_CGC_BCLK_DIV_32 (0x00050000UL) /* x1/32 */
|
||||
#define _00060000_CGC_BCLK_DIV_64 (0x00060000UL) /* x1/64 */
|
||||
/* System Clock (ICLK) */
|
||||
#define _00000000_CGC_ICLK_DIV_1 (0x00000000UL) /* x1 */
|
||||
#define _01000000_CGC_ICLK_DIV_2 (0x01000000UL) /* x1/2 */
|
||||
#define _02000000_CGC_ICLK_DIV_4 (0x02000000UL) /* x1/4 */
|
||||
#define _03000000_CGC_ICLK_DIV_8 (0x03000000UL) /* x1/8 */
|
||||
#define _04000000_CGC_ICLK_DIV_16 (0x04000000UL) /* x1/16 */
|
||||
#define _05000000_CGC_ICLK_DIV_32 (0x05000000UL) /* x1/32 */
|
||||
#define _06000000_CGC_ICLK_DIV_64 (0x06000000UL) /* x1/64 */
|
||||
/* System Clock (FCLK) */
|
||||
#define _00000000_CGC_FCLK_DIV_1 (0x00000000UL) /* x1 */
|
||||
#define _10000000_CGC_FCLK_DIV_2 (0x10000000UL) /* x1/2 */
|
||||
#define _20000000_CGC_FCLK_DIV_4 (0x20000000UL) /* x1/4 */
|
||||
#define _30000000_CGC_FCLK_DIV_8 (0x30000000UL) /* x1/8 */
|
||||
#define _40000000_CGC_FCLK_DIV_16 (0x40000000UL) /* x1/16 */
|
||||
#define _50000000_CGC_FCLK_DIV_32 (0x50000000UL) /* x1/32 */
|
||||
#define _60000000_CGC_FCLK_DIV_64 (0x60000000UL) /* x1/64 */
|
||||
|
||||
/*
|
||||
System Clock Control Register 3 (SCKCR3)
|
||||
*/
|
||||
#define _0000_CGC_CLOCKSOURCE_LOCO (0x0000U) /* LOCO */
|
||||
#define _0100_CGC_CLOCKSOURCE_HOCO (0x0100U) /* HOCO */
|
||||
#define _0200_CGC_CLOCKSOURCE_MAINCLK (0x0200U) /* Main clock oscillator */
|
||||
#define _0300_CGC_CLOCKSOURCE_SUBCLK (0x0300U) /* Sub-clock oscillator */
|
||||
#define _0400_CGC_CLOCKSOURCE_PLL (0x0400U) /* PLL circuit */
|
||||
|
||||
/*
|
||||
PLL Control Register (PLLCR)
|
||||
*/
|
||||
/* PLL Input Frequency Division Ratio Select (PLIDIV[1:0]) */
|
||||
#define _0000_CGC_PLL_FREQ_DIV_1 (0x0000U) /* x1 */
|
||||
#define _0001_CGC_PLL_FREQ_DIV_2 (0x0001U) /* x1/2 */
|
||||
#define _0002_CGC_PLL_FREQ_DIV_4 (0x0002U) /* x1/4 */
|
||||
/* Frequency Multiplication Factor Select (STC[5:0]) */
|
||||
#define _0700_CGC_PLL_FREQ_MUL_4_0 (0x0700U) /* x4 */
|
||||
#define _0800_CGC_PLL_FREQ_MUL_4_5 (0x0800U) /* x4.5 */
|
||||
#define _0900_CGC_PLL_FREQ_MUL_5_0 (0x0900U) /* x5 */
|
||||
#define _0A00_CGC_PLL_FREQ_MUL_5_5 (0x0A00U) /* x5.5 */
|
||||
#define _0B00_CGC_PLL_FREQ_MUL_6_0 (0x0B00U) /* x6 */
|
||||
#define _0C00_CGC_PLL_FREQ_MUL_6_5 (0x0C00U) /* x6.5 */
|
||||
#define _0D00_CGC_PLL_FREQ_MUL_7_0 (0x0D00U) /* x7 */
|
||||
#define _0E00_CGC_PLL_FREQ_MUL_7_5 (0x0E00U) /* x7.5 */
|
||||
#define _0F00_CGC_PLL_FREQ_MUL_8_0 (0x0F00U) /* x8 */
|
||||
#define _1000_CGC_PLL_FREQ_MUL_8_5 (0x1000U) /* x8.5 */
|
||||
#define _1100_CGC_PLL_FREQ_MUL_9_0 (0x1100U) /* x9 */
|
||||
#define _1200_CGC_PLL_FREQ_MUL_9_5 (0x1200U) /* x9.5 */
|
||||
#define _1300_CGC_PLL_FREQ_MUL_10_0 (0x1300U) /* x10 */
|
||||
#define _1400_CGC_PLL_FREQ_MUL_10_5 (0x1400U) /* x10.5 */
|
||||
#define _1500_CGC_PLL_FREQ_MUL_11_0 (0x1500U) /* x11 */
|
||||
#define _1600_CGC_PLL_FREQ_MUL_11_5 (0x1600U) /* 11.5 */
|
||||
#define _1700_CGC_PLL_FREQ_MUL_12_0 (0x1700U) /* x12 */
|
||||
#define _1800_CGC_PLL_FREQ_MUL_12_5 (0x1800U) /* x12.5 */
|
||||
#define _1900_CGC_PLL_FREQ_MUL_13_0 (0x1900U) /* x13 */
|
||||
#define _1A00_CGC_PLL_FREQ_MUL_13_5 (0x1A00U) /* x13.5 */
|
||||
/*
|
||||
USB-dedicated PLL Control Register (UPLLCR)
|
||||
*/
|
||||
/* USB-dedicated PLL Input Frequency Division Ratio Select (UPLIDIV[1:0]) */
|
||||
#define _0000_CGC_UPLL_DIV_1 (0x0000U) /* x1 */
|
||||
#define _0001_CGC_UPLL_DIV_2 (0x0001U) /* x1/2 */
|
||||
#define _0002_CGC_UPLL_DIV_4 (0x0002U) /* x1/4 */
|
||||
/* UCLK Source USB-Dedicated PLL Select (UCKUPLLSEL) */
|
||||
#define _0000_CGC_UCLK_SYSCLK (0x0000U) /* System clock is selected as UCLK */
|
||||
#define _0010_CGC_UCLK_USBPLL (0x0010U) /* USB-dedicated PLL is selected as UCLK */
|
||||
/* Frequency Multiplication Factor Select (USTC[5:0]) */
|
||||
#define _0700_CGC_UPLL_MUL_4 (0x0700U) /* x4 */
|
||||
#define _0B00_CGC_UPLL_MUL_6 (0x0B00U) /* x6 */
|
||||
#define _0F00_CGC_UPLL_MUL_8 (0x0F00U) /* x8 */
|
||||
#define _1700_CGC_UPLL_MUL_12 (0x1700U) /* x12 */
|
||||
|
||||
/*
|
||||
High-Speed On-Chip Oscillator Control Register 2 (HOCOCR2)
|
||||
*/
|
||||
/* HOCO Frequency Setting (HCFRQ[1:0]) */
|
||||
#define _00_CGC_HOCO_CLK_32 (0x00U) /* 32 MHz */
|
||||
#define _03_CGC_HOCO_CLK_54 (0x03U) /* 54 MHz */
|
||||
|
||||
/*
|
||||
Oscillation Stop Detection Control Register (OSTDCR)
|
||||
*/
|
||||
/* Oscillation Stop Detection Interrupt Enable (OSTDIE) */
|
||||
#define _00_CGC_OSC_STOP_INT_DISABLE (0x00U) /* The oscillation stop detection interrupt is disabled */
|
||||
#define _01_CGC_OSC_STOP_INT_ENABLE (0x01U) /* The oscillation stop detection interrupt is enabled */
|
||||
/* Oscillation Stop Detection Function Enable (OSTDE) */
|
||||
#define _00_CGC_OSC_STOP_DISABLE (0x00U) /* Oscillation stop detection function is disabled */
|
||||
#define _80_CGC_OSC_STOP_ENABLE (0x80U) /* Oscillation stop detection function is enabled */
|
||||
|
||||
/*
|
||||
Main Clock Oscillator Wait Control Register (MOSCWTCR)
|
||||
*/
|
||||
/* Main Clock Oscillator Wait Time (MSTS[4:0]) */
|
||||
#define _00_CGC_OSC_WAIT_CYCLE_2 (0x00U) /* Wait time = 2 cycles */
|
||||
#define _01_CGC_OSC_WAIT_CYCLE_1024 (0x01U) /* Wait time = 1024 cycles */
|
||||
#define _02_CGC_OSC_WAIT_CYCLE_2048 (0x02U) /* Wait time = 2048 cycles */
|
||||
#define _03_CGC_OSC_WAIT_CYCLE_4096 (0x03U) /* Wait time = 4096 cycles */
|
||||
#define _04_CGC_OSC_WAIT_CYCLE_8192 (0x04U) /* Wait time = 8192 cycles */
|
||||
#define _05_CGC_OSC_WAIT_CYCLE_16384 (0x05U) /* Wait time = 16384 cycles */
|
||||
#define _06_CGC_OSC_WAIT_CYCLE_32768 (0x06U) /* Wait time = 32768 cycles */
|
||||
#define _07_CGC_OSC_WAIT_CYCLE_65536 (0x07U) /* Wait time = 65536 cycles */
|
||||
|
||||
/*
|
||||
Clock Output Control Register (CKOCR)
|
||||
*/
|
||||
/* Clock Output Source Select (CKOSEL[2:0]) */
|
||||
#define _0000_CGC_CLKOUT_LOCO (0x0000U) /* LOCO */
|
||||
#define _0100_CGC_CLKOUT_HOCO (0x0100U) /* HOCO */
|
||||
#define _0200_CGC_CLKOUT_MAINCLK (0x0200U) /* Main clock oscillator */
|
||||
#define _0300_CGC_CLKOUT_SUBCLK (0x0300U) /* Sub-clock oscillator */
|
||||
#define _0400_CGC_CLKOUT_PLLCLK (0x0400U) /* PLL clock oscillator */
|
||||
/* Clock Output Division Ratio Select (CKODIV[2:0]) */
|
||||
#define _0000_CGC_CLKOUT_DIV_1 (0x0000U) /* x1 */
|
||||
#define _1000_CGC_CLKOUT_DIV_2 (0x1000U) /* x1/2 */
|
||||
#define _2000_CGC_CLKOUT_DIV_4 (0x2000U) /* x1/4 */
|
||||
#define _3000_CGC_CLKOUT_DIV_8 (0x3000U) /* x1/8 */
|
||||
#define _4000_CGC_CLKOUT_DIV_16 (0x4000U) /* x1/16 */
|
||||
/* Clock Output Control (CKOSTP) */
|
||||
#define _0000_CGC_CLKOUT_ENABLE (0x0000U) /* CLKOUT pin output is operating */
|
||||
#define _8000_CGC_CLKOUT_DISABLE (0x8000U) /* CLKOUT pin output is stopped (fixed at low level) */
|
||||
|
||||
/*
|
||||
Main Clock Oscillator Forced Oscillation Control Register (MOFCR)
|
||||
*/
|
||||
/* Main Oscillator Drive Capability Switch (MODRV21) */
|
||||
#define _00_CGC_MAINOSC_UNDER10M (0x00U) /* 1 MHz to 10 MHz */
|
||||
#define _20_CGC_MAINOSC_OVER10M (0x20U) /* 10 MHz to 20 MHz */
|
||||
/* Main Clock Oscillator Switch (MOSEL) */
|
||||
#define _00_CGC_MAINOSC_RESONATOR (0x00U) /* Resonator */
|
||||
#define _40_CGC_MAINOSC_EXTERNAL (0x40U) /* External oscillator input */
|
||||
|
||||
/*
|
||||
Low-power timer control register 1 (LPTCR1)
|
||||
*/
|
||||
/* Low-Power Timer Clock Division Ratio Select (LPCNTPSSEL[2:0]) */
|
||||
#define _01_CGC_LPT_CLK_DIV_2 (0x01U) /* x1/2 */
|
||||
#define _02_CGC_LPT_CLK_DIV_4 (0x02U) /* x1/4 */
|
||||
#define _03_CGC_LPT_CLK_DIV_8 (0x03U) /* x1/8 */
|
||||
#define _04_CGC_LPT_CLK_DIV_16 (0x04U) /* x1/16 */
|
||||
#define _05_CGC_LPT_CLK_DIV_32 (0x05U) /* x1/32 */
|
||||
/* Low-Power Timer Clock Source Select (LPCNTCKSEL) */
|
||||
#define _00_CGC_LPT_SOURCE_SUB (0x00U) /* Sub-clock */
|
||||
#define _10_CGC_LPT_SOURCE_IWDT (0x10U) /* IWDT-dedicated on-chip */
|
||||
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Macro definitions
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Typedef definitions
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Global functions
|
||||
***********************************************************************************************************************/
|
||||
void R_CGC_Create(void);
|
||||
|
||||
/* Start user code for function. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
#endif
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_cgc_user.c
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file implements device driver for CGC module.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Pragma directive
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for pragma. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Includes
|
||||
***********************************************************************************************************************/
|
||||
#include "r_cg_macrodriver.h"
|
||||
#include "r_cg_cgc.h"
|
||||
/* Start user code for include. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
#include "r_cg_userdefine.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Global variables and functions
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for global. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
|
||||
/* Start user code for adding. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
|
@ -0,0 +1,92 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_hardware_setup.c
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file implements system initializing function.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Pragma directive
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for pragma. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Includes
|
||||
***********************************************************************************************************************/
|
||||
#include "r_cg_macrodriver.h"
|
||||
#include "r_cg_cgc.h"
|
||||
/* Start user code for include. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
#include "r_cg_userdefine.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Global variables and functions
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for global. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
int HardwareSetup(void);
|
||||
void R_Systeminit(void);
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: R_Systeminit
|
||||
* Description : This function initializes every macro.
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void R_Systeminit(void)
|
||||
{
|
||||
/* Enable writing to registers related to operating modes, LPC, LPT, LVD, CGC and software reset */
|
||||
SYSTEM.PRCR.WORD = 0xA50FU;
|
||||
|
||||
/* Enable writing to MPC pin function control registers */
|
||||
MPC.PWPR.BIT.B0WI = 0U;
|
||||
MPC.PWPR.BIT.PFSWE = 1U;
|
||||
|
||||
/* Set peripheral settings */
|
||||
R_CGC_Create();
|
||||
|
||||
/* Disable writing to MPC pin function control registers */
|
||||
MPC.PWPR.BIT.PFSWE = 0U;
|
||||
MPC.PWPR.BIT.B0WI = 1U;
|
||||
|
||||
/* Enable protection */
|
||||
SYSTEM.PRCR.WORD = 0xA500U;
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: HardwareSetup
|
||||
* Description : This function initializes hardware setting.
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
int HardwareSetup(void)
|
||||
{
|
||||
R_Systeminit();
|
||||
|
||||
return (1U);
|
||||
}
|
||||
|
||||
/* Start user code for adding. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_interrupt_handlers.h
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file declares interrupt handlers.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
#ifndef INTERRUPT_HANDLERS_H
|
||||
#define INTERRUPT_HANDLERS_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Macro definitions (Register bit)
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Macro definitions
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Typedef definitions
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Global functions
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/* Undefined */
|
||||
void r_undefined_exception(void) __attribute__ ((interrupt));
|
||||
|
||||
/* Access Exception */
|
||||
void r_access_exception(void) __attribute__ ((interrupt));
|
||||
|
||||
/* Privileged Instruction Exception */
|
||||
void r_privileged_exception(void) __attribute__ ((interrupt));
|
||||
|
||||
/* Floating Point Exception */
|
||||
void r_floatingpoint_exception(void) __attribute__ ((interrupt));
|
||||
|
||||
/* NMI */
|
||||
void r_nmi_exception(void) __attribute__ ((interrupt));
|
||||
|
||||
/* BRK */
|
||||
void r_brk_exception(void) __attribute__ ((interrupt));
|
||||
|
||||
/* Hardware Vectors */
|
||||
void PowerON_Reset(void) __attribute__ ((interrupt));
|
||||
|
||||
/* Idle Vectors */
|
||||
void r_undefined_exception(void) __attribute__ ((interrupt));
|
||||
void r_reserved_exception(void) __attribute__ ((interrupt));
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,98 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_macrodriver.h
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file implements general head file.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
#ifndef STATUS_H
|
||||
#define STATUS_H
|
||||
/***********************************************************************************************************************
|
||||
Includes
|
||||
***********************************************************************************************************************/
|
||||
#include "../iodefine.h"
|
||||
#include "r_cg_interrupt_handlers.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Macro definitions (Register bit)
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Macro definitions
|
||||
***********************************************************************************************************************/
|
||||
#ifndef __TYPEDEF__
|
||||
|
||||
/* Status list definition */
|
||||
#define MD_STATUSBASE (0x00U)
|
||||
#define MD_OK (MD_STATUSBASE + 0x00U) /* register setting OK */
|
||||
#define MD_SPT (MD_STATUSBASE + 0x01U) /* IIC stop */
|
||||
#define MD_NACK (MD_STATUSBASE + 0x02U) /* IIC no ACK */
|
||||
#define MD_BUSY1 (MD_STATUSBASE + 0x03U) /* busy 1 */
|
||||
#define MD_BUSY2 (MD_STATUSBASE + 0x04U) /* busy 2 */
|
||||
|
||||
/* Error list definition */
|
||||
#define MD_ERRORBASE (0x80U)
|
||||
#define MD_ERROR (MD_ERRORBASE + 0x00U) /* error */
|
||||
#define MD_ARGERROR (MD_ERRORBASE + 0x01U) /* error argument input error */
|
||||
#define MD_ERROR1 (MD_ERRORBASE + 0x02U) /* error 1 */
|
||||
#define MD_ERROR2 (MD_ERRORBASE + 0x03U) /* error 2 */
|
||||
#define MD_ERROR3 (MD_ERRORBASE + 0x04U) /* error 3 */
|
||||
#define MD_ERROR4 (MD_ERRORBASE + 0x05U) /* error 4 */
|
||||
#define MD_ERROR5 (MD_ERRORBASE + 0x06U) /* error 5 */
|
||||
|
||||
|
||||
#define nop() asm("nop;")
|
||||
#define brk() asm("brk;")
|
||||
#define wait() asm("wait;")
|
||||
|
||||
#endif
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Typedef definitions
|
||||
***********************************************************************************************************************/
|
||||
#ifndef __TYPEDEF__
|
||||
#ifndef _STDINT_H
|
||||
typedef signed char int8_t;
|
||||
typedef unsigned char uint8_t;
|
||||
typedef signed short int16_t;
|
||||
typedef unsigned short uint16_t;
|
||||
typedef signed long int32_t;
|
||||
typedef unsigned long uint32_t;
|
||||
|
||||
typedef signed char int_least8_t;
|
||||
typedef signed short int_least16_t;
|
||||
typedef signed long int_least32_t;
|
||||
typedef unsigned char uint_least8_t;
|
||||
typedef unsigned short uint_least16_t;
|
||||
typedef unsigned long uint_least32_t;
|
||||
#endif
|
||||
|
||||
typedef unsigned short MD_STATUS;
|
||||
#define __TYPEDEF__
|
||||
#endif
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Global functions
|
||||
***********************************************************************************************************************/
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_main.c
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file implements main function.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Pragma directive
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for pragma. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Includes
|
||||
***********************************************************************************************************************/
|
||||
#include "r_cg_macrodriver.h"
|
||||
#include "r_cg_cgc.h"
|
||||
/* Start user code for include. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
#include "r_cg_userdefine.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Global variables and functions
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for global. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
|
||||
void R_MAIN_UserInit(void);
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: main
|
||||
* Description : This function implements main function.
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void main(void)
|
||||
{
|
||||
R_MAIN_UserInit();
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
while (1U)
|
||||
{
|
||||
;
|
||||
}
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: R_MAIN_UserInit
|
||||
* Description : This function adds user code before implementing main function.
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void R_MAIN_UserInit(void)
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
uint16_t protect_dummy = (uint16_t)(SYSTEM.PRCR.WORD & 0x000FU);
|
||||
|
||||
/* Disable protect bit */
|
||||
SYSTEM.PRCR.WORD = 0xA50FU;
|
||||
|
||||
SYSTEM.VBATTCR.BYTE = 0x81U;
|
||||
|
||||
/* Restore the previous state of the protect register */
|
||||
SYSTEM.PRCR.WORD = (uint16_t)(0xA500U | protect_dummy);
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
|
||||
/* Start user code for adding. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
|
@ -0,0 +1,195 @@
|
|||
;;/*********************************************************************************************************************
|
||||
;;* DISCLAIMER
|
||||
;;* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
;;* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
;;* applicable laws, including copyright laws.
|
||||
;;* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
;;* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
;;* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
;;* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
;;* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
;;* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
;;* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
;;* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
;;* following link:
|
||||
;;* http://www.renesas.com/disclaimer
|
||||
;;*
|
||||
;;* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
;;*********************************************************************************************************************/
|
||||
;;/*
|
||||
;;**********************************************************************************************************************
|
||||
;;* File Name : r_cg_reset_program.asm
|
||||
;;* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
;;* Device(s) : R5F52318AxFP
|
||||
;;* Tool-Chain : GCCRX
|
||||
;;* Description : This is start up file for RX.
|
||||
;;* Creation Date: 23/09/2015
|
||||
;;**********************************************************************************************************************
|
||||
;;*/
|
||||
|
||||
;;reset_program.asm
|
||||
|
||||
.list
|
||||
.section .text
|
||||
.global _PowerON_Reset ;;global Start routine
|
||||
|
||||
.extern _HardwareSetup ;;external Sub-routine to initialise Hardware
|
||||
.extern _data
|
||||
.extern _mdata
|
||||
.extern _ebss
|
||||
.extern _bss
|
||||
.extern _edata
|
||||
.extern _main
|
||||
.extern _ustack
|
||||
.extern _istack
|
||||
.extern _rvectors
|
||||
.extern _exit
|
||||
|
||||
|
||||
_PowerON_Reset :
|
||||
;;initialise user stack pointer
|
||||
mvtc #_ustack,USP
|
||||
|
||||
;;initialise interrupt stack pointer
|
||||
mvtc #_istack,ISP
|
||||
|
||||
#ifdef __RXv2__
|
||||
;; setup exception vector
|
||||
mvtc #_ExceptVectors, extb ;;EXCEPTION VECTOR ADDRESS
|
||||
#endif
|
||||
;;setup intb
|
||||
mvtc #_rvectors_start, intb ;;INTERRUPT VECTOR ADDRESS definition
|
||||
|
||||
;;setup FPSW
|
||||
mvtc #100h, fpsw
|
||||
|
||||
;;load data section from ROM to RAM
|
||||
|
||||
mov #_mdata,r2 ;;src ROM address of data section in R2
|
||||
mov #_data,r1 ;;dest start RAM address of data section in R1
|
||||
mov #_edata,r3 ;;end RAM address of data section in R3
|
||||
sub r1,r3 ;;size of data section in R3 (R3=R3-R1)
|
||||
smovf ;;block copy R3 bytes from R2 to R1
|
||||
|
||||
;;bss initialisation : zero out bss
|
||||
|
||||
mov #00h,r2 ;;load R2 reg with zero
|
||||
mov #_ebss, r3 ;;store the end address of bss in R3
|
||||
mov #_bss, r1 ;;store the start address of bss in R1
|
||||
sub r1,r3 ;;ize of bss section in R3 (R3=R3-R1)
|
||||
sstr.b
|
||||
;;call the hardware initialiser
|
||||
bsr.a _HardwareSetup
|
||||
nop
|
||||
|
||||
;;setup PSW
|
||||
mvtc #10000h, psw ;;Set Ubit & Ibit for PSW
|
||||
|
||||
;;change PSW PM to user-mode
|
||||
MVFC PSW,R1
|
||||
;;DO NOT CHANGE TO USER MODE OR #00100000h,R1
|
||||
PUSH.L R1
|
||||
MVFC PC,R1
|
||||
ADD #10,R1
|
||||
PUSH.L R1
|
||||
RTE
|
||||
NOP
|
||||
NOP
|
||||
#ifdef CPPAPP
|
||||
bsr.a __rx_init
|
||||
#endif
|
||||
;;start user program
|
||||
bsr.a _main
|
||||
bsr.a _exit
|
||||
|
||||
#ifdef CPPAPP
|
||||
.global _rx_run_preinit_array
|
||||
.type _rx_run_preinit_array,@function
|
||||
_rx_run_preinit_array:
|
||||
mov #__preinit_array_start,r1
|
||||
mov #__preinit_array_end,r2
|
||||
bra.a _rx_run_inilist
|
||||
|
||||
.global _rx_run_init_array
|
||||
.type _rx_run_init_array,@function
|
||||
_rx_run_init_array:
|
||||
mov #__init_array_start,r1
|
||||
mov #__init_array_end,r2
|
||||
mov #4, r3
|
||||
bra.a _rx_run_inilist
|
||||
|
||||
.global _rx_run_fini_array
|
||||
.type _rx_run_fini_array,@function
|
||||
_rx_run_fini_array:
|
||||
mov #__fini_array_start,r2
|
||||
mov #__fini_array_end,r1
|
||||
mov #-4, r3
|
||||
;;fall through
|
||||
|
||||
_rx_run_inilist:
|
||||
next_inilist:
|
||||
cmp r1,r2
|
||||
beq.b done_inilist
|
||||
mov.l [r1],r4
|
||||
cmp #-1, r4
|
||||
beq.b skip_inilist
|
||||
cmp #0, r4
|
||||
beq.b skip_inilist
|
||||
pushm r1-r3
|
||||
jsr r4
|
||||
popm r1-r3
|
||||
skip_inilist:
|
||||
add r3,r1
|
||||
bra.b next_inilist
|
||||
done_inilist:
|
||||
rts
|
||||
|
||||
.section .init,"ax"
|
||||
.balign 4
|
||||
|
||||
.global __rx_init
|
||||
__rx_init:
|
||||
|
||||
.section .fini,"ax"
|
||||
.balign 4
|
||||
|
||||
.global __rx_fini
|
||||
__rx_fini:
|
||||
bsr.a _rx_run_fini_array
|
||||
|
||||
.section .sdata
|
||||
.balign 4
|
||||
.global __gp
|
||||
.weak __gp
|
||||
__gp:
|
||||
|
||||
.section .data
|
||||
.global ___dso_handle
|
||||
.weak ___dso_handle
|
||||
___dso_handle:
|
||||
.long 0
|
||||
|
||||
.section .init,"ax"
|
||||
bsr.a _rx_run_preinit_array
|
||||
bsr.a _rx_run_init_array
|
||||
rts
|
||||
|
||||
.global __rx_init_end
|
||||
__rx_init_end:
|
||||
|
||||
.section .fini,"ax"
|
||||
|
||||
rts
|
||||
.global __rx_fini_end
|
||||
__rx_fini_end:
|
||||
|
||||
#endif
|
||||
|
||||
;;call to exit
|
||||
_exit:
|
||||
bra _loop_here
|
||||
_loop_here:
|
||||
bra _loop_here
|
||||
|
||||
.text
|
||||
.end
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_userdefine.h
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file includes user definition.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
#ifndef _USER_DEF_H
|
||||
#define _USER_DEF_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
User definitions
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/* Start user code for function. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
#endif
|
||||
|
|
@ -0,0 +1,467 @@
|
|||
/***********************************************************************************************************************
|
||||
* DISCLAIMER
|
||||
* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
|
||||
* No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
|
||||
* applicable laws, including copyright laws.
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIESREGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
|
||||
* OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
|
||||
* LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
|
||||
* ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
|
||||
* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
|
||||
* of this software. By using this software, you agree to the additional terms and conditions found by accessing the
|
||||
* following link:
|
||||
* http://www.renesas.com/disclaimer
|
||||
*
|
||||
* Copyright (C) 2015 Renesas Electronics Corporation. All rights reserved.
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* File Name : r_cg_vector_table.c
|
||||
* Version : Code Generator for RX231 V1.00.00.03 [10 Jul 2015]
|
||||
* Device(s) : R5F52318AxFP
|
||||
* Tool-Chain : GCCRX
|
||||
* Description : This file implements interrupt vector.
|
||||
* Creation Date: 23/09/2015
|
||||
***********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Pragma directive
|
||||
***********************************************************************************************************************/
|
||||
/* Start user code for pragma. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Includes
|
||||
***********************************************************************************************************************/
|
||||
#include "r_cg_macrodriver.h"
|
||||
#include "r_cg_userdefine.h"
|
||||
|
||||
/***********************************************************************************************************************
|
||||
Global variables and functions
|
||||
***********************************************************************************************************************/
|
||||
typedef void (*fp) (void);
|
||||
extern void PowerON_Reset (void);
|
||||
extern void stack (void);
|
||||
|
||||
#define OFS0_VAL 0xFFFFFFFFUL
|
||||
#define OFS1_VAL 0xFFFFFFFFUL
|
||||
#define EXVECT_SECT __attribute__ ((section (".exvectors")))
|
||||
|
||||
const void *ExceptVectors[] EXVECT_SECT = {
|
||||
/* Start user code for adding. Do not edit comment generated here */
|
||||
/* 0xffffff80 MDE register */
|
||||
#ifdef __RX_BIG_ENDIAN__
|
||||
/* Big endian */
|
||||
(fp)0xfffffff8,
|
||||
#else
|
||||
/* Little endian */
|
||||
(fp)0xffffffff,
|
||||
#endif
|
||||
/* 0xffffff84 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffff88 OFS1 register */
|
||||
(fp) OFS1_VAL,
|
||||
/* 0xffffff8c OFS0 register */
|
||||
(fp) OFS0_VAL,
|
||||
/* 0xffffff90 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffff94 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffff98 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffff9c Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffa0 ID */
|
||||
(fp)0xffffffff,
|
||||
/* 0xffffffa4 ID */
|
||||
(fp)0xffffffff,
|
||||
/* 0xffffffa8 ID */
|
||||
(fp)0xffffffff,
|
||||
/* 0xffffffac ID */
|
||||
(fp)0xffffffff,
|
||||
/* 0xffffffb0 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffb4 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffb8 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffbc Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffc0 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffc4 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffc8 Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffcc Reserved */
|
||||
r_reserved_exception,
|
||||
/* 0xffffffd0 Exception(Supervisor Instruction) */
|
||||
r_privileged_exception,
|
||||
/* 0xffffffd4 Exception(Access Instruction) */
|
||||
r_access_exception,
|
||||
/* 0xffffffd8 Reserved */
|
||||
r_undefined_exception,
|
||||
/* 0xffffffdc Exception(Undefined Instruction) */
|
||||
r_undefined_exception,
|
||||
/* 0xffffffe0 Reserved */
|
||||
r_undefined_exception,
|
||||
/* 0xffffffe4 Exception(Floating Point) */
|
||||
r_floatingpoint_exception,
|
||||
/* 0xffffffe8 Reserved */
|
||||
r_undefined_exception,
|
||||
/* 0xffffffec Reserved */
|
||||
r_undefined_exception,
|
||||
/* 0xfffffff0 Reserved */
|
||||
r_undefined_exception,
|
||||
/* 0xfffffff4 Reserved */
|
||||
r_undefined_exception,
|
||||
/* 0xfffffff8 NMI */
|
||||
r_nmi_exception
|
||||
/* End user code. Do not edit comment generated here */
|
||||
};
|
||||
|
||||
#define FVECT_SECT __attribute__ ((section (".fvectors")))
|
||||
const void *HardwareVectors[] FVECT_SECT = {
|
||||
/* 0xfffffffc RESET */
|
||||
/* <<VECTOR DATA START (POWER ON RESET)>> */
|
||||
/* Power On Reset PC */
|
||||
PowerON_Reset
|
||||
/* <<VECTOR DATA END (POWER ON RESET)>> */
|
||||
};
|
||||
|
||||
#define RVECT_SECT __attribute__ ((section (".rvectors")))
|
||||
|
||||
const fp RelocatableVectors[] RVECT_SECT = {
|
||||
/* 0x0000 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0004 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0008 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x000C Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0010 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0014 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0018 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x001C Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0020 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0024 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0028 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x002C Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0030 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0034 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0038 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x003C Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0040 BSC BUSERR */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0044 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0048 Reserved */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x004C Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0050 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0054 Reserved */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0058 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x005C Reserved */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0060 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0064 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0068 ICU SWINT2 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x006C ICU SWINT */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0070 CMT0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0074 CMT1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0078 CMTW0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x007C CMTW1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0080 USBA D0FIFO2 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0084 USBA D1FIFO2 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0088 USB0 D0FIFO0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x008C USB0 D0FIFO0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0090 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0094 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0098 RSPI0 SPRI0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x009C RSPI0 SPTI0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00A0 RSPI1 SPRI1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00A4 RSPI1 SPTI1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00A8 QSPI SPRI */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00AC QSPI SPTI */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00B0 SDHI SBFAI */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00B4 MMC MBFAI */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00B8 SSI0 SSITX0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00BC SSI0 SSIRX0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00C0 SSI1 SSIRTI1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00C4 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x00C8 SRC IDEI */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00CC SRC ODFI */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00E0 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x00E4 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x00E8 SCI0 RXI0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00EC SCI0 TXI0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00F0 SCI1 RXI1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00F4 SCI1 TXI1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00F8 SCI2 RXI2 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x00FC SCI2 TXI2 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0100 ICU IRQ0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0104 ICU IRQ1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0108 ICU IRQ2 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x010C ICU IRQ3 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0110 ICU IRQ4 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0114 ICU IRQ5 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0118 ICU IRQ6 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x011C ICU IRQ7 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0120 ICU IRQ8 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0124 ICU IRQ9 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0128 ICU IRQ10 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x012C ICU IRQ11 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0130 ICU IRQ12 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0134 ICU IRQ13 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0138 ICU IRQ14 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x013C ICU IRQ15 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0140 SCI3 RXI3 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0144 SCI3 TXI3 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0148 SCI4 RXI4 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x014C SCI4 TXI4 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0150 SCI5 RXI5 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0154 SCI5 TXI5 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0158 SCI6 RXI6 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x015C SCI6 TXI6 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0160 LVD LVD1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0164 LVD LVD2 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0168 USB0 USBR0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x016C Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x0170 RTC ALM */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0174 RTC PRD */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0178 USBA USBHSR */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0184 PDC PCDFI */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0188 SCI7 RXI7 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x018C SCI7 TXI7 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0190 SCIFA8 RXIF8 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0194 SCIF8 TXIF8 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0198 SCIF9 RXIF9 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x019C SCIF9 TXIF9 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01A0 SCIF10 RXIF10 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01A4 SCIF10 TXIF10 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01A8 ICU GROUP_BE0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01AC Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x01B0 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x01B4 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x01B8 ICU GROUP_BL0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01BC ICU GROUP_BL1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01C0 ICU GROUP_AL0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01C4 ICU GROUP_AL1 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01C8 SCIF11 RXIF11 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01CC SCIF11 TXIF11 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01D0 SCI12 RXI12 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01D4 SCI12 TXI12 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01D8 Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x01DC Reserved */
|
||||
(fp)r_reserved_exception,
|
||||
/* 0x01F4 OST OST */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01F8 EXDMAC EXDMAC0I */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x01FC EXDMAC EXDMAC1I */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0318 DMAC DMAC0I */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x031C DMAC DMAC1I */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0320 DMAC DMAC2I */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x0324 DMAC DMAC3I */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x03D8 RIIC0 EEI0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x03DC RIIC0 RXI0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x03E0 RIIC0 TXI0 */
|
||||
(fp)r_undefined_exception,
|
||||
/* 0x03E4 RIIC0 TEI0 */
|
||||
(fp)r_undefined_exception,
|
||||
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: r_undefined_exception
|
||||
* Description : None
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void r_undefined_exception(void)
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: r_reserved_exception
|
||||
* Description : None
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void r_reserved_exception(void)
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: r_nmi_exception
|
||||
* Description : None
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void r_nmi_exception(void)
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: r_brk_exception
|
||||
* Description : None
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void r_brk_exception(void)
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: r_privileged_exception
|
||||
* Description : None
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void r_privileged_exception(void)
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: r_access_exception
|
||||
* Description : None
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void r_access_exception(void)
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* Function Name: r_floatingpoint_exception
|
||||
* Description : None
|
||||
* Arguments : None
|
||||
* Return Value : None
|
||||
***********************************************************************************************************************/
|
||||
void r_floatingpoint_exception(void)
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
/* End user code. Do not edit comment generated here */
|
||||
}
|
||||
|
||||
22195
FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/iodefine.h
Normal file
22195
FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/iodefine.h
Normal file
File diff suppressed because it is too large
Load diff
251
FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/main.c
Normal file
251
FreeRTOS/Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/main.c
Normal file
|
|
@ -0,0 +1,251 @@
|
|||
/*
|
||||
FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/******************************************************************************
|
||||
* This project provides two demo applications. A simple blinky style project,
|
||||
* and a more comprehensive test and demo application. The
|
||||
* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting (defined in this file) is used to
|
||||
* select between the two. The simply blinky demo is implemented and described
|
||||
* in main_blinky.c. The more comprehensive test and demo application is
|
||||
* implemented and described in main_full.c.
|
||||
*
|
||||
* This file implements the code that is not demo specific, including the
|
||||
* hardware setup, standard FreeRTOS hook functions, and the ISR hander called
|
||||
* by the RTOS after interrupt entry (including nesting) has been taken care of.
|
||||
*
|
||||
* ENSURE TO READ THE DOCUMENTATION PAGE FOR THIS PORT AND DEMO APPLICATION ON
|
||||
* THE http://www.FreeRTOS.org WEB SITE FOR FULL INFORMATION ON USING THIS DEMO
|
||||
* APPLICATION, AND ITS ASSOCIATE FreeRTOS ARCHITECTURE PORT!
|
||||
*
|
||||
*/
|
||||
|
||||
/* Scheduler include files. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "semphr.h"
|
||||
|
||||
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
|
||||
or 0 to run the more comprehensive test and demo application. */
|
||||
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* Configure the hardware as necessary to run this demo.
|
||||
*/
|
||||
static void prvSetupHardware( void );
|
||||
|
||||
/*
|
||||
* main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.
|
||||
* main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.
|
||||
*/
|
||||
#if( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 )
|
||||
extern void main_blinky( void );
|
||||
#else
|
||||
extern void main_full( void );
|
||||
#endif /* #if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 */
|
||||
|
||||
/* Prototypes for the standard FreeRTOS callback/hook functions implemented
|
||||
within this file. */
|
||||
void vApplicationMallocFailedHook( void );
|
||||
void vApplicationIdleHook( void );
|
||||
void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
|
||||
void vApplicationTickHook( void );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
int main( void )
|
||||
{
|
||||
/* Configure the hardware ready to run the demo. */
|
||||
prvSetupHardware();
|
||||
|
||||
/* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top
|
||||
of this file. */
|
||||
#if( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 )
|
||||
{
|
||||
main_blinky();
|
||||
}
|
||||
#else
|
||||
{
|
||||
main_full();
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupHardware( void )
|
||||
{
|
||||
/* Start user code. Do not edit comment generated here */
|
||||
uint16_t usProtectDummy = ( uint16_t ) ( SYSTEM.PRCR.WORD & 0x000FU );
|
||||
|
||||
/* Disable protect bit */
|
||||
SYSTEM.PRCR.WORD = 0xA50FU;
|
||||
|
||||
SYSTEM.VBATTCR.BYTE = 0x81U;
|
||||
|
||||
/* Restore the previous state of the protect register */
|
||||
SYSTEM.PRCR.WORD = ( uint16_t )( 0xA500U | usProtectDummy );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationMallocFailedHook( void )
|
||||
{
|
||||
/* Called if a call to pvPortMalloc() fails because there is insufficient
|
||||
free memory available in the FreeRTOS heap. pvPortMalloc() is called
|
||||
internally by FreeRTOS API functions that create tasks, queues, software
|
||||
timers, and semaphores. The size of the FreeRTOS heap is set by the
|
||||
configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */
|
||||
|
||||
/* Force an assert. */
|
||||
configASSERT( ( volatile void * ) NULL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
|
||||
{
|
||||
( void ) pcTaskName;
|
||||
( void ) pxTask;
|
||||
|
||||
/* Run time stack overflow checking is performed if
|
||||
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
|
||||
function is called if a stack overflow is detected. */
|
||||
|
||||
/* Force an assert. */
|
||||
configASSERT( ( volatile void * ) NULL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationIdleHook( void )
|
||||
{
|
||||
volatile size_t xFreeHeapSpace;
|
||||
|
||||
/* This is just a trivial example of an idle hook. It is called on each
|
||||
cycle of the idle task. It must *NOT* attempt to block. In this case the
|
||||
idle task just queries the amount of FreeRTOS heap that remains. See the
|
||||
memory management section on the http://www.FreeRTOS.org web site for memory
|
||||
management options. If there is a lot of heap memory free then the
|
||||
configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up
|
||||
RAM. */
|
||||
xFreeHeapSpace = xPortGetFreeHeapSize();
|
||||
|
||||
/* Remove compiler warning about xFreeHeapSpace being set but never used. */
|
||||
( void ) xFreeHeapSpace;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vApplicationTickHook( void )
|
||||
{
|
||||
#if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 0
|
||||
{
|
||||
extern void vFullDemoTickHook( void );
|
||||
|
||||
vFullDemoTickHook();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* The RX port uses this callback function to configure its tick interrupt.
|
||||
This allows the application to choose the tick interrupt source. */
|
||||
void vApplicationSetupTimerInterrupt( void )
|
||||
{
|
||||
const uint32_t ulEnableRegisterWrite = 0xA50BUL, ulDisableRegisterWrite = 0xA500UL;
|
||||
|
||||
/* Disable register write protection. */
|
||||
SYSTEM.PRCR.WORD = ulEnableRegisterWrite;
|
||||
|
||||
/* Enable compare match timer 0. */
|
||||
MSTP( CMT0 ) = 0;
|
||||
|
||||
/* Interrupt on compare match. */
|
||||
CMT0.CMCR.BIT.CMIE = 1;
|
||||
|
||||
/* Set the compare match value. */
|
||||
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );
|
||||
|
||||
/* Divide the PCLK by 8. */
|
||||
CMT0.CMCR.BIT.CKS = 0;
|
||||
|
||||
/* Enable the interrupt... */
|
||||
_IEN( _CMT0_CMI0 ) = 1;
|
||||
|
||||
/* ...and set its priority to the application defined kernel priority. */
|
||||
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
|
||||
|
||||
/* Start the timer. */
|
||||
CMT.CMSTR0.BIT.STR0 = 1;
|
||||
|
||||
/* Reneable register protection. */
|
||||
SYSTEM.PRCR.WORD = ulDisableRegisterWrite;
|
||||
}
|
||||
|
||||
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue