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Style: Revert uncrustify for portable directories (#122)

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* Style: revert uncrustify portable directories

* Style: Uncrustify Some Portable files

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
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alfred gedeon 2020-08-17 10:51:02 -07:00 • committed by GitHub
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817
portable/Renesas/RX100/port.c
View file

@ -26,8 +26,8 @@
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the RX100 port.
*----------------------------------------------------------*/
* Implementation of functions defined in portable.h for the RX100 port.
*----------------------------------------------------------*/
/* Standard C includes. */
#include "limits.h"
@ -45,35 +45,35 @@
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
/* The peripheral clock is divided by this value before being supplying the
* CMT. */
CMT. */
#if ( configUSE_TICKLESS_IDLE == 0 )
/* If tickless idle is not used then the divisor can be fixed. */
#define portCLOCK_DIVISOR 8UL
/* If tickless idle is not used then the divisor can be fixed. */
#define portCLOCK_DIVISOR 8UL
#elif ( configPERIPHERAL_CLOCK_HZ >= 12000000 )
#define portCLOCK_DIVISOR 512UL
#define portCLOCK_DIVISOR 512UL
#elif ( configPERIPHERAL_CLOCK_HZ >= 6000000 )
#define portCLOCK_DIVISOR 128UL
#define portCLOCK_DIVISOR 128UL
#elif ( configPERIPHERAL_CLOCK_HZ >= 1000000 )
#define portCLOCK_DIVISOR 32UL
#define portCLOCK_DIVISOR 32UL
#else
#define portCLOCK_DIVISOR 8UL
#define portCLOCK_DIVISOR 8UL
#endif
/* Keys required to lock and unlock access to certain system registers
* respectively. */
#define portUNLOCK_KEY 0xA50B
#define portLOCK_KEY 0xA500
respectively. */
#define portUNLOCK_KEY 0xA50B
#define portLOCK_KEY 0xA500
/*-----------------------------------------------------------*/
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
* and therefore installed in the vector table, when the FreeRTOS code is built
* as a library. */
and therefore installed in the vector table, when the FreeRTOS code is built
as a library. */
extern BaseType_t vSoftwareInterruptEntry;
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
@ -108,10 +108,9 @@ void vSoftwareInterruptISR( void );
*/
static void prvSetupTimerInterrupt( void );
#ifndef configSETUP_TICK_INTERRUPT
/* The user has not provided their own tick interrupt configuration so use
* the definition in this file (which uses the interval timer). */
#define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
/* The user has not provided their own tick interrupt configuration so use
the definition in this file (which uses the interval timer). */
#define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
#endif /* configSETUP_TICK_INTERRUPT */
/*
@ -120,13 +119,13 @@ static void prvSetupTimerInterrupt( void );
* instruction.
*/
#if configUSE_TICKLESS_IDLE == 1
static void prvSleep( TickType_t xExpectedIdleTime );
static void prvSleep( TickType_t xExpectedIdleTime );
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
/* These is accessed by the inline assembler functions. */
extern void * pxCurrentTCB;
extern void *pxCurrentTCB;
extern void vTaskSwitchContext( void );
/*-----------------------------------------------------------*/
@ -136,524 +135,512 @@ static const uint32_t ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / p
#if configUSE_TICKLESS_IDLE == 1
/* Holds the maximum number of ticks that can be suppressed - which is
* basically how far into the future an interrupt can be generated. Set
* during initialisation. This is the maximum possible value that the
* compare match register can hold divided by ulMatchValueForOneTick. */
static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
/* Holds the maximum number of ticks that can be suppressed - which is
basically how far into the future an interrupt can be generated. Set
during initialisation. This is the maximum possible value that the
compare match register can hold divided by ulMatchValueForOneTick. */
static const TickType_t xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
/* Flag set from the tick interrupt to allow the sleep processing to know if
* sleep mode was exited because of a tick interrupt, or an interrupt
* generated by something else. */
static volatile uint32_t ulTickFlag = pdFALSE;
/* Flag set from the tick interrupt to allow the sleep processing to know if
sleep mode was exited because of a tick interrupt, or an interrupt
generated by something else. */
static volatile uint32_t ulTickFlag = pdFALSE;
/* The CMT counter is stopped temporarily each time it is re-programmed.
* The following constant offsets the CMT counter match value by the number of
* CMT counts that would typically be missed while the counter was stopped to
* compensate for the lost time. The large difference between the divided CMT
* clock and the CPU clock means it is likely ulStoppedTimerCompensation will
* equal zero - and be optimised away. */
static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
/* The CMT counter is stopped temporarily each time it is re-programmed.
The following constant offsets the CMT counter match value by the number of
CMT counts that would typically be missed while the counter was stopped to
compensate for the lost time. The large difference between the divided CMT
clock and the CPU clock means it is likely ulStoppedTimerCompensation will
equal zero - and be optimised away. */
static const uint32_t ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
#endif /* if configUSE_TICKLESS_IDLE == 1 */
#endif
/*-----------------------------------------------------------*/
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* Offset to end up on 8 byte boundary. */
pxTopOfStack--;
/* Offset to end up on 8 byte boundary. */
pxTopOfStack--;
/* R0 is not included as it is the stack pointer. */
/* R0 is not included as it is the stack pointer. */
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
* value. Otherwise code space can be saved by just setting the registers
* that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* r15. */
pxTopOfStack--;
*pxTopOfStack = 0xaaaabbbb;
pxTopOfStack--;
*pxTopOfStack = 0xdddddddd;
pxTopOfStack--;
*pxTopOfStack = 0xcccccccc;
pxTopOfStack--;
*pxTopOfStack = 0xbbbbbbbb;
pxTopOfStack--;
*pxTopOfStack = 0xaaaaaaaa;
pxTopOfStack--;
*pxTopOfStack = 0x99999999;
pxTopOfStack--;
*pxTopOfStack = 0x88888888;
pxTopOfStack--;
*pxTopOfStack = 0x77777777;
pxTopOfStack--;
*pxTopOfStack = 0x66666666;
pxTopOfStack--;
*pxTopOfStack = 0x55555555;
pxTopOfStack--;
*pxTopOfStack = 0x44444444;
pxTopOfStack--;
*pxTopOfStack = 0x33333333;
pxTopOfStack--;
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
{
/* Leave space for the registers that will get popped from the stack
* when the task first starts executing. */
pxTopOfStack -= 15;
}
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
/* When debugging it can be useful if every register is set to a known
value. Otherwise code space can be saved by just setting the registers
that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* r15. */
pxTopOfStack--;
*pxTopOfStack = 0xaaaabbbb;
pxTopOfStack--;
*pxTopOfStack = 0xdddddddd;
pxTopOfStack--;
*pxTopOfStack = 0xcccccccc;
pxTopOfStack--;
*pxTopOfStack = 0xbbbbbbbb;
pxTopOfStack--;
*pxTopOfStack = 0xaaaaaaaa;
pxTopOfStack--;
*pxTopOfStack = 0x99999999;
pxTopOfStack--;
*pxTopOfStack = 0x88888888;
pxTopOfStack--;
*pxTopOfStack = 0x77777777;
pxTopOfStack--;
*pxTopOfStack = 0x66666666;
pxTopOfStack--;
*pxTopOfStack = 0x55555555;
pxTopOfStack--;
*pxTopOfStack = 0x44444444;
pxTopOfStack--;
*pxTopOfStack = 0x33333333;
pxTopOfStack--;
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else
{
/* Leave space for the registers that will get popped from the stack
when the task first starts executing. */
pxTopOfStack -= 15;
}
#endif
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* Accumulator. */
pxTopOfStack--;
*pxTopOfStack = 0x87654321; /* Accumulator. */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* Accumulator. */
pxTopOfStack--;
*pxTopOfStack = 0x87654321; /* Accumulator. */
return pxTopOfStack;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler( void )
{
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate
* the tick interrupt. This way the application can decide which
* peripheral to use. If tickless mode is used then the default
* implementation defined in this file (which uses CMT0) should not be
* overridden. */
configSETUP_TICK_INTERRUPT();
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate
the tick interrupt. This way the application can decide which
peripheral to use. If tickless mode is used then the default
implementation defined in this file (which uses CMT0) should not be
overridden. */
configSETUP_TICK_INTERRUPT();
/* Enable the software interrupt. */
_IEN( _ICU_SWINT ) = 1;
/* Enable the software interrupt. */
_IEN( _ICU_SWINT ) = 1;
/* Ensure the software interrupt is clear. */
_IR( _ICU_SWINT ) = 0;
/* Ensure the software interrupt is clear. */
_IR( _ICU_SWINT ) = 0;
/* Ensure the software interrupt is set to the kernel priority. */
_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* Ensure the software interrupt is set to the kernel priority. */
_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the first task. */
prvStartFirstTask();
}
/* Start the first task. */
prvStartFirstTask();
}
/* Execution should not reach here as the tasks are now running!
* prvSetupTimerInterrupt() is called here to prevent the compiler outputting
* a warning about a statically declared function not being referenced in the
* case that the application writer has provided their own tick interrupt
* configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
* their own routine will be called in place of prvSetupTimerInterrupt()). */
prvSetupTimerInterrupt();
/* Execution should not reach here as the tasks are now running!
prvSetupTimerInterrupt() is called here to prevent the compiler outputting
a warning about a statically declared function not being referenced in the
case that the application writer has provided their own tick interrupt
configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
their own routine will be called in place of prvSetupTimerInterrupt()). */
prvSetupTimerInterrupt();
/* Just to make sure the function is not optimised away. */
( void ) vSoftwareInterruptISR();
/* Just to make sure the function is not optimised away. */
( void ) vSoftwareInterruptISR();
/* Should not get here. */
return pdFAIL;
/* Should not get here. */
return pdFAIL;
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvStartFirstTask
static void prvStartFirstTask( void )
{
/* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */
SETPSW U
/* When starting the scheduler there is nothing that needs moving to the
interrupt stack because the function is not called from an interrupt.
Just ensure the current stack is the user stack. */
SETPSW U
/* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L[ R15 ], R0
/* Obtain the location of the stack associated with which ever task
pxCurrentTCB is currently pointing to. */
MOV.L #_pxCurrentTCB, R15
MOV.L [R15], R15
MOV.L [R15], R0
/* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15 /* Accumulator high 32 bits. */
POPM R1 - R15 /* R1 to R15 - R0 is not included as it is the SP. */
RTE /* This pops the remaining registers. */
/* Restore the registers from the stack of the task pointed to by
pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15 /* Accumulator high 32 bits. */
POPM R1-R15 /* R1 to R15 - R0 is not included as it is the SP. */
RTE /* This pops the remaining registers. */
NOP
NOP
NOP
}
/*-----------------------------------------------------------*/
#pragma interrupt ( prvTickISR( vect = _VECT( configTICK_VECTOR ), enable ) )
void prvTickISR( void )
{
/* Increment the tick, and perform any processing the new tick value
* necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
/* Increment the tick, and perform any processing the new tick value
necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
#if configUSE_TICKLESS_IDLE == 1
{
/* The CPU woke because of a tick. */
ulTickFlag = pdTRUE;
#if configUSE_TICKLESS_IDLE == 1
{
/* The CPU woke because of a tick. */
ulTickFlag = pdTRUE;
/* If this is the first tick since exiting tickless mode then the CMT
* compare match value needs resetting. */
CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
}
#endif
/* If this is the first tick since exiting tickless mode then the CMT
compare match value needs resetting. */
CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
}
#endif
}
/*-----------------------------------------------------------*/
void vSoftwareInterruptISR( void )
{
prvYieldHandler();
prvYieldHandler();
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvYieldHandler
static void prvYieldHandler( void )
{
/* Re-enable interrupts. */
SETPSW I
/* Re-enable interrupts. */
SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack
* when the interrupt occurred from the interrupt stack to the user stack.
*
* R15 is saved before it is clobbered. */
PUSH.L R15
/* Move the data that was automatically pushed onto the interrupt stack
when the interrupt occurred from the interrupt stack to the user stack.
/* Read the user stack pointer. */
MVFC USP, R15
R15 is saved before it is clobbered. */
PUSH.L R15
/* Move the address down to the data being moved. */
SUB # 12, R15
MVTC R15, USP
/* Read the user stack pointer. */
MVFC USP, R15
/* Copy the data across. */
MOV.L[ R0 ], [ R15 ];
R15
/* Move the address down to the data being moved. */
SUB #12, R15
MVTC R15, USP
MOV.L 4[ R0 ], 4[ R15 ];
PC
MOV.L 8[ R0 ], 8[ R15 ];
PSW
/* Copy the data across. */
MOV.L [ R0 ], [ R15 ] ; R15
MOV.L 4[ R0 ], 4[ R15 ] ; PC
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
/* Move the interrupt stack pointer to its new correct position. */
ADD # 12, R0
/* Move the interrupt stack pointer to its new correct position. */
ADD #12, R0
/* All the rest of the registers are saved directly to the user stack. */
SETPSW U
/* All the rest of the registers are saved directly to the user stack. */
SETPSW U
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1 - R14
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1-R14
/* Save the accumulator. */
MVFACHI R15
PUSH.L R15
MVFACMI R15;
Middle order word.
SHLL # 16, R15;
Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the accumulator. */
MVFACHI R15
PUSH.L R15
MVFACMI R15 ; Middle order word.
SHLL #16, R15 ; Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the stack pointer to the TCB. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L R0, [ R15 ]
/* Save the stack pointer to the TCB. */
MOV.L #_pxCurrentTCB, R15
MOV.L [ R15 ], R15
MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the
* kernel structures are being accessed. */
MVTIPL # configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Ensure the interrupt mask is set to the syscall priority while the
kernel structures are being accessed. */
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Reset the interrupt mask as no more data structure access is
* required. */
MVTIPL # configKERNEL_INTERRUPT_PRIORITY
/* Reset the interrupt mask as no more data structure access is
required. */
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L[ R15 ], R0
/* Load the stack pointer of the task that is now selected as the Running
state task from its TCB. */
MOV.L #_pxCurrentTCB,R15
MOV.L [ R15 ], R15
MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
MVTACHI R15
POPM R1 - R15
RTE
NOP
NOP
/* Restore the context of the new task. The PSW (Program Status Word) and
PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
MVTACHI R15
POPM R1-R15
RTE
NOP
NOP
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* Not implemented in ports where there is nothing to return to.
Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* The following line is just to prevent the symbol getting optimised away. */
( void ) vTaskSwitchContext();
/* The following line is just to prevent the symbol getting optimised away. */
( void ) vTaskSwitchContext();
}
/*-----------------------------------------------------------*/
static void prvSetupTimerInterrupt( void )
{
/* Unlock. */
SYSTEM.PRCR.WORD = portUNLOCK_KEY;
/* Unlock. */
SYSTEM.PRCR.WORD = portUNLOCK_KEY;
/* Enable CMT0. */
MSTP( CMT0 ) = 0;
/* Enable CMT0. */
MSTP( CMT0 ) = 0;
/* Lock again. */
SYSTEM.PRCR.WORD = portLOCK_KEY;
/* Lock again. */
SYSTEM.PRCR.WORD = portLOCK_KEY;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
/* Set the compare match value. */
CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick;
/* Divide the PCLK. */
#if portCLOCK_DIVISOR == 512
{
CMT0.CMCR.BIT.CKS = 3;
}
#elif portCLOCK_DIVISOR == 128
{
CMT0.CMCR.BIT.CKS = 2;
}
#elif portCLOCK_DIVISOR == 32
{
CMT0.CMCR.BIT.CKS = 1;
}
#elif portCLOCK_DIVISOR == 8
{
CMT0.CMCR.BIT.CKS = 0;
}
#else /* if portCLOCK_DIVISOR == 512 */
{
#error Invalid portCLOCK_DIVISOR setting
}
#endif /* if portCLOCK_DIVISOR == 512 */
/* Divide the PCLK. */
#if portCLOCK_DIVISOR == 512
{
CMT0.CMCR.BIT.CKS = 3;
}
#elif portCLOCK_DIVISOR == 128
{
CMT0.CMCR.BIT.CKS = 2;
}
#elif portCLOCK_DIVISOR == 32
{
CMT0.CMCR.BIT.CKS = 1;
}
#elif portCLOCK_DIVISOR == 8
{
CMT0.CMCR.BIT.CKS = 0;
}
#else
{
#error Invalid portCLOCK_DIVISOR setting
}
#endif
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
}
/*-----------------------------------------------------------*/
#if configUSE_TICKLESS_IDLE == 1
static void prvSleep( TickType_t xExpectedIdleTime )
{
/* Allow the application to define some pre-sleep processing. */
configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
static void prvSleep( TickType_t xExpectedIdleTime )
{
/* Allow the application to define some pre-sleep processing. */
configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
/* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
* means the application defined code has already executed the WAIT
* instruction. */
if( xExpectedIdleTime > 0 )
{
wait();
}
/* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
means the application defined code has already executed the WAIT
instruction. */
if( xExpectedIdleTime > 0 )
{
wait();
}
/* Allow the application to define some post sleep processing. */
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
}
/* Allow the application to define some post sleep processing. */
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
}
#endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/
#if configUSE_TICKLESS_IDLE == 1
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
eSleepModeStatus eSleepAction;
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{
uint32_t ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
eSleepModeStatus eSleepAction;
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
/* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
/* Make sure the CMT reload value does not overflow the counter. */
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
{
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
}
/* Make sure the CMT reload value does not overflow the counter. */
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
{
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
}
/* Calculate the reload value required to wait xExpectedIdleTime tick
* periods. */
ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime;
/* Calculate the reload value required to wait xExpectedIdleTime tick
periods. */
ulMatchValue = ulMatchValueForOneTick * xExpectedIdleTime;
if( ulMatchValue > ulStoppedTimerCompensation )
{
/* Compensate for the fact that the CMT is going to be stopped
momentarily. */
ulMatchValue -= ulStoppedTimerCompensation;
}
if( ulMatchValue > ulStoppedTimerCompensation )
{
/* Compensate for the fact that the CMT is going to be stopped
* momentarily. */
ulMatchValue -= ulStoppedTimerCompensation;
}
/* Stop the CMT momentarily. The time the CMT is stopped for is
accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */
CMT.CMSTR0.BIT.STR0 = 0;
while( CMT.CMSTR0.BIT.STR0 == 1 )
{
/* Nothing to do here. */
}
/* Stop the CMT momentarily. The time the CMT is stopped for is
* accounted for as best it can be, but using the tickless mode will
* inevitably result in some tiny drift of the time maintained by the
* kernel with respect to calendar time. */
CMT.CMSTR0.BIT.STR0 = 0;
/* Critical section using the global interrupt bit as the i bit is
automatically reset by the WAIT instruction. */
clrpsw_i();
while( CMT.CMSTR0.BIT.STR0 == 1 )
{
/* Nothing to do here. */
}
/* The tick flag is set to false before sleeping. If it is true when
sleep mode is exited then sleep mode was probably exited because the
tick was suppressed for the entire xExpectedIdleTime period. */
ulTickFlag = pdFALSE;
/* Critical section using the global interrupt bit as the i bit is
* automatically reset by the WAIT instruction. */
clrpsw_i();
/* If a context switch is pending then abandon the low power entry as
the context switch might have been pended by an external interrupt that
requires processing. */
eSleepAction = eTaskConfirmSleepModeStatus();
if( eSleepAction == eAbortSleep )
{
/* Restart tick. */
CMT.CMSTR0.BIT.STR0 = 1;
setpsw_i();
}
else if( eSleepAction == eNoTasksWaitingTimeout )
{
/* Protection off. */
SYSTEM.PRCR.WORD = portUNLOCK_KEY;
/* The tick flag is set to false before sleeping. If it is true when
* sleep mode is exited then sleep mode was probably exited because the
* tick was suppressed for the entire xExpectedIdleTime period. */
ulTickFlag = pdFALSE;
/* Ready for software standby with all clocks stopped. */
SYSTEM.SBYCR.BIT.SSBY = 1;
/* If a context switch is pending then abandon the low power entry as
* the context switch might have been pended by an external interrupt that
* requires processing. */
eSleepAction = eTaskConfirmSleepModeStatus();
/* Protection on. */
SYSTEM.PRCR.WORD = portLOCK_KEY;
if( eSleepAction == eAbortSleep )
{
/* Restart tick. */
CMT.CMSTR0.BIT.STR0 = 1;
setpsw_i();
}
else if( eSleepAction == eNoTasksWaitingTimeout )
{
/* Protection off. */
SYSTEM.PRCR.WORD = portUNLOCK_KEY;
/* Sleep until something happens. Calling prvSleep() will
automatically reset the i bit in the PSW. */
prvSleep( xExpectedIdleTime );
/* Ready for software standby with all clocks stopped. */
SYSTEM.SBYCR.BIT.SSBY = 1;
/* Restart the CMT. */
CMT.CMSTR0.BIT.STR0 = 1;
}
else
{
/* Protection off. */
SYSTEM.PRCR.WORD = portUNLOCK_KEY;
/* Protection on. */
SYSTEM.PRCR.WORD = portLOCK_KEY;
/* Ready for deep sleep mode. */
SYSTEM.MSTPCRC.BIT.DSLPE = 1;
SYSTEM.MSTPCRA.BIT.MSTPA28 = 1;
SYSTEM.SBYCR.BIT.SSBY = 0;
/* Sleep until something happens. Calling prvSleep() will
* automatically reset the i bit in the PSW. */
prvSleep( xExpectedIdleTime );
/* Protection on. */
SYSTEM.PRCR.WORD = portLOCK_KEY;
/* Restart the CMT. */
CMT.CMSTR0.BIT.STR0 = 1;
}
else
{
/* Protection off. */
SYSTEM.PRCR.WORD = portUNLOCK_KEY;
/* Adjust the match value to take into account that the current
time slice is already partially complete. */
ulMatchValue -= ( uint32_t ) CMT0.CMCNT;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
/* Ready for deep sleep mode. */
SYSTEM.MSTPCRC.BIT.DSLPE = 1;
SYSTEM.MSTPCRA.BIT.MSTPA28 = 1;
SYSTEM.SBYCR.BIT.SSBY = 0;
/* Restart the CMT to count up to the new match value. */
CMT0.CMCNT = 0;
CMT.CMSTR0.BIT.STR0 = 1;
/* Protection on. */
SYSTEM.PRCR.WORD = portLOCK_KEY;
/* Sleep until something happens. Calling prvSleep() will
automatically reset the i bit in the PSW. */
prvSleep( xExpectedIdleTime );
/* Adjust the match value to take into account that the current
* time slice is already partially complete. */
ulMatchValue -= ( uint32_t ) CMT0.CMCNT;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
/* Stop CMT. Again, the time the SysTick is stopped for is
accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */
CMT.CMSTR0.BIT.STR0 = 0;
while( CMT.CMSTR0.BIT.STR0 == 1 )
{
/* Nothing to do here. */
}
/* Restart the CMT to count up to the new match value. */
CMT0.CMCNT = 0;
CMT.CMSTR0.BIT.STR0 = 1;
ulCurrentCount = ( uint32_t ) CMT0.CMCNT;
/* Sleep until something happens. Calling prvSleep() will
* automatically reset the i bit in the PSW. */
prvSleep( xExpectedIdleTime );
if( ulTickFlag != pdFALSE )
{
/* The tick interrupt has already executed, although because
this function is called with the scheduler suspended the actual
tick processing will not occur until after this function has
exited. Reset the match value with whatever remains of this
tick period. */
ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
/* Stop CMT. Again, the time the SysTick is stopped for is
* accounted for as best it can be, but using the tickless mode will
* inevitably result in some tiny drift of the time maintained by the
* kernel with respect to calendar time. */
CMT.CMSTR0.BIT.STR0 = 0;
/* The tick interrupt handler will already have pended the tick
processing in the kernel. As the pending tick will be
processed as soon as this function exits, the tick value
maintained by the tick is stepped forward by one less than the
time spent sleeping. The actual stepping of the tick appears
later in this function. */
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
}
else
{
/* Something other than the tick interrupt ended the sleep.
How many complete tick periods passed while the processor was
sleeping? */
ulCompleteTickPeriods = ulCurrentCount / ulMatchValueForOneTick;
while( CMT.CMSTR0.BIT.STR0 == 1 )
{
/* Nothing to do here. */
}
/* The match value is set to whatever fraction of a single tick
period remains. */
ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
}
ulCurrentCount = ( uint32_t ) CMT0.CMCNT;
/* Restart the CMT so it runs up to the match value. The match value
will get set to the value required to generate exactly one tick period
the next time the CMT interrupt executes. */
CMT0.CMCNT = 0;
CMT.CMSTR0.BIT.STR0 = 1;
if( ulTickFlag != pdFALSE )
{
/* The tick interrupt has already executed, although because
* this function is called with the scheduler suspended the actual
* tick processing will not occur until after this function has
* exited. Reset the match value with whatever remains of this
* tick period. */
ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
/* The tick interrupt handler will already have pended the tick
* processing in the kernel. As the pending tick will be
* processed as soon as this function exits, the tick value
* maintained by the tick is stepped forward by one less than the
* time spent sleeping. The actual stepping of the tick appears
* later in this function. */
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
}
else
{
/* Something other than the tick interrupt ended the sleep.
* How many complete tick periods passed while the processor was
* sleeping? */
ulCompleteTickPeriods = ulCurrentCount / ulMatchValueForOneTick;
/* The match value is set to whatever fraction of a single tick
* period remains. */
ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
CMT0.CMCOR = ( uint16_t ) ulMatchValue;
}
/* Restart the CMT so it runs up to the match value. The match value
* will get set to the value required to generate exactly one tick period
* the next time the CMT interrupt executes. */
CMT0.CMCNT = 0;
CMT.CMSTR0.BIT.STR0 = 1;
/* Wind the tick forward by the number of tick periods that the CPU
* remained in a low power state. */
vTaskStepTick( ulCompleteTickPeriods );
}
}
/* Wind the tick forward by the number of tick periods that the CPU
remained in a low power state. */
vTaskStepTick( ulCompleteTickPeriods );
}
}
#endif /* configUSE_TICKLESS_IDLE */

161
portable/Renesas/RX100/portmacro.h
View file

@ -27,14 +27,14 @@
#ifndef PORTMACRO_H
#define PORTMACRO_H
#define PORTMACRO_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* Hardware specifics. */
#include "machine.h"
#include "machine.h"
/*-----------------------------------------------------------
* Port specific definitions.
@ -47,104 +47,105 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other
* than portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
than portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#if( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#pragma inline_asm vPortYield
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L # 872E0H, R5
MOV.B # 1, [ R5 ]
/* Read back to ensure the value is taken before proceeding. */
MOV.L[ R5 ], R5
/* Restore clobbered register to its previous value. */
POP R5
}
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) { portYIELD(); }
#pragma inline_asm vPortYield
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
functions are considered to use the same rules as function calls by the
compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L #872E0H, R5
MOV.B #1, [R5]
/* Read back to ensure the value is taken before proceeding. */
MOV.L [R5], R5
/* Restore clobbered register to its previous value. */
POP R5
}
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) { portYIELD(); }
/* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif
/* Critical nesting counts are stored in the TCB. */
#define portCRITICAL_NESTING_IN_TCB ( 1 )
#define portCRITICAL_NESTING_IN_TCB ( 1 )
/* The critical nesting functions defined within tasks.c. */
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical()
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */
#define portSET_INTERRUPT_MASK_FROM_ISR() ( UBaseType_t ) get_ipl(); set_ipl( ( signed long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( signed long ) uxSavedInterruptStatus )
#define portSET_INTERRUPT_MASK_FROM_ISR() ( UBaseType_t ) get_ipl(); set_ipl( ( signed long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( signed long ) uxSavedInterruptStatus )
/*-----------------------------------------------------------*/
/* Tickless idle/low power functionality. */
#if configUSE_TICKLESS_IDLE == 1
#ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif
#endif
#if configUSE_TICKLESS_IDLE == 1
#ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif
#endif
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */

356
portable/Renesas/RX200/port.c
View file

@ -26,8 +26,8 @@
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the RX200 port.
*----------------------------------------------------------*/
* Implementation of functions defined in portable.h for the RX200 port.
*----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
@ -42,14 +42,14 @@
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
/*-----------------------------------------------------------*/
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
* and therefore installed in the vector table, when the FreeRTOS code is built
* as a library. */
and therefore installed in the vector table, when the FreeRTOS code is built
as a library. */
extern BaseType_t vSoftwareInterruptEntry;
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
@ -79,8 +79,8 @@ void vSoftwareInterruptISR( void );
/*-----------------------------------------------------------*/
/* This is accessed by the inline assembler functions so is file scope for
* convenience. */
extern void * pxCurrentTCB;
convenience. */
extern void *pxCurrentTCB;
extern void vTaskSwitchContext( void );
/*-----------------------------------------------------------*/
@ -88,243 +88,237 @@ extern void vTaskSwitchContext( void );
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* Offset to end up on 8 byte boundary. */
pxTopOfStack--;
/* Offset to end up on 8 byte boundary. */
pxTopOfStack--;
/* R0 is not included as it is the stack pointer. */
/* R0 is not included as it is the stack pointer. */
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
* value. Otherwise code space can be saved by just setting the registers
* that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* r15. */
pxTopOfStack--;
*pxTopOfStack = 0xaaaabbbb;
pxTopOfStack--;
*pxTopOfStack = 0xdddddddd;
pxTopOfStack--;
*pxTopOfStack = 0xcccccccc;
pxTopOfStack--;
*pxTopOfStack = 0xbbbbbbbb;
pxTopOfStack--;
*pxTopOfStack = 0xaaaaaaaa;
pxTopOfStack--;
*pxTopOfStack = 0x99999999;
pxTopOfStack--;
*pxTopOfStack = 0x88888888;
pxTopOfStack--;
*pxTopOfStack = 0x77777777;
pxTopOfStack--;
*pxTopOfStack = 0x66666666;
pxTopOfStack--;
*pxTopOfStack = 0x55555555;
pxTopOfStack--;
*pxTopOfStack = 0x44444444;
pxTopOfStack--;
*pxTopOfStack = 0x33333333;
pxTopOfStack--;
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
{
pxTopOfStack -= 15;
}
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
/* When debugging it can be useful if every register is set to a known
value. Otherwise code space can be saved by just setting the registers
that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* r15. */
pxTopOfStack--;
*pxTopOfStack = 0xaaaabbbb;
pxTopOfStack--;
*pxTopOfStack = 0xdddddddd;
pxTopOfStack--;
*pxTopOfStack = 0xcccccccc;
pxTopOfStack--;
*pxTopOfStack = 0xbbbbbbbb;
pxTopOfStack--;
*pxTopOfStack = 0xaaaaaaaa;
pxTopOfStack--;
*pxTopOfStack = 0x99999999;
pxTopOfStack--;
*pxTopOfStack = 0x88888888;
pxTopOfStack--;
*pxTopOfStack = 0x77777777;
pxTopOfStack--;
*pxTopOfStack = 0x66666666;
pxTopOfStack--;
*pxTopOfStack = 0x55555555;
pxTopOfStack--;
*pxTopOfStack = 0x44444444;
pxTopOfStack--;
*pxTopOfStack = 0x33333333;
pxTopOfStack--;
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else
{
pxTopOfStack -= 15;
}
#endif
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* Accumulator. */
pxTopOfStack--;
*pxTopOfStack = 0x87654321; /* Accumulator. */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* Accumulator. */
pxTopOfStack--;
*pxTopOfStack = 0x87654321; /* Accumulator. */
return pxTopOfStack;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler( void )
{
extern void vApplicationSetupTimerInterrupt( void );
extern void vApplicationSetupTimerInterrupt( void );
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
* tick interrupt. This way the application can decide which peripheral to
* use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
tick interrupt. This way the application can decide which peripheral to
use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Enable the software interrupt. */
_IEN( _ICU_SWINT ) = 1;
/* Enable the software interrupt. */
_IEN( _ICU_SWINT ) = 1;
/* Ensure the software interrupt is clear. */
_IR( _ICU_SWINT ) = 0;
/* Ensure the software interrupt is clear. */
_IR( _ICU_SWINT ) = 0;
/* Ensure the software interrupt is set to the kernel priority. */
_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* Ensure the software interrupt is set to the kernel priority. */
_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the first task. */
prvStartFirstTask();
}
/* Start the first task. */
prvStartFirstTask();
}
/* Just to make sure the function is not optimised away. */
( void ) vSoftwareInterruptISR();
/* Just to make sure the function is not optimised away. */
( void ) vSoftwareInterruptISR();
/* Should not get here. */
return pdFAIL;
/* Should not get here. */
return pdFAIL;
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvStartFirstTask
static void prvStartFirstTask( void )
{
/* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */
SETPSW U
/* When starting the scheduler there is nothing that needs moving to the
interrupt stack because the function is not called from an interrupt.
Just ensure the current stack is the user stack. */
SETPSW U
/* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L[ R15 ], R0
/* Obtain the location of the stack associated with which ever task
pxCurrentTCB is currently pointing to. */
MOV.L #_pxCurrentTCB, R15
MOV.L [R15], R15
MOV.L [R15], R0
/* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15 /* Accumulator high 32 bits. */
POPM R1 - R15 /* R1 to R15 - R0 is not included as it is the SP. */
RTE /* This pops the remaining registers. */
/* Restore the registers from the stack of the task pointed to by
pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15 /* Accumulator high 32 bits. */
POPM R1-R15 /* R1 to R15 - R0 is not included as it is the SP. */
RTE /* This pops the remaining registers. */
NOP
NOP
NOP
}
/*-----------------------------------------------------------*/
#pragma interrupt ( vTickISR( vect = _VECT( configTICK_VECTOR ), enable ) )
void vTickISR( void )
{
/* Increment the tick, and perform any processing the new tick value
* necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
/* Increment the tick, and perform any processing the new tick value
necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
}
/*-----------------------------------------------------------*/
void vSoftwareInterruptISR( void )
{
prvYieldHandler();
prvYieldHandler();
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvYieldHandler
static void prvYieldHandler( void )
{
/* Re-enable interrupts. */
SETPSW I
/* Re-enable interrupts. */
SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack.
*
* R15 is saved before it is clobbered. */
PUSH.L R15
/* Move the data that was automatically pushed onto the interrupt stack when
the interrupt occurred from the interrupt stack to the user stack.
/* Read the user stack pointer. */
MVFC USP, R15
R15 is saved before it is clobbered. */
PUSH.L R15
/* Move the address down to the data being moved. */
SUB # 12, R15
MVTC R15, USP
/* Read the user stack pointer. */
MVFC USP, R15
/* Copy the data across. */
MOV.L[ R0 ], [ R15 ];
R15
/* Move the address down to the data being moved. */
SUB #12, R15
MVTC R15, USP
MOV.L 4[ R0 ], 4[ R15 ];
PC
MOV.L 8[ R0 ], 8[ R15 ];
PSW
/* Copy the data across. */
MOV.L [ R0 ], [ R15 ] ; R15
MOV.L 4[ R0 ], 4[ R15 ] ; PC
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
/* Move the interrupt stack pointer to its new correct position. */
ADD # 12, R0
/* Move the interrupt stack pointer to its new correct position. */
ADD #12, R0
/* All the rest of the registers are saved directly to the user stack. */
SETPSW U
/* All the rest of the registers are saved directly to the user stack. */
SETPSW U
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1 - R14
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1-R14
/* Save the accumulator. */
MVFACHI R15
PUSH.L R15
MVFACMI R15;
Middle order word.
SHLL # 16, R15;
Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the accumulator. */
MVFACHI R15
PUSH.L R15
MVFACMI R15 ; Middle order word.
SHLL #16, R15 ; Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the stack pointer to the TCB. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L R0, [ R15 ]
/* Save the stack pointer to the TCB. */
MOV.L #_pxCurrentTCB, R15
MOV.L [ R15 ], R15
MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */
MVTIPL # configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Ensure the interrupt mask is set to the syscall priority while the kernel
structures are being accessed. */
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Reset the interrupt mask as no more data structure access is required. */
MVTIPL # configKERNEL_INTERRUPT_PRIORITY
/* Reset the interrupt mask as no more data structure access is required. */
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L[ R15 ], R0
/* Load the stack pointer of the task that is now selected as the Running
state task from its TCB. */
MOV.L #_pxCurrentTCB,R15
MOV.L [ R15 ], R15
MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
MVTACHI R15
POPM R1 - R15
RTE
NOP
NOP
/* Restore the context of the new task. The PSW (Program Status Word) and
PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
MVTACHI R15
POPM R1-R15
RTE
NOP
NOP
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* Not implemented in ports where there is nothing to return to.
Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* The following line is just to prevent the symbol getting optimised away. */
( void ) vTaskSwitchContext();
/* The following line is just to prevent the symbol getting optimised away. */
( void ) vTaskSwitchContext();
}
/*-----------------------------------------------------------*/

149
portable/Renesas/RX200/portmacro.h
View file

@ -27,14 +27,14 @@
#ifndef PORTMACRO_H
#define PORTMACRO_H
#define PORTMACRO_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* Hardware specifics. */
#include "machine.h"
#include "machine.h"
/*-----------------------------------------------------------
* Port specific definitions.
@ -47,94 +47,95 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#if( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#pragma inline_asm vPortYield
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L # 553696, R5
MOV.B # 1, [ R5 ]
/* Read back to ensure the value is taken before proceeding. */
MOV.L[ R5 ], R5
/* Restore clobbered register to its previous value. */
POP R5
}
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
#pragma inline_asm vPortYield
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
functions are considered to use the same rules as function calls by the
compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L #553696, R5
MOV.B #1, [R5]
/* Read back to ensure the value is taken before proceeding. */
MOV.L [R5], R5
/* Restore clobbered register to its previous value. */
POP R5
}
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
/* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif
/* Critical nesting counts are stored in the TCB. */
#define portCRITICAL_NESTING_IN_TCB ( 1 )
#define portCRITICAL_NESTING_IN_TCB ( 1 )
/* The critical nesting functions defined within tasks.c. */
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical()
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */
#define portSET_INTERRUPT_MASK_FROM_ISR() get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus )
#define portSET_INTERRUPT_MASK_FROM_ISR() get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus )
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */

364
portable/Renesas/RX600/port.c
View file

@ -26,8 +26,8 @@
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the RX600 port.
*----------------------------------------------------------*/
* Implementation of functions defined in portable.h for the RX600 port.
*----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
@ -42,15 +42,15 @@
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
/*-----------------------------------------------------------*/
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
* and therefore installed in the vector table, when the FreeRTOS code is built
* as a library. */
and therefore installed in the vector table, when the FreeRTOS code is built
as a library. */
extern BaseType_t vSoftwareInterruptEntry;
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
@ -80,8 +80,8 @@ void vSoftwareInterruptISR( void );
/*-----------------------------------------------------------*/
/* This is accessed by the inline assembler functions so is file scope for
* convenience. */
extern void * pxCurrentTCB;
convenience. */
extern void *pxCurrentTCB;
extern void vTaskSwitchContext( void );
/*-----------------------------------------------------------*/
@ -89,247 +89,241 @@ extern void vTaskSwitchContext( void );
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* R0 is not included as it is the stack pointer. */
/* R0 is not included as it is the stack pointer. */
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode;
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
* value. Otherwise code space can be saved by just setting the registers
* that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
*pxTopOfStack = 0xffffffff; /* r15. */
pxTopOfStack--;
*pxTopOfStack = 0xeeeeeeee;
pxTopOfStack--;
*pxTopOfStack = 0xdddddddd;
pxTopOfStack--;
*pxTopOfStack = 0xcccccccc;
pxTopOfStack--;
*pxTopOfStack = 0xbbbbbbbb;
pxTopOfStack--;
*pxTopOfStack = 0xaaaaaaaa;
pxTopOfStack--;
*pxTopOfStack = 0x99999999;
pxTopOfStack--;
*pxTopOfStack = 0x88888888;
pxTopOfStack--;
*pxTopOfStack = 0x77777777;
pxTopOfStack--;
*pxTopOfStack = 0x66666666;
pxTopOfStack--;
*pxTopOfStack = 0x55555555;
pxTopOfStack--;
*pxTopOfStack = 0x44444444;
pxTopOfStack--;
*pxTopOfStack = 0x33333333;
pxTopOfStack--;
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
{
pxTopOfStack -= 15;
}
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
/* When debugging it can be useful if every register is set to a known
value. Otherwise code space can be saved by just setting the registers
that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
*pxTopOfStack = 0xffffffff; /* r15. */
pxTopOfStack--;
*pxTopOfStack = 0xeeeeeeee;
pxTopOfStack--;
*pxTopOfStack = 0xdddddddd;
pxTopOfStack--;
*pxTopOfStack = 0xcccccccc;
pxTopOfStack--;
*pxTopOfStack = 0xbbbbbbbb;
pxTopOfStack--;
*pxTopOfStack = 0xaaaaaaaa;
pxTopOfStack--;
*pxTopOfStack = 0x99999999;
pxTopOfStack--;
*pxTopOfStack = 0x88888888;
pxTopOfStack--;
*pxTopOfStack = 0x77777777;
pxTopOfStack--;
*pxTopOfStack = 0x66666666;
pxTopOfStack--;
*pxTopOfStack = 0x55555555;
pxTopOfStack--;
*pxTopOfStack = 0x44444444;
pxTopOfStack--;
*pxTopOfStack = 0x33333333;
pxTopOfStack--;
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else
{
pxTopOfStack -= 15;
}
#endif
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = portINITIAL_FPSW;
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* Accumulator. */
pxTopOfStack--;
*pxTopOfStack = 0x87654321; /* Accumulator. */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = portINITIAL_FPSW;
pxTopOfStack--;
*pxTopOfStack = 0x12345678; /* Accumulator. */
pxTopOfStack--;
*pxTopOfStack = 0x87654321; /* Accumulator. */
return pxTopOfStack;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler( void )
{
extern void vApplicationSetupTimerInterrupt( void );
extern void vApplicationSetupTimerInterrupt( void );
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
* tick interrupt. This way the application can decide which peripheral to
* use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
tick interrupt. This way the application can decide which peripheral to
use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Enable the software interrupt. */
_IEN( _ICU_SWINT ) = 1;
/* Enable the software interrupt. */
_IEN( _ICU_SWINT ) = 1;
/* Ensure the software interrupt is clear. */
_IR( _ICU_SWINT ) = 0;
/* Ensure the software interrupt is clear. */
_IR( _ICU_SWINT ) = 0;
/* Ensure the software interrupt is set to the kernel priority. */
_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* Ensure the software interrupt is set to the kernel priority. */
_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the first task. */
prvStartFirstTask();
}
/* Start the first task. */
prvStartFirstTask();
}
/* Just to make sure the function is not optimised away. */
( void ) vSoftwareInterruptISR();
/* Just to make sure the function is not optimised away. */
( void ) vSoftwareInterruptISR();
/* Should not get here. */
return pdFAIL;
/* Should not get here. */
return pdFAIL;
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvStartFirstTask
static void prvStartFirstTask( void )
{
/* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */
SETPSW U
/* When starting the scheduler there is nothing that needs moving to the
interrupt stack because the function is not called from an interrupt.
Just ensure the current stack is the user stack. */
SETPSW U
/* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L[ R15 ], R0
/* Obtain the location of the stack associated with which ever task
pxCurrentTCB is currently pointing to. */
MOV.L #_pxCurrentTCB, R15
MOV.L [R15], R15
MOV.L [R15], R0
/* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15 /* Accumulator high 32 bits. */
POP R15
MVTC R15, FPSW /* Floating point status word. */
POPM R1 - R15 /* R1 to R15 - R0 is not included as it is the SP. */
RTE /* This pops the remaining registers. */
/* Restore the registers from the stack of the task pointed to by
pxCurrentTCB. */
POP R15
MVTACLO R15 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15 /* Accumulator high 32 bits. */
POP R15
MVTC R15,FPSW /* Floating point status word. */
POPM R1-R15 /* R1 to R15 - R0 is not included as it is the SP. */
RTE /* This pops the remaining registers. */
NOP
NOP
NOP
}
/*-----------------------------------------------------------*/
#pragma interrupt ( vTickISR( vect = _VECT( configTICK_VECTOR ), enable ) )
void vTickISR( void )
{
/* Increment the tick, and perform any processing the new tick value
* necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
/* Increment the tick, and perform any processing the new tick value
necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
}
/*-----------------------------------------------------------*/
void vSoftwareInterruptISR( void )
{
prvYieldHandler();
prvYieldHandler();
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvYieldHandler
static void prvYieldHandler( void )
{
/* Re-enable interrupts. */
SETPSW I
/* Re-enable interrupts. */
SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack.
*
* R15 is saved before it is clobbered. */
PUSH.L R15
/* Move the data that was automatically pushed onto the interrupt stack when
the interrupt occurred from the interrupt stack to the user stack.
/* Read the user stack pointer. */
MVFC USP, R15
R15 is saved before it is clobbered. */
PUSH.L R15
/* Move the address down to the data being moved. */
SUB # 12, R15
MVTC R15, USP
/* Read the user stack pointer. */
MVFC USP, R15
/* Copy the data across. */
MOV.L[ R0 ], [ R15 ];
R15
/* Move the address down to the data being moved. */
SUB #12, R15
MVTC R15, USP
MOV.L 4[ R0 ], 4[ R15 ];
PC
MOV.L 8[ R0 ], 8[ R15 ];
PSW
/* Copy the data across. */
MOV.L [ R0 ], [ R15 ] ; R15
MOV.L 4[ R0 ], 4[ R15 ] ; PC
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
/* Move the interrupt stack pointer to its new correct position. */
ADD # 12, R0
/* Move the interrupt stack pointer to its new correct position. */
ADD #12, R0
/* All the rest of the registers are saved directly to the user stack. */
SETPSW U
/* All the rest of the registers are saved directly to the user stack. */
SETPSW U
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1 - R14
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1-R14
/* Save the FPSW and accumulator. */
MVFC FPSW, R15
PUSH.L R15
MVFACHI R15
PUSH.L R15
MVFACMI R15;
Middle order word.
SHLL # 16, R15;
Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the FPSW and accumulator. */
MVFC FPSW, R15
PUSH.L R15
MVFACHI R15
PUSH.L R15
MVFACMI R15 ; Middle order word.
SHLL #16, R15 ; Shifted left as it is restored to the low order word.
PUSH.L R15
/* Save the stack pointer to the TCB. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L R0, [ R15 ]
/* Save the stack pointer to the TCB. */
MOV.L #_pxCurrentTCB, R15
MOV.L [ R15 ], R15
MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */
MVTIPL # configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Ensure the interrupt mask is set to the syscall priority while the kernel
structures are being accessed. */
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Reset the interrupt mask as no more data structure access is required. */
MVTIPL # configKERNEL_INTERRUPT_PRIORITY
/* Reset the interrupt mask as no more data structure access is required. */
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L[ R15 ], R0
/* Load the stack pointer of the task that is now selected as the Running
state task from its TCB. */
MOV.L #_pxCurrentTCB,R15
MOV.L [ R15 ], R15
MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
MVTACHI R15
POP R15
MVTC R15, FPSW
POPM R1 - R15
RTE
NOP
NOP
/* Restore the context of the new task. The PSW (Program Status Word) and
PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15
POP R15
MVTACHI R15
POP R15
MVTC R15,FPSW
POPM R1-R15
RTE
NOP
NOP
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* Not implemented in ports where there is nothing to return to.
Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* The following line is just to prevent the symbol getting optimised away. */
( void ) vTaskSwitchContext();
/* The following line is just to prevent the symbol getting optimised away. */
( void ) vTaskSwitchContext();
}
/*-----------------------------------------------------------*/

149
portable/Renesas/RX600/portmacro.h
View file

@ -27,14 +27,14 @@
#ifndef PORTMACRO_H
#define PORTMACRO_H
#define PORTMACRO_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* Hardware specifics. */
#include "machine.h"
#include "machine.h"
/*-----------------------------------------------------------
* Port specific definitions.
@ -47,95 +47,96 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#if( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#pragma inline_asm vPortYield
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L # 553696, R5
MOV.B # 1, [ R5 ]
/* Read back to ensure the value is taken before proceeding. */
MOV.L[ R5 ], R5
/* Restore clobbered register to its previous value. */
POP R5
}
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
#pragma inline_asm vPortYield
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
functions are considered to use the same rules as function calls by the
compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L #553696, R5
MOV.B #1, [R5]
/* Read back to ensure the value is taken before proceeding. */
MOV.L [R5], R5
/* Restore clobbered register to its previous value. */
POP R5
}
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
/* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif
/* Critical nesting counts are stored in the TCB. */
#define portCRITICAL_NESTING_IN_TCB ( 1 )
#define portCRITICAL_NESTING_IN_TCB ( 1 )
/* The critical nesting functions defined within tasks.c. */
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical()
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */
#define portSET_INTERRUPT_MASK_FROM_ISR() get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus )
#define portSET_INTERRUPT_MASK_FROM_ISR() get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus )
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */

430
portable/Renesas/RX600v2/port.c
View file

@ -26,8 +26,8 @@
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the RX600 port.
*----------------------------------------------------------*/
* Implementation of functions defined in portable.h for the RX600 port.
*----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
@ -38,23 +38,23 @@
/* Hardware specifics. */
#if defined( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H ) && ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
#include "platform.h"
#include "platform.h"
#else
#include "iodefine.h"
#include "iodefine.h"
#endif
/*-----------------------------------------------------------*/
/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
* PSW is set with U and I set, and PM and IPL clear. */
PSW is set with U and I set, and PM and IPL clear. */
#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
/*-----------------------------------------------------------*/
/* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
* and therefore installed in the vector table, when the FreeRTOS code is built
* as a library. */
and therefore installed in the vector table, when the FreeRTOS code is built
as a library. */
extern BaseType_t vSoftwareInterruptEntry;
const BaseType_t * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
@ -84,8 +84,8 @@ void vSoftwareInterruptISR( void );
/*-----------------------------------------------------------*/
/* This is accessed by the inline assembler functions so is file scope for
* convenience. */
extern void * pxCurrentTCB;
convenience. */
extern void *pxCurrentTCB;
extern void vTaskSwitchContext( void );
/*-----------------------------------------------------------*/
@ -93,278 +93,272 @@ extern void vTaskSwitchContext( void );
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* R0 is not included as it is the stack pointer. */
/* R0 is not included as it is the stack pointer. */
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode;
*pxTopOfStack = 0x00;
pxTopOfStack--;
*pxTopOfStack = portINITIAL_PSW;
pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) pxCode;
/* When debugging it can be useful if every register is set to a known
* value. Otherwise code space can be saved by just setting the registers
* that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
*pxTopOfStack = 0xffffffff; /* r15. */
pxTopOfStack--;
*pxTopOfStack = 0xeeeeeeee;
pxTopOfStack--;
*pxTopOfStack = 0xdddddddd;
pxTopOfStack--;
*pxTopOfStack = 0xcccccccc;
pxTopOfStack--;
*pxTopOfStack = 0xbbbbbbbb;
pxTopOfStack--;
*pxTopOfStack = 0xaaaaaaaa;
pxTopOfStack--;
*pxTopOfStack = 0x99999999;
pxTopOfStack--;
*pxTopOfStack = 0x88888888;
pxTopOfStack--;
*pxTopOfStack = 0x77777777;
pxTopOfStack--;
*pxTopOfStack = 0x66666666;
pxTopOfStack--;
*pxTopOfStack = 0x55555555;
pxTopOfStack--;
*pxTopOfStack = 0x44444444;
pxTopOfStack--;
*pxTopOfStack = 0x33333333;
pxTopOfStack--;
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
{
pxTopOfStack -= 15;
}
#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
/* When debugging it can be useful if every register is set to a known
value. Otherwise code space can be saved by just setting the registers
that need to be set. */
#ifdef USE_FULL_REGISTER_INITIALISATION
{
pxTopOfStack--;
*pxTopOfStack = 0xffffffff; /* r15. */
pxTopOfStack--;
*pxTopOfStack = 0xeeeeeeee;
pxTopOfStack--;
*pxTopOfStack = 0xdddddddd;
pxTopOfStack--;
*pxTopOfStack = 0xcccccccc;
pxTopOfStack--;
*pxTopOfStack = 0xbbbbbbbb;
pxTopOfStack--;
*pxTopOfStack = 0xaaaaaaaa;
pxTopOfStack--;
*pxTopOfStack = 0x99999999;
pxTopOfStack--;
*pxTopOfStack = 0x88888888;
pxTopOfStack--;
*pxTopOfStack = 0x77777777;
pxTopOfStack--;
*pxTopOfStack = 0x66666666;
pxTopOfStack--;
*pxTopOfStack = 0x55555555;
pxTopOfStack--;
*pxTopOfStack = 0x44444444;
pxTopOfStack--;
*pxTopOfStack = 0x33333333;
pxTopOfStack--;
*pxTopOfStack = 0x22222222;
pxTopOfStack--;
}
#else
{
pxTopOfStack -= 15;
}
#endif
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = portINITIAL_FPSW;
pxTopOfStack--;
*pxTopOfStack = 0x11111111; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x22222222; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x33333333; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x44444444; /* Accumulator 1. */
pxTopOfStack--;
*pxTopOfStack = 0x55555555; /* Accumulator 1. */
pxTopOfStack--;
*pxTopOfStack = 0x66666666; /* Accumulator 1. */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
pxTopOfStack--;
*pxTopOfStack = portINITIAL_FPSW;
pxTopOfStack--;
*pxTopOfStack = 0x11111111; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x22222222; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x33333333; /* Accumulator 0. */
pxTopOfStack--;
*pxTopOfStack = 0x44444444; /* Accumulator 1. */
pxTopOfStack--;
*pxTopOfStack = 0x55555555; /* Accumulator 1. */
pxTopOfStack--;
*pxTopOfStack = 0x66666666; /* Accumulator 1. */
return pxTopOfStack;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler( void )
{
extern void vApplicationSetupTimerInterrupt( void );
extern void vApplicationSetupTimerInterrupt( void );
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
* tick interrupt. This way the application can decide which peripheral to
* use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Use pxCurrentTCB just so it does not get optimised away. */
if( pxCurrentTCB != NULL )
{
/* Call an application function to set up the timer that will generate the
tick interrupt. This way the application can decide which peripheral to
use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Enable the software interrupt. */
_IEN( _ICU_SWINT ) = 1;
/* Enable the software interrupt. */
_IEN( _ICU_SWINT ) = 1;
/* Ensure the software interrupt is clear. */
_IR( _ICU_SWINT ) = 0;
/* Ensure the software interrupt is clear. */
_IR( _ICU_SWINT ) = 0;
/* Ensure the software interrupt is set to the kernel priority. */
_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* Ensure the software interrupt is set to the kernel priority. */
_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the first task. */
prvStartFirstTask();
}
/* Start the first task. */
prvStartFirstTask();
}
/* Just to make sure the function is not optimised away. */
( void ) vSoftwareInterruptISR();
/* Just to make sure the function is not optimised away. */
( void ) vSoftwareInterruptISR();
/* Should not get here. */
return pdFAIL;
/* Should not get here. */
return pdFAIL;
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvStartFirstTask
static void prvStartFirstTask( void )
{
/* When starting the scheduler there is nothing that needs moving to the
* interrupt stack because the function is not called from an interrupt.
* Just ensure the current stack is the user stack. */
SETPSW U
/* When starting the scheduler there is nothing that needs moving to the
interrupt stack because the function is not called from an interrupt.
Just ensure the current stack is the user stack. */
SETPSW U
/* Obtain the location of the stack associated with which ever task
* pxCurrentTCB is currently pointing to. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L[ R15 ], R0
/* Obtain the location of the stack associated with which ever task
pxCurrentTCB is currently pointing to. */
MOV.L #_pxCurrentTCB, R15
MOV.L [R15], R15
MOV.L [R15], R0
/* Restore the registers from the stack of the task pointed to by
* pxCurrentTCB. */
POP R15
MVTACLO R15, A0 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15, A0 /* Accumulator high 32 bits. */
POP R15
MVTACGU R15, A0 /* Accumulator guard. */
POP R15
MVTACLO R15, A1 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15, A1 /* Accumulator high 32 bits. */
POP R15
MVTACGU R15, A1 /* Accumulator guard. */
POP R15
MVTC R15, FPSW /* Floating point status word. */
POPM R1 - R15 /* R1 to R15 - R0 is not included as it is the SP. */
RTE /* This pops the remaining registers. */
/* Restore the registers from the stack of the task pointed to by
pxCurrentTCB. */
POP R15
MVTACLO R15, A0 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15, A0 /* Accumulator high 32 bits. */
POP R15
MVTACGU R15, A0 /* Accumulator guard. */
POP R15
MVTACLO R15, A1 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15, A1 /* Accumulator high 32 bits. */
POP R15
MVTACGU R15, A1 /* Accumulator guard. */
POP R15
MVTC R15,FPSW /* Floating point status word. */
POPM R1-R15 /* R1 to R15 - R0 is not included as it is the SP. */
RTE /* This pops the remaining registers. */
NOP
NOP
NOP
}
/*-----------------------------------------------------------*/
#pragma interrupt ( vTickISR( vect = _VECT( configTICK_VECTOR ), enable ) )
void vTickISR( void )
{
/* Increment the tick, and perform any processing the new tick value
* necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
/* Increment the tick, and perform any processing the new tick value
necessitates. */
set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
{
if( xTaskIncrementTick() != pdFALSE )
{
taskYIELD();
}
}
set_ipl( configKERNEL_INTERRUPT_PRIORITY );
}
/*-----------------------------------------------------------*/
void vSoftwareInterruptISR( void )
{
prvYieldHandler();
prvYieldHandler();
}
/*-----------------------------------------------------------*/
#pragma inline_asm prvYieldHandler
static void prvYieldHandler( void )
{
/* Re-enable interrupts. */
SETPSW I
/* Re-enable interrupts. */
SETPSW I
/* Move the data that was automatically pushed onto the interrupt stack when
* the interrupt occurred from the interrupt stack to the user stack.
*
* R15 is saved before it is clobbered. */
PUSH.L R15
/* Move the data that was automatically pushed onto the interrupt stack when
the interrupt occurred from the interrupt stack to the user stack.
/* Read the user stack pointer. */
MVFC USP, R15
R15 is saved before it is clobbered. */
PUSH.L R15
/* Move the address down to the data being moved. */
SUB # 12, R15
MVTC R15, USP
/* Read the user stack pointer. */
MVFC USP, R15
/* Copy the data across. */
MOV.L[ R0 ], [ R15 ];
R15
/* Move the address down to the data being moved. */
SUB #12, R15
MVTC R15, USP
MOV.L 4[ R0 ], 4[ R15 ];
PC
MOV.L 8[ R0 ], 8[ R15 ];
PSW
/* Copy the data across. */
MOV.L [ R0 ], [ R15 ] ; R15
MOV.L 4[ R0 ], 4[ R15 ] ; PC
MOV.L 8[ R0 ], 8[ R15 ] ; PSW
/* Move the interrupt stack pointer to its new correct position. */
ADD # 12, R0
/* Move the interrupt stack pointer to its new correct position. */
ADD #12, R0
/* All the rest of the registers are saved directly to the user stack. */
SETPSW U
/* All the rest of the registers are saved directly to the user stack. */
SETPSW U
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1 - R14
/* Save the rest of the general registers (R15 has been saved already). */
PUSHM R1-R14
/* Save the FPSW and accumulators. */
MVFC FPSW, R15
PUSH.L R15
MVFACGU # 0, A1, R15
PUSH.L R15
MVFACHI # 0, A1, R15
PUSH.L R15
MVFACLO # 0, A1, R15;
Low order word.
PUSH.L R15
MVFACGU # 0, A0, R15
PUSH.L R15
MVFACHI # 0, A0, R15
PUSH.L R15
MVFACLO # 0, A0, R15;
Low order word.
PUSH.L R15
/* Save the FPSW and accumulators. */
MVFC FPSW, R15
PUSH.L R15
MVFACGU #0, A1, R15
PUSH.L R15
MVFACHI #0, A1, R15
PUSH.L R15
MVFACLO #0, A1, R15 ; Low order word.
PUSH.L R15
MVFACGU #0, A0, R15
PUSH.L R15
MVFACHI #0, A0, R15
PUSH.L R15
MVFACLO #0, A0, R15 ; Low order word.
PUSH.L R15
/* Save the stack pointer to the TCB. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L R0, [ R15 ]
/* Save the stack pointer to the TCB. */
MOV.L #_pxCurrentTCB, R15
MOV.L [ R15 ], R15
MOV.L R0, [ R15 ]
/* Ensure the interrupt mask is set to the syscall priority while the kernel
* structures are being accessed. */
MVTIPL # configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Ensure the interrupt mask is set to the syscall priority while the kernel
structures are being accessed. */
MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Select the next task to run. */
BSR.A _vTaskSwitchContext
/* Reset the interrupt mask as no more data structure access is required. */
MVTIPL # configKERNEL_INTERRUPT_PRIORITY
/* Reset the interrupt mask as no more data structure access is required. */
MVTIPL #configKERNEL_INTERRUPT_PRIORITY
/* Load the stack pointer of the task that is now selected as the Running
* state task from its TCB. */
MOV.L # _pxCurrentTCB, R15
MOV.L[ R15 ], R15
MOV.L[ R15 ], R0
/* Load the stack pointer of the task that is now selected as the Running
state task from its TCB. */
MOV.L #_pxCurrentTCB,R15
MOV.L [ R15 ], R15
MOV.L [ R15 ], R0
/* Restore the context of the new task. The PSW (Program Status Word) and
* PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15, A0 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15, A0 /* Accumulator high 32 bits. */
POP R15
MVTACGU R15, A0 /* Accumulator guard. */
POP R15
MVTACLO R15, A1 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15, A1 /* Accumulator high 32 bits. */
POP R15
MVTACGU R15, A1 /* Accumulator guard. */
POP R15
MVTC R15, FPSW
POPM R1 - R15
RTE
NOP
NOP
/* Restore the context of the new task. The PSW (Program Status Word) and
PC will be popped by the RTE instruction. */
POP R15
MVTACLO R15, A0 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15, A0 /* Accumulator high 32 bits. */
POP R15
MVTACGU R15, A0 /* Accumulator guard. */
POP R15
MVTACLO R15, A1 /* Accumulator low 32 bits. */
POP R15
MVTACHI R15, A1 /* Accumulator high 32 bits. */
POP R15
MVTACGU R15, A1 /* Accumulator guard. */
POP R15
MVTC R15,FPSW
POPM R1-R15
RTE
NOP
NOP
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* Not implemented in ports where there is nothing to return to.
* Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* Not implemented in ports where there is nothing to return to.
Artificially force an assert. */
configASSERT( pxCurrentTCB == NULL );
/* The following line is just to prevent the symbol getting optimised away. */
( void ) vTaskSwitchContext();
/* The following line is just to prevent the symbol getting optimised away. */
( void ) vTaskSwitchContext();
}
/*-----------------------------------------------------------*/

149
portable/Renesas/RX600v2/portmacro.h
View file

@ -27,14 +27,14 @@
#ifndef PORTMACRO_H
#define PORTMACRO_H
#define PORTMACRO_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* Hardware specifics. */
#include "machine.h"
#include "machine.h"
/*-----------------------------------------------------------
* Port specific definitions.
@ -47,95 +47,96 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#if( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#pragma inline_asm vPortYield
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
* functions are considered to use the same rules as function calls by the
* compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L # 553696, R5
MOV.B # 1, [ R5 ]
/* Read back to ensure the value is taken before proceeding. */
MOV.L[ R5 ], R5
/* Restore clobbered register to its previous value. */
POP R5
}
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
#pragma inline_asm vPortYield
static void vPortYield( void )
{
/* Save clobbered register - may not actually be necessary if inline asm
functions are considered to use the same rules as function calls by the
compiler. */
PUSH.L R5
/* Set ITU SWINTR. */
MOV.L #553696, R5
MOV.B #1, [R5]
/* Read back to ensure the value is taken before proceeding. */
MOV.L [R5], R5
/* Restore clobbered register to its previous value. */
POP R5
}
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
/* These macros should not be called directly, but through the
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
* performed if configASSERT() is defined to ensure an assertion handler does not
* inadvertently attempt to lower the IPL when the call to assert was triggered
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
* functions are those that end in FromISR. FreeRTOS maintains a separate
* interrupt API to ensure API function and interrupt entry is as fast and as
* simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
performed if configASSERT() is defined to ensure an assertion handler does not
inadvertently attempt to lower the IPL when the call to assert was triggered
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
functions are those that end in FromISR. FreeRTOS maintains a separate
interrupt API to ensure API function and interrupt entry is as fast and as
simple as possible. */
#define portENABLE_INTERRUPTS() set_ipl( ( long ) 0 )
#ifdef configASSERT
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( get_ipl() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
#define portDISABLE_INTERRUPTS() if( get_ipl() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#else
#define portDISABLE_INTERRUPTS() set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#endif
/* Critical nesting counts are stored in the TCB. */
#define portCRITICAL_NESTING_IN_TCB ( 1 )
#define portCRITICAL_NESTING_IN_TCB ( 1 )
/* The critical nesting functions defined within tasks.c. */
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical()
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical()
#define portEXIT_CRITICAL() vTaskExitCritical()
/* As this port allows interrupt nesting... */
#define portSET_INTERRUPT_MASK_FROM_ISR() ( UBaseType_t ) get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus )
#define portSET_INTERRUPT_MASK_FROM_ISR() ( UBaseType_t ) get_ipl(); set_ipl( ( long ) configMAX_SYSCALL_INTERRUPT_PRIORITY )
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) set_ipl( ( long ) uxSavedInterruptStatus )
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */

290
portable/Renesas/SH2A_FPU/port.c
View file

@ -26,8 +26,8 @@
*/
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the SH2A port.
*----------------------------------------------------------*/
* Implementation of functions defined in portable.h for the SH2A port.
*----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
@ -39,18 +39,18 @@
/*-----------------------------------------------------------*/
/* The SR assigned to a newly created task. The only important thing in this
* value is for all interrupts to be enabled. */
#define portINITIAL_SR ( 0UL )
value is for all interrupts to be enabled. */
#define portINITIAL_SR ( 0UL )
/* Dimensions the array into which the floating point context is saved.
* Allocate enough space for FPR0 to FPR15, FPUL and FPSCR, each of which is 4
* bytes big. If this number is changed then the 72 in portasm.src also needs
* changing. */
#define portFLOP_REGISTERS_TO_STORE ( 18 )
#define portFLOP_STORAGE_SIZE ( portFLOP_REGISTERS_TO_STORE * 4 )
Allocate enough space for FPR0 to FPR15, FPUL and FPSCR, each of which is 4
bytes big. If this number is changed then the 72 in portasm.src also needs
changing. */
#define portFLOP_REGISTERS_TO_STORE ( 18 )
#define portFLOP_STORAGE_SIZE ( portFLOP_REGISTERS_TO_STORE * 4 )
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
#error configSUPPORT_DYNAMIC_ALLOCATION must be 1 to use this port.
#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
#error configSUPPORT_DYNAMIC_ALLOCATION must be 1 to use this port.
#endif
/*-----------------------------------------------------------*/
@ -75,197 +75,197 @@ extern uint32_t ulPortGetGBR( void );
/*
* See header file for description.
*/
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
/* Mark the end of the stack - used for debugging only and can be removed. */
*pxTopOfStack = 0x11111111UL;
pxTopOfStack--;
*pxTopOfStack = 0x22222222UL;
pxTopOfStack--;
*pxTopOfStack = 0x33333333UL;
pxTopOfStack--;
/* Mark the end of the stack - used for debugging only and can be removed. */
*pxTopOfStack = 0x11111111UL;
pxTopOfStack--;
*pxTopOfStack = 0x22222222UL;
pxTopOfStack--;
*pxTopOfStack = 0x33333333UL;
pxTopOfStack--;
/* SR. */
*pxTopOfStack = portINITIAL_SR;
pxTopOfStack--;
/* SR. */
*pxTopOfStack = portINITIAL_SR;
pxTopOfStack--;
/* PC. */
*pxTopOfStack = ( uint32_t ) pxCode;
pxTopOfStack--;
/* PC. */
*pxTopOfStack = ( uint32_t ) pxCode;
pxTopOfStack--;
/* PR. */
*pxTopOfStack = 15;
pxTopOfStack--;
/* PR. */
*pxTopOfStack = 15;
pxTopOfStack--;
/* 14. */
*pxTopOfStack = 14;
pxTopOfStack--;
/* 14. */
*pxTopOfStack = 14;
pxTopOfStack--;
/* R13. */
*pxTopOfStack = 13;
pxTopOfStack--;
/* R13. */
*pxTopOfStack = 13;
pxTopOfStack--;
/* R12. */
*pxTopOfStack = 12;
pxTopOfStack--;
/* R12. */
*pxTopOfStack = 12;
pxTopOfStack--;
/* R11. */
*pxTopOfStack = 11;
pxTopOfStack--;
/* R11. */
*pxTopOfStack = 11;
pxTopOfStack--;
/* R10. */
*pxTopOfStack = 10;
pxTopOfStack--;
/* R10. */
*pxTopOfStack = 10;
pxTopOfStack--;
/* R9. */
*pxTopOfStack = 9;
pxTopOfStack--;
/* R9. */
*pxTopOfStack = 9;
pxTopOfStack--;
/* R8. */
*pxTopOfStack = 8;
pxTopOfStack--;
/* R8. */
*pxTopOfStack = 8;
pxTopOfStack--;
/* R7. */
*pxTopOfStack = 7;
pxTopOfStack--;
/* R7. */
*pxTopOfStack = 7;
pxTopOfStack--;
/* R6. */
*pxTopOfStack = 6;
pxTopOfStack--;
/* R6. */
*pxTopOfStack = 6;
pxTopOfStack--;
/* R5. */
*pxTopOfStack = 5;
pxTopOfStack--;
/* R5. */
*pxTopOfStack = 5;
pxTopOfStack--;
/* R4. */
*pxTopOfStack = ( uint32_t ) pvParameters;
pxTopOfStack--;
/* R4. */
*pxTopOfStack = ( uint32_t ) pvParameters;
pxTopOfStack--;
/* R3. */
*pxTopOfStack = 3;
pxTopOfStack--;
/* R3. */
*pxTopOfStack = 3;
pxTopOfStack--;
/* R2. */
*pxTopOfStack = 2;
pxTopOfStack--;
/* R2. */
*pxTopOfStack = 2;
pxTopOfStack--;
/* R1. */
*pxTopOfStack = 1;
pxTopOfStack--;
/* R1. */
*pxTopOfStack = 1;
pxTopOfStack--;
/* R0 */
*pxTopOfStack = 0;
pxTopOfStack--;
/* R0 */
*pxTopOfStack = 0;
pxTopOfStack--;
/* MACL. */
*pxTopOfStack = 16;
pxTopOfStack--;
/* MACL. */
*pxTopOfStack = 16;
pxTopOfStack--;
/* MACH. */
*pxTopOfStack = 17;
pxTopOfStack--;
/* MACH. */
*pxTopOfStack = 17;
pxTopOfStack--;
/* GBR. */
*pxTopOfStack = ulPortGetGBR();
/* GBR. */
*pxTopOfStack = ulPortGetGBR();
/* GBR = global base register.
* VBR = vector base register.
* TBR = jump table base register.
* R15 is the stack pointer. */
/* GBR = global base register.
VBR = vector base register.
TBR = jump table base register.
R15 is the stack pointer. */
return pxTopOfStack;
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler( void )
{
extern void vApplicationSetupTimerInterrupt( void );
extern void vApplicationSetupTimerInterrupt( void );
/* Call an application function to set up the timer that will generate the
* tick interrupt. This way the application can decide which peripheral to
* use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Call an application function to set up the timer that will generate the
tick interrupt. This way the application can decide which peripheral to
use. A demo application is provided to show a suitable example. */
vApplicationSetupTimerInterrupt();
/* Start the first task. This will only restore the standard registers and
* not the flop registers. This does not really matter though because the only
* flop register that is initialised to a particular value is fpscr, and it is
* only initialised to the current value, which will still be the current value
* when the first task starts executing. */
trapa( portSTART_SCHEDULER_TRAP_NO );
/* Start the first task. This will only restore the standard registers and
not the flop registers. This does not really matter though because the only
flop register that is initialised to a particular value is fpscr, and it is
only initialised to the current value, which will still be the current value
when the first task starts executing. */
trapa( portSTART_SCHEDULER_TRAP_NO );
/* Should not get here. */
return pdFAIL;
/* Should not get here. */
return pdFAIL;
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* Not implemented as there is nothing to return to. */
/* Not implemented as there is nothing to return to. */
}
/*-----------------------------------------------------------*/
void vPortYield( void )
{
int32_t lInterruptMask;
int32_t lInterruptMask;
/* Ensure the yield trap runs at the same priority as the other interrupts
* that can cause a context switch. */
lInterruptMask = get_imask();
/* Ensure the yield trap runs at the same priority as the other interrupts
that can cause a context switch. */
lInterruptMask = get_imask();
/* taskYIELD() can only be called from a task, not an interrupt, so the
* current interrupt mask can only be 0 or portKERNEL_INTERRUPT_PRIORITY and
* the mask can be set without risk of accidentally lowering the mask value. */
set_imask( portKERNEL_INTERRUPT_PRIORITY );
/* taskYIELD() can only be called from a task, not an interrupt, so the
current interrupt mask can only be 0 or portKERNEL_INTERRUPT_PRIORITY and
the mask can be set without risk of accidentally lowering the mask value. */
set_imask( portKERNEL_INTERRUPT_PRIORITY );
trapa( portYIELD_TRAP_NO );
trapa( portYIELD_TRAP_NO );
/* Restore the interrupt mask to whatever it was previously (when the
* function was entered). */
set_imask( ( int ) lInterruptMask );
/* Restore the interrupt mask to whatever it was previously (when the
function was entered). */
set_imask( ( int ) lInterruptMask );
}
/*-----------------------------------------------------------*/
BaseType_t xPortUsesFloatingPoint( TaskHandle_t xTask )
{
uint32_t * pulFlopBuffer;
BaseType_t xReturn;
extern void * volatile pxCurrentTCB;
uint32_t *pulFlopBuffer;
BaseType_t xReturn;
extern void * volatile pxCurrentTCB;
/* This function tells the kernel that the task referenced by xTask is
* going to use the floating point registers and therefore requires the
* floating point registers saved as part of its context. */
/* This function tells the kernel that the task referenced by xTask is
going to use the floating point registers and therefore requires the
floating point registers saved as part of its context. */
/* Passing NULL as xTask is used to indicate that the calling task is the
* subject task - so pxCurrentTCB is the task handle. */
if( xTask == NULL )
{
xTask = ( TaskHandle_t ) pxCurrentTCB;
}
/* Passing NULL as xTask is used to indicate that the calling task is the
subject task - so pxCurrentTCB is the task handle. */
if( xTask == NULL )
{
xTask = ( TaskHandle_t ) pxCurrentTCB;
}
/* Allocate a buffer large enough to hold all the flop registers. */
pulFlopBuffer = ( uint32_t * ) pvPortMalloc( portFLOP_STORAGE_SIZE );
/* Allocate a buffer large enough to hold all the flop registers. */
pulFlopBuffer = ( uint32_t * ) pvPortMalloc( portFLOP_STORAGE_SIZE );
if( pulFlopBuffer != NULL )
{
/* Start with the registers in a benign state. */
memset( ( void * ) pulFlopBuffer, 0x00, portFLOP_STORAGE_SIZE );
if( pulFlopBuffer != NULL )
{
/* Start with the registers in a benign state. */
memset( ( void * ) pulFlopBuffer, 0x00, portFLOP_STORAGE_SIZE );
/* The first thing to get saved in the buffer is the FPSCR value -
* initialise this to the current FPSCR value. */
*pulFlopBuffer = get_fpscr();
/* The first thing to get saved in the buffer is the FPSCR value -
initialise this to the current FPSCR value. */
*pulFlopBuffer = get_fpscr();
/* Use the task tag to point to the flop buffer. Pass pointer to just
* above the buffer because the flop save routine uses a pre-decrement. */
vTaskSetApplicationTaskTag( xTask, ( void * ) ( pulFlopBuffer + portFLOP_REGISTERS_TO_STORE ) );
xReturn = pdPASS;
}
else
{
xReturn = pdFAIL;
}
/* Use the task tag to point to the flop buffer. Pass pointer to just
above the buffer because the flop save routine uses a pre-decrement. */
vTaskSetApplicationTaskTag( xTask, ( void * ) ( pulFlopBuffer + portFLOP_REGISTERS_TO_STORE ) );
xReturn = pdPASS;
}
else
{
xReturn = pdFAIL;
}
return xReturn;
return xReturn;
}
/*-----------------------------------------------------------*/

109
portable/Renesas/SH2A_FPU/portmacro.h
View file

@ -27,13 +27,13 @@
#ifndef PORTMACRO_H
#define PORTMACRO_H
#define PORTMACRO_H
#include <machine.h>
#include <machine.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
extern "C" {
#endif
/*-----------------------------------------------------------
* Port specific definitions.
@ -46,93 +46,94 @@
*/
/* Type definitions - these are a bit legacy and not really used now, other than
* portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
portSTACK_TYPE and portBASE_TYPE. */
#define portCHAR char
#define portFLOAT float
#define portDOUBLE double
#define portLONG long
#define portSHORT short
#define portSTACK_TYPE uint32_t
#define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t;
typedef unsigned long UBaseType_t;
#if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
#if( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff
#else
typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1
#endif
/*-----------------------------------------------------------*/
/* Hardware specifics. */
#define portBYTE_ALIGNMENT 8
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#define portSTART_SCHEDULER_TRAP_NO ( 32 )
#define portYIELD_TRAP_NO ( 33 )
#define portKERNEL_INTERRUPT_PRIORITY ( 1 )
#define portBYTE_ALIGNMENT 8
#define portSTACK_GROWTH -1
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portNOP() nop()
#define portSTART_SCHEDULER_TRAP_NO ( 32 )
#define portYIELD_TRAP_NO ( 33 )
#define portKERNEL_INTERRUPT_PRIORITY ( 1 )
void vPortYield( void );
#define portYIELD() vPortYield()
void vPortYield( void );
#define portYIELD() vPortYield()
extern void vTaskSwitchContext( void );
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) vTaskSwitchContext()
extern void vTaskSwitchContext( void );
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) vTaskSwitchContext()
/*
* This function tells the kernel that the task referenced by xTask is going to
* use the floating point registers and therefore requires the floating point
* registers saved as part of its context.
*/
BaseType_t xPortUsesFloatingPoint( void * xTask );
BaseType_t xPortUsesFloatingPoint( void* xTask );
/*
* The flop save and restore functions are defined in portasm.src and called by
* the trace "task switched in" and "trace task switched out" macros.
*/
void vPortSaveFlopRegisters( void * pulBuffer );
void vPortRestoreFlopRegisters( void * pulBuffer );
void vPortSaveFlopRegisters( void *pulBuffer );
void vPortRestoreFlopRegisters( void *pulBuffer );
/*
* pxTaskTag is used to point to the buffer into which the floating point
* context should be saved. If pxTaskTag is NULL then the task does not use
* a floating point context.
*/
#define traceTASK_SWITCHED_OUT() if( pxCurrentTCB->pxTaskTag != NULL ) vPortSaveFlopRegisters( pxCurrentTCB->pxTaskTag )
#define traceTASK_SWITCHED_IN() if( pxCurrentTCB->pxTaskTag != NULL ) vPortRestoreFlopRegisters( pxCurrentTCB->pxTaskTag )
#define traceTASK_SWITCHED_OUT() if( pxCurrentTCB->pxTaskTag != NULL ) vPortSaveFlopRegisters( pxCurrentTCB->pxTaskTag )
#define traceTASK_SWITCHED_IN() if( pxCurrentTCB->pxTaskTag != NULL ) vPortRestoreFlopRegisters( pxCurrentTCB->pxTaskTag )
/*
* These macros should be called directly, but through the taskENTER_CRITICAL()
* and taskEXIT_CRITICAL() macros.
*/
#define portENABLE_INTERRUPTS() set_imask( 0x00 )
#define portDISABLE_INTERRUPTS() set_imask( portKERNEL_INTERRUPT_PRIORITY )
#define portENABLE_INTERRUPTS() set_imask( 0x00 )
#define portDISABLE_INTERRUPTS() set_imask( portKERNEL_INTERRUPT_PRIORITY )
/* Critical nesting counts are stored in the TCB. */
#define portCRITICAL_NESTING_IN_TCB ( 1 )
#define portCRITICAL_NESTING_IN_TCB ( 1 )
/* The critical nesting functions defined within tasks.c. */
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical();
#define portEXIT_CRITICAL() vTaskExitCritical();
extern void vTaskEnterCritical( void );
extern void vTaskExitCritical( void );
#define portENTER_CRITICAL() vTaskEnterCritical();
#define portEXIT_CRITICAL() vTaskExitCritical();
/*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus
}
#endif
#endif /* PORTMACRO_H */