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Style: Revert uncrustify for portable directories (#122)
* Style: revert uncrustify portable directories * Style: Uncrustify Some Portable files Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
This commit is contained in:
alfred gedeon
GitHub
parent
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commit
86653e2a1f
273 changed files with 64802 additions and 65931 deletions
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@ -26,8 +26,8 @@
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the SH2A port.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the SH2A port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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@ -42,17 +42,17 @@
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/*-----------------------------------------------------------*/
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/* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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* PSW is set with U and I set, and PM and IPL clear. */
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PSW is set with U and I set, and PM and IPL clear. */
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#define portINITIAL_PSW ( ( StackType_t ) 0x00030000 )
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#define portINITIAL_FPSW ( ( StackType_t ) 0x00000100 )
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/* These macros allow a critical section to be added around the call to
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* xTaskIncrementTick(), which is only ever called from interrupts at the kernel
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* priority - ie a known priority. Therefore these local macros are a slight
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* optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
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* which would require the old IPL to be read first and stored in a local variable. */
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#define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
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#define portENABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0"::"i" ( configKERNEL_INTERRUPT_PRIORITY ) )
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xTaskIncrementTick(), which is only ever called from interrupts at the kernel
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priority - ie a known priority. Therefore these local macros are a slight
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optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
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which would require the old IPL to be read first and stored in a local variable. */
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#define portDISABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
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#define portENABLE_INTERRUPTS_FROM_KERNEL_ISR() __asm volatile ( "MVTIPL %0" ::"i"(configKERNEL_INTERRUPT_PRIORITY) )
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/*-----------------------------------------------------------*/
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@ -60,308 +60,299 @@
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* Function to start the first task executing - written in asm code as direct
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* access to registers is required.
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*/
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static void prvStartFirstTask( void ) __attribute__( ( naked ) );
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static void prvStartFirstTask( void ) __attribute__((naked));
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/*
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* Software interrupt handler. Performs the actual context switch (saving and
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* restoring of registers). Written in asm code as direct register access is
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* required.
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*/
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void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
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void vSoftwareInterruptISR( void ) __attribute__((naked));
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/*
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* The tick interrupt handler.
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*/
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void vTickISR( void ) __attribute__( ( interrupt ) );
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void vTickISR( void ) __attribute__((interrupt));
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/*-----------------------------------------------------------*/
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extern void * pxCurrentTCB;
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extern void *pxCurrentTCB;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* R0 is not included as it is the stack pointer. */
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/* R0 is not included as it is the stack pointer. */
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*pxTopOfStack = 0x00;
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_PSW;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxCode;
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*pxTopOfStack = 0x00;
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_PSW;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxCode;
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/* When debugging it can be useful if every register is set to a known
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* value. Otherwise code space can be saved by just setting the registers
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* that need to be set. */
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#ifdef USE_FULL_REGISTER_INITIALISATION
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{
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pxTopOfStack--;
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*pxTopOfStack = 0xffffffff; /* r15. */
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pxTopOfStack--;
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*pxTopOfStack = 0xeeeeeeee;
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pxTopOfStack--;
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*pxTopOfStack = 0xdddddddd;
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pxTopOfStack--;
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*pxTopOfStack = 0xcccccccc;
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pxTopOfStack--;
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*pxTopOfStack = 0xbbbbbbbb;
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pxTopOfStack--;
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*pxTopOfStack = 0xaaaaaaaa;
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pxTopOfStack--;
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*pxTopOfStack = 0x99999999;
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pxTopOfStack--;
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*pxTopOfStack = 0x88888888;
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pxTopOfStack--;
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*pxTopOfStack = 0x77777777;
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pxTopOfStack--;
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*pxTopOfStack = 0x66666666;
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pxTopOfStack--;
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*pxTopOfStack = 0x55555555;
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pxTopOfStack--;
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*pxTopOfStack = 0x44444444;
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pxTopOfStack--;
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*pxTopOfStack = 0x33333333;
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pxTopOfStack--;
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*pxTopOfStack = 0x22222222;
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pxTopOfStack--;
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}
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#else /* ifdef USE_FULL_REGISTER_INITIALISATION */
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{
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pxTopOfStack -= 15;
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}
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#endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
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/* When debugging it can be useful if every register is set to a known
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value. Otherwise code space can be saved by just setting the registers
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that need to be set. */
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#ifdef USE_FULL_REGISTER_INITIALISATION
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{
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pxTopOfStack--;
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*pxTopOfStack = 0xffffffff; /* r15. */
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pxTopOfStack--;
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*pxTopOfStack = 0xeeeeeeee;
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pxTopOfStack--;
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*pxTopOfStack = 0xdddddddd;
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pxTopOfStack--;
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*pxTopOfStack = 0xcccccccc;
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pxTopOfStack--;
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*pxTopOfStack = 0xbbbbbbbb;
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pxTopOfStack--;
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*pxTopOfStack = 0xaaaaaaaa;
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pxTopOfStack--;
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*pxTopOfStack = 0x99999999;
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pxTopOfStack--;
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*pxTopOfStack = 0x88888888;
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pxTopOfStack--;
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*pxTopOfStack = 0x77777777;
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pxTopOfStack--;
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*pxTopOfStack = 0x66666666;
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pxTopOfStack--;
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*pxTopOfStack = 0x55555555;
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pxTopOfStack--;
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*pxTopOfStack = 0x44444444;
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pxTopOfStack--;
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*pxTopOfStack = 0x33333333;
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pxTopOfStack--;
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*pxTopOfStack = 0x22222222;
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pxTopOfStack--;
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}
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#else
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{
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pxTopOfStack -= 15;
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}
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#endif
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_FPSW;
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pxTopOfStack--;
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*pxTopOfStack = 0x12345678; /* Accumulator. */
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pxTopOfStack--;
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*pxTopOfStack = 0x87654321; /* Accumulator. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_FPSW;
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pxTopOfStack--;
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*pxTopOfStack = 0x12345678; /* Accumulator. */
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pxTopOfStack--;
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*pxTopOfStack = 0x87654321; /* Accumulator. */
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return pxTopOfStack;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void vApplicationSetupTimerInterrupt( void );
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extern void vApplicationSetupTimerInterrupt( void );
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/* Use pxCurrentTCB just so it does not get optimised away. */
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if( pxCurrentTCB != NULL )
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{
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/* Call an application function to set up the timer that will generate the
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* tick interrupt. This way the application can decide which peripheral to
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* use. A demo application is provided to show a suitable example. */
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vApplicationSetupTimerInterrupt();
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/* Use pxCurrentTCB just so it does not get optimised away. */
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if( pxCurrentTCB != NULL )
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{
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/* Call an application function to set up the timer that will generate the
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tick interrupt. This way the application can decide which peripheral to
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use. A demo application is provided to show a suitable example. */
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vApplicationSetupTimerInterrupt();
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/* Enable the software interrupt. */
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_IEN( _ICU_SWINT ) = 1;
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/* Enable the software interrupt. */
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_IEN( _ICU_SWINT ) = 1;
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/* Ensure the software interrupt is clear. */
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_IR( _ICU_SWINT ) = 0;
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/* Ensure the software interrupt is clear. */
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_IR( _ICU_SWINT ) = 0;
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/* Ensure the software interrupt is set to the kernel priority. */
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_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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/* Ensure the software interrupt is set to the kernel priority. */
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_IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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/* Start the first task. */
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prvStartFirstTask();
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}
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/* Start the first task. */
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prvStartFirstTask();
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}
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/* Should not get here. */
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return pdFAIL;
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/* Should not get here. */
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return pdFAIL;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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* Artificially force an assert. */
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configASSERT( pxCurrentTCB == NULL );
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( pxCurrentTCB == NULL );
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}
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/*-----------------------------------------------------------*/
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static void prvStartFirstTask( void )
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{
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__asm volatile
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(
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__asm volatile
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(
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/* When starting the scheduler there is nothing that needs moving to the
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interrupt stack because the function is not called from an interrupt.
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Just ensure the current stack is the user stack. */
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"SETPSW U \n" \
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/* When starting the scheduler there is nothing that needs moving to the
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* interrupt stack because the function is not called from an interrupt.
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* Just ensure the current stack is the user stack. */
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"SETPSW U \n"\
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/* Obtain the location of the stack associated with which ever task
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pxCurrentTCB is currently pointing to. */
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"MOV.L #_pxCurrentTCB, R15 \n" \
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"MOV.L [R15], R15 \n" \
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"MOV.L [R15], R0 \n" \
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/* Restore the registers from the stack of the task pointed to by
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pxCurrentTCB. */
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"POP R15 \n" \
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/* Obtain the location of the stack associated with which ever task
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* pxCurrentTCB is currently pointing to. */
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"MOV.L #_pxCurrentTCB, R15 \n"\
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"MOV.L [R15], R15 \n"\
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"MOV.L [R15], R0 \n"\
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/* Accumulator low 32 bits. */
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"MVTACLO R15 \n" \
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"POP R15 \n" \
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/* Accumulator high 32 bits. */
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"MVTACHI R15 \n" \
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"POP R15 \n" \
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/* Restore the registers from the stack of the task pointed to by
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* pxCurrentTCB. */
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"POP R15 \n"\
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/* Floating point status word. */
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"MVTC R15, FPSW \n" \
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/* Accumulator low 32 bits. */
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"MVTACLO R15 \n"\
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"POP R15 \n"\
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/* R1 to R15 - R0 is not included as it is the SP. */
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"POPM R1-R15 \n" \
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/* Accumulator high 32 bits. */
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"MVTACHI R15 \n"\
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"POP R15 \n"\
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/* Floating point status word. */
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"MVTC R15, FPSW \n"\
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/* R1 to R15 - R0 is not included as it is the SP. */
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"POPM R1-R15 \n"\
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/* This pops the remaining registers. */
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"RTE \n"\
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"NOP \n"\
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"NOP \n"
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);
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/* This pops the remaining registers. */
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"RTE \n" \
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"NOP \n" \
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"NOP \n"
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);
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}
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/*-----------------------------------------------------------*/
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void vSoftwareInterruptISR( void )
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{
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__asm volatile
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(
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/* Re-enable interrupts. */
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"SETPSW I \n"\
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__asm volatile
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(
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/* Re-enable interrupts. */
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"SETPSW I \n" \
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/* Move the data that was automatically pushed onto the interrupt stack when
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the interrupt occurred from the interrupt stack to the user stack.
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/* Move the data that was automatically pushed onto the interrupt stack when
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* the interrupt occurred from the interrupt stack to the user stack.
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*
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* R15 is saved before it is clobbered. */
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"PUSH.L R15 \n"\
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R15 is saved before it is clobbered. */
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"PUSH.L R15 \n" \
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/* Read the user stack pointer. */
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"MVFC USP, R15 \n"\
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/* Read the user stack pointer. */
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"MVFC USP, R15 \n" \
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/* Move the address down to the data being moved. */
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"SUB #12, R15 \n"\
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"MVTC R15, USP \n"\
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/* Move the address down to the data being moved. */
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"SUB #12, R15 \n" \
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"MVTC R15, USP \n" \
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/* Copy the data across, R15, then PC, then PSW. */
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"MOV.L [ R0 ], [ R15 ] \n"\
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"MOV.L 4[ R0 ], 4[ R15 ] \n"\
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"MOV.L 8[ R0 ], 8[ R15 ] \n"\
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/* Copy the data across, R15, then PC, then PSW. */
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"MOV.L [ R0 ], [ R15 ] \n" \
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"MOV.L 4[ R0 ], 4[ R15 ] \n" \
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"MOV.L 8[ R0 ], 8[ R15 ] \n" \
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/* Move the interrupt stack pointer to its new correct position. */
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"ADD #12, R0 \n"\
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/* Move the interrupt stack pointer to its new correct position. */
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"ADD #12, R0 \n" \
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/* All the rest of the registers are saved directly to the user stack. */
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"SETPSW U \n"\
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/* All the rest of the registers are saved directly to the user stack. */
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"SETPSW U \n" \
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/* Save the rest of the general registers (R15 has been saved already). */
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"PUSHM R1-R14 \n"\
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/* Save the rest of the general registers (R15 has been saved already). */
|
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"PUSHM R1-R14 \n" \
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/* Save the FPSW and accumulator. */
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"MVFC FPSW, R15 \n"\
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"PUSH.L R15 \n"\
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"MVFACHI R15 \n"\
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"PUSH.L R15 \n"\
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/* Save the FPSW and accumulator. */
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"MVFC FPSW, R15 \n" \
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"PUSH.L R15 \n" \
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"MVFACHI R15 \n" \
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"PUSH.L R15 \n" \
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|
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/* Middle word. */
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"MVFACMI R15 \n"\
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/* Middle word. */
|
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"MVFACMI R15 \n" \
|
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|
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/* Shifted left as it is restored to the low order word. */
|
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"SHLL #16, R15 \n"\
|
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"PUSH.L R15 \n"\
|
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/* Shifted left as it is restored to the low order word. */
|
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"SHLL #16, R15 \n" \
|
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"PUSH.L R15 \n" \
|
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|
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/* Save the stack pointer to the TCB. */
|
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"MOV.L #_pxCurrentTCB, R15 \n"\
|
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"MOV.L [ R15 ], R15 \n"\
|
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"MOV.L R0, [ R15 ] \n"\
|
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/* Save the stack pointer to the TCB. */
|
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"MOV.L #_pxCurrentTCB, R15 \n" \
|
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"MOV.L [ R15 ], R15 \n" \
|
||||
"MOV.L R0, [ R15 ] \n" \
|
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|
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/* Ensure the interrupt mask is set to the syscall priority while the kernel
|
||||
structures are being accessed. */
|
||||
"MVTIPL %0 \n" \
|
||||
|
||||
/* Ensure the interrupt mask is set to the syscall priority while the kernel
|
||||
* structures are being accessed. */
|
||||
"MVTIPL %0 \n"\
|
||||
/* Select the next task to run. */
|
||||
"BSR.A _vTaskSwitchContext \n" \
|
||||
|
||||
/* Select the next task to run. */
|
||||
"BSR.A _vTaskSwitchContext \n"\
|
||||
/* Reset the interrupt mask as no more data structure access is required. */
|
||||
"MVTIPL %1 \n" \
|
||||
|
||||
/* Reset the interrupt mask as no more data structure access is required. */
|
||||
"MVTIPL %1 \n"\
|
||||
/* Load the stack pointer of the task that is now selected as the Running
|
||||
state task from its TCB. */
|
||||
"MOV.L #_pxCurrentTCB,R15 \n" \
|
||||
"MOV.L [ R15 ], R15 \n" \
|
||||
"MOV.L [ R15 ], R0 \n" \
|
||||
|
||||
|
||||
/* Load the stack pointer of the task that is now selected as the Running
|
||||
* state task from its TCB. */
|
||||
"MOV.L #_pxCurrentTCB,R15 \n"\
|
||||
"MOV.L [ R15 ], R15 \n"\
|
||||
"MOV.L [ R15 ], R0 \n"\
|
||||
|
||||
|
||||
/* Restore the context of the new task. The PSW (Program Status Word) and
|
||||
* PC will be popped by the RTE instruction. */
|
||||
"POP R15 \n"\
|
||||
"MVTACLO R15 \n"\
|
||||
"POP R15 \n"\
|
||||
"MVTACHI R15 \n"\
|
||||
"POP R15 \n"\
|
||||
"MVTC R15, FPSW \n"\
|
||||
"POPM R1-R15 \n"\
|
||||
"RTE \n"\
|
||||
"NOP \n"\
|
||||
"NOP "
|
||||
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
|
||||
);
|
||||
/* Restore the context of the new task. The PSW (Program Status Word) and
|
||||
PC will be popped by the RTE instruction. */
|
||||
"POP R15 \n" \
|
||||
"MVTACLO R15 \n" \
|
||||
"POP R15 \n" \
|
||||
"MVTACHI R15 \n" \
|
||||
"POP R15 \n" \
|
||||
"MVTC R15, FPSW \n" \
|
||||
"POPM R1-R15 \n" \
|
||||
"RTE \n" \
|
||||
"NOP \n" \
|
||||
"NOP "
|
||||
:: "i"(configMAX_SYSCALL_INTERRUPT_PRIORITY), "i"(configKERNEL_INTERRUPT_PRIORITY)
|
||||
);
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vTickISR( void )
|
||||
{
|
||||
/* Re-enabled interrupts. */
|
||||
__asm volatile ( "SETPSW I");
|
||||
/* Re-enabled interrupts. */
|
||||
__asm volatile( "SETPSW I" );
|
||||
|
||||
/* Increment the tick, and perform any processing the new tick value
|
||||
* necessitates. Ensure IPL is at the max syscall value first. */
|
||||
portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
taskYIELD();
|
||||
}
|
||||
}
|
||||
portENABLE_INTERRUPTS_FROM_KERNEL_ISR();
|
||||
/* Increment the tick, and perform any processing the new tick value
|
||||
necessitates. Ensure IPL is at the max syscall value first. */
|
||||
portDISABLE_INTERRUPTS_FROM_KERNEL_ISR();
|
||||
{
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
taskYIELD();
|
||||
}
|
||||
}
|
||||
portENABLE_INTERRUPTS_FROM_KERNEL_ISR();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
uint32_t ulPortGetIPL( void )
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
"MVFC PSW, R1 \n"\
|
||||
"SHLR #24, R1 \n"\
|
||||
"RTS "
|
||||
);
|
||||
__asm volatile
|
||||
(
|
||||
"MVFC PSW, R1 \n" \
|
||||
"SHLR #24, R1 \n" \
|
||||
"RTS "
|
||||
);
|
||||
|
||||
/* This will never get executed, but keeps the compiler from complaining. */
|
||||
return 0;
|
||||
/* This will never get executed, but keeps the compiler from complaining. */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortSetIPL( uint32_t ulNewIPL )
|
||||
{
|
||||
__asm volatile
|
||||
(
|
||||
"PUSH R5 \n"\
|
||||
"MVFC PSW, R5 \n"\
|
||||
"SHLL #24, R1 \n"\
|
||||
"AND #-0F000001H, R5 \n"\
|
||||
"OR R1, R5 \n"\
|
||||
"MVTC R5, PSW \n"\
|
||||
"POP R5 \n"\
|
||||
"RTS "
|
||||
);
|
||||
__asm volatile
|
||||
(
|
||||
"PUSH R5 \n" \
|
||||
"MVFC PSW, R5 \n" \
|
||||
"SHLL #24, R1 \n" \
|
||||
"AND #-0F000001H, R5 \n" \
|
||||
"OR R1, R5 \n" \
|
||||
"MVTC R5, PSW \n" \
|
||||
"POP R5 \n" \
|
||||
"RTS "
|
||||
);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,11 +27,11 @@
|
|||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
|
@ -44,94 +44,95 @@
|
|||
*/
|
||||
|
||||
/* Type definitions - these are a bit legacy and not really used now, other than
|
||||
* portSTACK_TYPE and portBASE_TYPE. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
portSTACK_TYPE and portBASE_TYPE. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
||||
not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portNOP() __asm volatile ( "NOP" )
|
||||
#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
|
||||
#define portSTACK_GROWTH -1
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portNOP() __asm volatile( "NOP" )
|
||||
|
||||
/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) *portITU_SWINTR;"
|
||||
* where portITU_SWINTR is the location of the software interrupt register
|
||||
* (0x000872E0). Don't rely on the assembler to select a register, so instead
|
||||
* save and restore clobbered registers manually. */
|
||||
#define portYIELD() \
|
||||
__asm volatile \
|
||||
( \
|
||||
"PUSH.L R10 \n"\
|
||||
"MOV.L #0x872E0, R10 \n"\
|
||||
"MOV.B #0x1, [R10] \n"\
|
||||
"MOV.L [R10], R10 \n"\
|
||||
"POP R10 \n"\
|
||||
)
|
||||
where portITU_SWINTR is the location of the software interrupt register
|
||||
(0x000872E0). Don't rely on the assembler to select a register, so instead
|
||||
save and restore clobbered registers manually. */
|
||||
#define portYIELD() \
|
||||
__asm volatile \
|
||||
( \
|
||||
"PUSH.L R10 \n" \
|
||||
"MOV.L #0x872E0, R10 \n" \
|
||||
"MOV.B #0x1, [R10] \n" \
|
||||
"MOV.L [R10], R10 \n" \
|
||||
"POP R10 \n" \
|
||||
)
|
||||
|
||||
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
|
||||
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) portYIELD()
|
||||
|
||||
/* These macros should not be called directly, but through the
|
||||
* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
* performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
* inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
* functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
* interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
* simple as possible. */
|
||||
#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0")
|
||||
#ifdef configASSERT
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( ulPortGetIPL() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
#define portDISABLE_INTERRUPTS() if( ulPortGetIPL() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __asm volatile ( "MVTIPL %0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
#else
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile ( "MVTIPL %0"::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
#endif
|
||||
taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
|
||||
performed if configASSERT() is defined to ensure an assertion handler does not
|
||||
inadvertently attempt to lower the IPL when the call to assert was triggered
|
||||
because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
|
||||
when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
|
||||
functions are those that end in FromISR. FreeRTOS maintains a separate
|
||||
interrupt API to ensure API function and interrupt entry is as fast and as
|
||||
simple as possible. */
|
||||
#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0" )
|
||||
#ifdef configASSERT
|
||||
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( ulPortGetIPL() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
|
||||
#define portDISABLE_INTERRUPTS() if( ulPortGetIPL() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
|
||||
#else
|
||||
#define portDISABLE_INTERRUPTS() __asm volatile ( "MVTIPL %0" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) )
|
||||
#endif
|
||||
|
||||
/* Critical nesting counts are stored in the TCB. */
|
||||
#define portCRITICAL_NESTING_IN_TCB ( 1 )
|
||||
#define portCRITICAL_NESTING_IN_TCB ( 1 )
|
||||
|
||||
/* The critical nesting functions defined within tasks.c. */
|
||||
extern void vTaskEnterCritical( void );
|
||||
extern void vTaskExitCritical( void );
|
||||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
extern void vTaskEnterCritical( void );
|
||||
extern void vTaskExitCritical( void );
|
||||
#define portENTER_CRITICAL() vTaskEnterCritical()
|
||||
#define portEXIT_CRITICAL() vTaskExitCritical()
|
||||
|
||||
/* As this port allows interrupt nesting... */
|
||||
uint32_t ulPortGetIPL( void ) __attribute__( ( naked ) );
|
||||
void vPortSetIPL( uint32_t ulNewIPL ) __attribute__( ( naked ) );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )
|
||||
uint32_t ulPortGetIPL( void ) __attribute__((naked));
|
||||
void vPortSetIPL( uint32_t ulNewIPL ) __attribute__((naked));
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue