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Style: Revert uncrustify for portable directories (#122)
* Style: revert uncrustify portable directories * Style: Uncrustify Some Portable files Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
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alfred gedeon
GitHub
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273 changed files with 64802 additions and 65931 deletions
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@ -26,8 +26,8 @@
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the MicroBlaze port.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the MicroBlaze port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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@ -43,20 +43,20 @@
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#include <microblaze_exceptions_g.h>
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/* Tasks are started with a critical section nesting of 0 - however, prior to
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* the scheduler being commenced interrupts should not be enabled, so the critical
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* nesting variable is initialised to a non-zero value. */
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#define portINITIAL_NESTING_VALUE ( 0xff )
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the scheduler being commenced interrupts should not be enabled, so the critical
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nesting variable is initialised to a non-zero value. */
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#define portINITIAL_NESTING_VALUE ( 0xff )
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/* The bit within the MSR register that enabled/disables interrupts and
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* exceptions respectively. */
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#define portMSR_IE ( 0x02U )
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#define portMSR_EE ( 0x100U )
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/* The bit within the MSR register that enabled/disables interrupts and
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exceptions respectively. */
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#define portMSR_IE ( 0x02U )
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#define portMSR_EE ( 0x100U )
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/* If the floating point unit is included in the MicroBlaze build, then the
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* FSR register is saved as part of the task context. portINITIAL_FSR is the value
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* given to the FSR register when the initial context is set up for a task being
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* created. */
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#define portINITIAL_FSR ( 0U )
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FSR register is saved as part of the task context. portINITIAL_FSR is the value
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given to the FSR register when the initial context is set up for a task being
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created. */
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#define portINITIAL_FSR ( 0U )
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/*-----------------------------------------------------------*/
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/*
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@ -72,27 +72,27 @@ static int32_t prvEnsureInterruptControllerIsInitialised( void );
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/*-----------------------------------------------------------*/
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/* Counts the nesting depth of calls to portENTER_CRITICAL(). Each task
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* maintains its own count, so this variable is saved as part of the task
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* context. */
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maintains its own count, so this variable is saved as part of the task
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context. */
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volatile UBaseType_t uxCriticalNesting = portINITIAL_NESTING_VALUE;
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/* This port uses a separate stack for interrupts. This prevents the stack of
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* every task needing to be large enough to hold an entire interrupt stack on top
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* of the task stack. */
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uint32_t * pulISRStack;
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every task needing to be large enough to hold an entire interrupt stack on top
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of the task stack. */
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uint32_t *pulISRStack;
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/* If an interrupt requests a context switch, then ulTaskSwitchRequested will
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* get set to 1. ulTaskSwitchRequested is inspected just before the main interrupt
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* handler exits. If, at that time, ulTaskSwitchRequested is set to 1, the kernel
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* will call vTaskSwitchContext() to ensure the task that runs immediately after
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* the interrupt exists is the highest priority task that is able to run. This is
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* an unusual mechanism, but is used for this port because a single interrupt can
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* cause the servicing of multiple peripherals - and it is inefficient to call
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* vTaskSwitchContext() multiple times as each peripheral is serviced. */
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get set to 1. ulTaskSwitchRequested is inspected just before the main interrupt
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handler exits. If, at that time, ulTaskSwitchRequested is set to 1, the kernel
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will call vTaskSwitchContext() to ensure the task that runs immediately after
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the interrupt exists is the highest priority task that is able to run. This is
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an unusual mechanism, but is used for this port because a single interrupt can
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cause the servicing of multiple peripherals - and it is inefficient to call
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vTaskSwitchContext() multiple times as each peripheral is serviced. */
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volatile uint32_t ulTaskSwitchRequested = 0UL;
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/* The instance of the interrupt controller used by this port. This is required
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* by the Xilinx library API functions. */
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by the Xilinx library API functions. */
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static XIntc xInterruptControllerInstance;
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/*-----------------------------------------------------------*/
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@ -103,174 +103,172 @@ static XIntc xInterruptControllerInstance;
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*
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* See the portable.h header file.
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*/
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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extern void * _SDA2_BASE_, * _SDA_BASE_;
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const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_;
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const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_;
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extern void *_SDA2_BASE_, *_SDA_BASE_;
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const uint32_t ulR2 = ( uint32_t ) &_SDA2_BASE_;
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const uint32_t ulR13 = ( uint32_t ) &_SDA_BASE_;
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/* Place a few bytes of known values on the bottom of the stack.
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* This is essential for the Microblaze port and these lines must
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* not be omitted. */
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*pxTopOfStack = ( StackType_t ) 0x00000000;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00000000;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00000000;
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pxTopOfStack--;
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/* Place a few bytes of known values on the bottom of the stack.
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This is essential for the Microblaze port and these lines must
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not be omitted. */
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*pxTopOfStack = ( StackType_t ) 0x00000000;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00000000;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x00000000;
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pxTopOfStack--;
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#if ( XPAR_MICROBLAZE_USE_FPU != 0 )
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/* The FSR value placed in the initial task context is just 0. */
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*pxTopOfStack = portINITIAL_FSR;
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pxTopOfStack--;
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#endif
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#if( XPAR_MICROBLAZE_USE_FPU != 0 )
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/* The FSR value placed in the initial task context is just 0. */
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*pxTopOfStack = portINITIAL_FSR;
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pxTopOfStack--;
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#endif
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/* The MSR value placed in the initial task context should have interrupts
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* disabled. Each task will enable interrupts automatically when it enters
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* the running state for the first time. */
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*pxTopOfStack = mfmsr() & ~portMSR_IE;
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/* The MSR value placed in the initial task context should have interrupts
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disabled. Each task will enable interrupts automatically when it enters
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the running state for the first time. */
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*pxTopOfStack = mfmsr() & ~portMSR_IE;
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#if( MICROBLAZE_EXCEPTIONS_ENABLED == 1 )
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{
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/* Ensure exceptions are enabled for the task. */
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*pxTopOfStack |= portMSR_EE;
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}
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#endif
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#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 )
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{
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/* Ensure exceptions are enabled for the task. */
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*pxTopOfStack |= portMSR_EE;
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}
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#endif
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pxTopOfStack--;
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pxTopOfStack--;
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/* First stack an initial value for the critical section nesting. This
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is initialised to zero. */
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*pxTopOfStack = ( StackType_t ) 0x00;
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/* First stack an initial value for the critical section nesting. This
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* is initialised to zero. */
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*pxTopOfStack = ( StackType_t ) 0x00;
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/* R0 is always zero. */
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/* R1 is the SP. */
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/* R0 is always zero. */
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/* R1 is the SP. */
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/* Place an initial value for all the general purpose registers. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pvParameters;/* R5 contains the function call parameters. */
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/* Place an initial value for all the general purpose registers. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) ulR2; /* R2 - read only small data area. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03; /* R3 - return values and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04; /* R4 - return values and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R5 contains the function call parameters. */
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07; /* R7 - other parameters and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08; /* R8 - other parameters and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09; /* R9 - other parameters and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x0a; /* R10 - other parameters and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x0b; /* R11 - temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x0c; /* R12 - temporaries. */
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pxTopOfStack--;
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#else
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pxTopOfStack-= 8;
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#endif
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06; /* R6 - other parameters and temporaries. Used as the return address from vPortTaskEntryPoint. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07; /* R7 - other parameters and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08; /* R8 - other parameters and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09; /* R9 - other parameters and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x0a; /* R10 - other parameters and temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x0b; /* R11 - temporaries. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x0c; /* R12 - temporaries. */
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pxTopOfStack--;
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#else /* ifdef portPRE_LOAD_STACK_FOR_DEBUGGING */
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pxTopOfStack -= 8;
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#endif /* ifdef portPRE_LOAD_STACK_FOR_DEBUGGING */
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*pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) NULL; /* R15 - return address for subroutine. */
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*pxTopOfStack = ( StackType_t ) ulR13; /* R13 - read/write small data area. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxCode; /* R14 - return address for interrupt. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) NULL; /* R15 - return address for subroutine. */
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10; /* R16 - return address for trap (debugger). */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11; /* R17 - return address for exceptions, if configured. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */
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pxTopOfStack--;
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#else
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pxTopOfStack -= 4;
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#endif
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10; /* R16 - return address for trap (debugger). */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11; /* R17 - return address for exceptions, if configured. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12; /* R18 - reserved for assembler and compiler temporaries. */
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pxTopOfStack--;
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#else
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pxTopOfStack -= 4;
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#endif
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*pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */
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*pxTopOfStack = ( StackType_t ) 0x00; /* R19 - must be saved across function calls. Callee-save. Seems to be interpreted as the frame pointer. */
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x15; /* R21 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x16; /* R22 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x17; /* R23 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x18; /* R24 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x19; /* R25 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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#else
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pxTopOfStack -= 13;
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#endif
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#ifdef portPRE_LOAD_STACK_FOR_DEBUGGING
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x14; /* R20 - reserved for storing a pointer to the Global Offset Table (GOT) in Position Independent Code (PIC). Non-volatile in non-PIC code. Must be saved across function calls. Callee-save. Not used by FreeRTOS. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x15; /* R21 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x16; /* R22 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x17; /* R23 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x18; /* R24 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x19; /* R25 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1a; /* R26 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1b; /* R27 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1c; /* R28 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1d; /* R29 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1e; /* R30 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x1f; /* R31 - must be saved across function calls. Callee-save. */
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pxTopOfStack--;
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#else /* ifdef portPRE_LOAD_STACK_FOR_DEBUGGING */
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pxTopOfStack -= 13;
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#endif /* ifdef portPRE_LOAD_STACK_FOR_DEBUGGING */
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/* Return a pointer to the top of the stack that has been generated so this
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* can be stored in the task control block for the task. */
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return pxTopOfStack;
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/* Return a pointer to the top of the stack that has been generated so this
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can be stored in the task control block for the task. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void( vPortStartFirstTask )( void );
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extern uint32_t _stack[];
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extern void ( vPortStartFirstTask )( void );
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extern uint32_t _stack[];
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/* Setup the hardware to generate the tick. Interrupts are disabled when
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* this function is called.
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*
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* This port uses an application defined callback function to install the tick
|
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* interrupt handler because the kernel will run on lots of different
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* MicroBlaze and FPGA configurations - not all of which will have the same
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* timer peripherals defined or available. An example definition of
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* vApplicationSetupTimerInterrupt() is provided in the official demo
|
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* application that accompanies this port. */
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vApplicationSetupTimerInterrupt();
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/* Setup the hardware to generate the tick. Interrupts are disabled when
|
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this function is called.
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/* Reuse the stack from main() as the stack for the interrupts/exceptions. */
|
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pulISRStack = ( uint32_t * ) _stack;
|
||||
This port uses an application defined callback function to install the tick
|
||||
interrupt handler because the kernel will run on lots of different
|
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MicroBlaze and FPGA configurations - not all of which will have the same
|
||||
timer peripherals defined or available. An example definition of
|
||||
vApplicationSetupTimerInterrupt() is provided in the official demo
|
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application that accompanies this port. */
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vApplicationSetupTimerInterrupt();
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/* Ensure there is enough space for the functions called from the interrupt
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* service routines to write back into the stack frame of the caller. */
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pulISRStack -= 2;
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/* Reuse the stack from main() as the stack for the interrupts/exceptions. */
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pulISRStack = ( uint32_t * ) _stack;
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|
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/* Restore the context of the first task that is going to run. From here
|
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* on, the created tasks will be executing. */
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vPortStartFirstTask();
|
||||
/* Ensure there is enough space for the functions called from the interrupt
|
||||
service routines to write back into the stack frame of the caller. */
|
||||
pulISRStack -= 2;
|
||||
|
||||
/* Should not get here as the tasks are now running! */
|
||||
return pdFALSE;
|
||||
/* Restore the context of the first task that is going to run. From here
|
||||
on, the created tasks will be executing. */
|
||||
vPortStartFirstTask();
|
||||
|
||||
/* Should not get here as the tasks are now running! */
|
||||
return pdFALSE;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
* Artificially force an assert. */
|
||||
configASSERT( uxCriticalNesting == 1000UL );
|
||||
/* Not implemented in ports where there is nothing to return to.
|
||||
Artificially force an assert. */
|
||||
configASSERT( uxCriticalNesting == 1000UL );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -279,107 +277,104 @@ void vPortEndScheduler( void )
|
|||
*/
|
||||
void vPortYield( void )
|
||||
{
|
||||
extern void VPortYieldASM( void );
|
||||
extern void VPortYieldASM( void );
|
||||
|
||||
/* Perform the context switch in a critical section to assure it is
|
||||
* not interrupted by the tick ISR. It is not a problem to do this as
|
||||
* each task maintains its own interrupt status. */
|
||||
portENTER_CRITICAL();
|
||||
{
|
||||
/* Jump directly to the yield function to ensure there is no
|
||||
* compiler generated prologue code. */
|
||||
asm volatile ( "bralid r14, VPortYieldASM \n\t"\
|
||||
"or r0, r0, r0 \n\t");
|
||||
}
|
||||
portEXIT_CRITICAL();
|
||||
/* Perform the context switch in a critical section to assure it is
|
||||
not interrupted by the tick ISR. It is not a problem to do this as
|
||||
each task maintains its own interrupt status. */
|
||||
portENTER_CRITICAL();
|
||||
{
|
||||
/* Jump directly to the yield function to ensure there is no
|
||||
compiler generated prologue code. */
|
||||
asm volatile ( "bralid r14, VPortYieldASM \n\t" \
|
||||
"or r0, r0, r0 \n\t" );
|
||||
}
|
||||
portEXIT_CRITICAL();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnableInterrupt( uint8_t ucInterruptID )
|
||||
{
|
||||
int32_t lReturn;
|
||||
int32_t lReturn;
|
||||
|
||||
/* An API function is provided to enable an interrupt in the interrupt
|
||||
* controller because the interrupt controller instance variable is private
|
||||
* to this file. */
|
||||
lReturn = prvEnsureInterruptControllerIsInitialised();
|
||||
/* An API function is provided to enable an interrupt in the interrupt
|
||||
controller because the interrupt controller instance variable is private
|
||||
to this file. */
|
||||
lReturn = prvEnsureInterruptControllerIsInitialised();
|
||||
if( lReturn == pdPASS )
|
||||
{
|
||||
XIntc_Enable( &xInterruptControllerInstance, ucInterruptID );
|
||||
}
|
||||
|
||||
if( lReturn == pdPASS )
|
||||
{
|
||||
XIntc_Enable( &xInterruptControllerInstance, ucInterruptID );
|
||||
}
|
||||
|
||||
configASSERT( lReturn );
|
||||
configASSERT( lReturn );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortDisableInterrupt( uint8_t ucInterruptID )
|
||||
{
|
||||
int32_t lReturn;
|
||||
int32_t lReturn;
|
||||
|
||||
/* An API function is provided to disable an interrupt in the interrupt
|
||||
* controller because the interrupt controller instance variable is private
|
||||
* to this file. */
|
||||
lReturn = prvEnsureInterruptControllerIsInitialised();
|
||||
/* An API function is provided to disable an interrupt in the interrupt
|
||||
controller because the interrupt controller instance variable is private
|
||||
to this file. */
|
||||
lReturn = prvEnsureInterruptControllerIsInitialised();
|
||||
|
||||
if( lReturn == pdPASS )
|
||||
{
|
||||
XIntc_Disable( &xInterruptControllerInstance, ucInterruptID );
|
||||
}
|
||||
if( lReturn == pdPASS )
|
||||
{
|
||||
XIntc_Disable( &xInterruptControllerInstance, ucInterruptID );
|
||||
}
|
||||
|
||||
configASSERT( lReturn );
|
||||
configASSERT( lReturn );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID,
|
||||
XInterruptHandler pxHandler,
|
||||
void * pvCallBackRef )
|
||||
BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef )
|
||||
{
|
||||
int32_t lReturn;
|
||||
int32_t lReturn;
|
||||
|
||||
/* An API function is provided to install an interrupt handler because the
|
||||
* interrupt controller instance variable is private to this file. */
|
||||
/* An API function is provided to install an interrupt handler because the
|
||||
interrupt controller instance variable is private to this file. */
|
||||
|
||||
lReturn = prvEnsureInterruptControllerIsInitialised();
|
||||
lReturn = prvEnsureInterruptControllerIsInitialised();
|
||||
|
||||
if( lReturn == pdPASS )
|
||||
{
|
||||
lReturn = XIntc_Connect( &xInterruptControllerInstance, ucInterruptID, pxHandler, pvCallBackRef );
|
||||
}
|
||||
if( lReturn == pdPASS )
|
||||
{
|
||||
lReturn = XIntc_Connect( &xInterruptControllerInstance, ucInterruptID, pxHandler, pvCallBackRef );
|
||||
}
|
||||
|
||||
if( lReturn == XST_SUCCESS )
|
||||
{
|
||||
lReturn = pdPASS;
|
||||
}
|
||||
if( lReturn == XST_SUCCESS )
|
||||
{
|
||||
lReturn = pdPASS;
|
||||
}
|
||||
|
||||
configASSERT( lReturn == pdPASS );
|
||||
configASSERT( lReturn == pdPASS );
|
||||
|
||||
return lReturn;
|
||||
return lReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static int32_t prvEnsureInterruptControllerIsInitialised( void )
|
||||
{
|
||||
static int32_t lInterruptControllerInitialised = pdFALSE;
|
||||
int32_t lReturn;
|
||||
static int32_t lInterruptControllerInitialised = pdFALSE;
|
||||
int32_t lReturn;
|
||||
|
||||
/* Ensure the interrupt controller instance variable is initialised before
|
||||
* it is used, and that the initialisation only happens once. */
|
||||
if( lInterruptControllerInitialised != pdTRUE )
|
||||
{
|
||||
lReturn = prvInitialiseInterruptController();
|
||||
/* Ensure the interrupt controller instance variable is initialised before
|
||||
it is used, and that the initialisation only happens once. */
|
||||
if( lInterruptControllerInitialised != pdTRUE )
|
||||
{
|
||||
lReturn = prvInitialiseInterruptController();
|
||||
|
||||
if( lReturn == pdPASS )
|
||||
{
|
||||
lInterruptControllerInitialised = pdTRUE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
lReturn = pdPASS;
|
||||
}
|
||||
if( lReturn == pdPASS )
|
||||
{
|
||||
lInterruptControllerInitialised = pdTRUE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
lReturn = pdPASS;
|
||||
}
|
||||
|
||||
return lReturn;
|
||||
return lReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
@ -387,69 +382,71 @@ static int32_t prvEnsureInterruptControllerIsInitialised( void )
|
|||
* Handler for the timer interrupt. This is the handler that the application
|
||||
* defined callback function vApplicationSetupTimerInterrupt() should install.
|
||||
*/
|
||||
void vPortTickISR( void * pvUnused )
|
||||
void vPortTickISR( void *pvUnused )
|
||||
{
|
||||
extern void vApplicationClearTimerInterrupt( void );
|
||||
extern void vApplicationClearTimerInterrupt( void );
|
||||
|
||||
/* Ensure the unused parameter does not generate a compiler warning. */
|
||||
( void ) pvUnused;
|
||||
/* Ensure the unused parameter does not generate a compiler warning. */
|
||||
( void ) pvUnused;
|
||||
|
||||
/* This port uses an application defined callback function to clear the tick
|
||||
* interrupt because the kernel will run on lots of different MicroBlaze and
|
||||
* FPGA configurations - not all of which will have the same timer peripherals
|
||||
* defined or available. An example definition of
|
||||
* vApplicationClearTimerInterrupt() is provided in the official demo
|
||||
* application that accompanies this port. */
|
||||
vApplicationClearTimerInterrupt();
|
||||
/* This port uses an application defined callback function to clear the tick
|
||||
interrupt because the kernel will run on lots of different MicroBlaze and
|
||||
FPGA configurations - not all of which will have the same timer peripherals
|
||||
defined or available. An example definition of
|
||||
vApplicationClearTimerInterrupt() is provided in the official demo
|
||||
application that accompanies this port. */
|
||||
vApplicationClearTimerInterrupt();
|
||||
|
||||
/* Increment the RTOS tick - this might cause a task to unblock. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Force vTaskSwitchContext() to be called as the interrupt exits. */
|
||||
ulTaskSwitchRequested = 1;
|
||||
}
|
||||
/* Increment the RTOS tick - this might cause a task to unblock. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
/* Force vTaskSwitchContext() to be called as the interrupt exits. */
|
||||
ulTaskSwitchRequested = 1;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static int32_t prvInitialiseInterruptController( void )
|
||||
{
|
||||
int32_t lStatus;
|
||||
int32_t lStatus;
|
||||
|
||||
lStatus = XIntc_Initialize( &xInterruptControllerInstance, configINTERRUPT_CONTROLLER_TO_USE );
|
||||
lStatus = XIntc_Initialize( &xInterruptControllerInstance, configINTERRUPT_CONTROLLER_TO_USE );
|
||||
|
||||
if( lStatus == XST_SUCCESS )
|
||||
{
|
||||
/* Initialise the exception table. */
|
||||
Xil_ExceptionInit();
|
||||
if( lStatus == XST_SUCCESS )
|
||||
{
|
||||
/* Initialise the exception table. */
|
||||
Xil_ExceptionInit();
|
||||
|
||||
/* Service all pending interrupts each time the handler is entered. */
|
||||
XIntc_SetIntrSvcOption( xInterruptControllerInstance.BaseAddress, XIN_SVC_ALL_ISRS_OPTION );
|
||||
/* Service all pending interrupts each time the handler is entered. */
|
||||
XIntc_SetIntrSvcOption( xInterruptControllerInstance.BaseAddress, XIN_SVC_ALL_ISRS_OPTION );
|
||||
|
||||
/* Install exception handlers if the MicroBlaze is configured to handle
|
||||
* exceptions, and the application defined constant
|
||||
* configINSTALL_EXCEPTION_HANDLERS is set to 1. */
|
||||
#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
|
||||
{
|
||||
vPortExceptionsInstallHandlers();
|
||||
}
|
||||
#endif /* MICROBLAZE_EXCEPTIONS_ENABLED */
|
||||
/* Install exception handlers if the MicroBlaze is configured to handle
|
||||
exceptions, and the application defined constant
|
||||
configINSTALL_EXCEPTION_HANDLERS is set to 1. */
|
||||
#if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
|
||||
{
|
||||
vPortExceptionsInstallHandlers();
|
||||
}
|
||||
#endif /* MICROBLAZE_EXCEPTIONS_ENABLED */
|
||||
|
||||
/* Start the interrupt controller. Interrupts are enabled when the
|
||||
* scheduler starts. */
|
||||
lStatus = XIntc_Start( &xInterruptControllerInstance, XIN_REAL_MODE );
|
||||
/* Start the interrupt controller. Interrupts are enabled when the
|
||||
scheduler starts. */
|
||||
lStatus = XIntc_Start( &xInterruptControllerInstance, XIN_REAL_MODE );
|
||||
|
||||
if( lStatus == XST_SUCCESS )
|
||||
{
|
||||
lStatus = pdPASS;
|
||||
}
|
||||
else
|
||||
{
|
||||
lStatus = pdFAIL;
|
||||
}
|
||||
}
|
||||
if( lStatus == XST_SUCCESS )
|
||||
{
|
||||
lStatus = pdPASS;
|
||||
}
|
||||
else
|
||||
{
|
||||
lStatus = pdFAIL;
|
||||
}
|
||||
}
|
||||
|
||||
configASSERT( lStatus == pdPASS );
|
||||
configASSERT( lStatus == pdPASS );
|
||||
|
||||
return lStatus;
|
||||
return lStatus;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue