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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 09:38:32 -04:00
+ New feature added: Task notifications.
+ Optimise Cortex-M4F ports by inlining some critical section macros. + Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h. + Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked. + Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos. + Update trace recorder code, and some demos to use the new version (more to do). + Introduce uxTaskPriorityGetFromISR(). + Minor typo corrections. + Update MingW simulator demo to match the MSVC simulator demo.
This commit is contained in:
Richard Barry
parent
ca22607d14
commit
85fb1cc024
65 changed files with 5524 additions and 4527 deletions
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@ -1,5 +1,5 @@
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/*******************************************************************************
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* Tracealyzer v2.6.0 Recorder Library
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* Tracealyzer v2.7.0 Recorder Library
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* Percepio AB, www.percepio.com
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*
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* trcHardwarePort.c
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@ -32,7 +32,9 @@
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* damages, or the exclusion of implied warranties or limitations on how long an
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* implied warranty may last, so the above limitations may not apply to you.
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*
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* Copyright Percepio AB, 2013.
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* Tabs are used for indent in this file (1 tab = 4 spaces)
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*
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* Copyright Percepio AB, 2014.
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* www.percepio.com
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******************************************************************************/
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@ -56,36 +58,37 @@ uint32_t last_timestamp = 0;
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******************************************************************************/
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uint32_t uiTraceTickCount = 0;
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uint32_t DWT_CYCLES_ADDED = 0;
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uint32_t DWT_CYCLES_ADDED = 0; /* Used on ARM Cortex-M only */
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#if (SELECTED_PORT == PORT_ARM_CortexM)
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void prvTraceEnableIRQ(void)
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{
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asm volatile ("cpsie i");
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}
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void prvTraceDisableIRQ(void)
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{
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asm volatile ("cpsid i");
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}
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void prvTraceSetIRQMask(uint32_t priMask)
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{
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asm volatile ("MSR primask, %0" : : "r" (priMask) );
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}
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uint32_t prvTraceGetIRQMask(void)
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{
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uint32_t result;
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asm volatile ("MRS %0, primask" : "=r" (result) );
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return result;
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}
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void prvTraceInitCortexM()
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{
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DWT_CTRL_REG |= 1; /* Enable the cycle counter */
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DWT_CYCLE_COUNTER = 0;
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/* Make sure DWT is enabled is enabled, if supported */
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REG_DEMCR |= DEMCR_TRCENA;
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do{
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/* Verify that DWT is supported */
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if (REG_DEMCR == 0)
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{
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vTraceError("DWT not supported by this chip!");
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break;
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}
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/* Verify that DWT_CYCCNT is supported */
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if (REG_DWT_CTRL & DWT_CTRL_NOCYCCNT)
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{
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vTraceError("DWT_CYCCNT not supported by this chip!");
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break;
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}
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/* Reset the cycle counter */
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REG_DWT_CYCCNT = 0;
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/* Enable the cycle counter */
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REG_DWT_CTRL |= DWT_CTRL_CYCCNTENA;
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}while(0); /* breaks above jump here */
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if (RecorderDataPtr->frequency == 0)
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{
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@ -109,10 +112,10 @@ void prvTraceInitCortexM()
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void vTracePortGetTimeStamp(uint32_t *pTimestamp)
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{
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static uint32_t last_traceTickCount = 0;
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static uint32_t last_hwtc_count = 0;
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uint32_t traceTickCount = 0;
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uint32_t hwtc_count = 0;
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static uint32_t last_hwtc_count = 0;
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uint32_t traceTickCount = 0;
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uint32_t hwtc_count = 0;
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if (trace_disable_timestamp == 1)
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{
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if (pTimestamp)
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@ -120,51 +123,64 @@ void vTracePortGetTimeStamp(uint32_t *pTimestamp)
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return;
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}
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/* Retrieve HWTC_COUNT only once since the same value should be used all throughout this function. */
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/* Retrieve HWTC_COUNT only once since the same value should be used all throughout this function. */
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#if (HWTC_COUNT_DIRECTION == DIRECTION_INCREMENTING)
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hwtc_count = HWTC_COUNT;
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hwtc_count = HWTC_COUNT;
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#elif (HWTC_COUNT_DIRECTION == DIRECTION_DECREMENTING)
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hwtc_count = HWTC_PERIOD - HWTC_COUNT;
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hwtc_count = HWTC_PERIOD - HWTC_COUNT;
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#else
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Junk text to cause compiler error - HWTC_COUNT_DIRECTION is not set correctly!
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Should be DIRECTION_INCREMENTING or DIRECTION_DECREMENTING
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Junk text to cause compiler error - HWTC_COUNT_DIRECTION is not set correctly!
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Should be DIRECTION_INCREMENTING or DIRECTION_DECREMENTING
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#endif
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if (last_traceTickCount - uiTraceTickCount - 1 < 0x80000000)
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{
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/* This means last_traceTickCount is higher than uiTraceTickCount,
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so we have previously compensated for a missed tick.
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Therefore we use the last stored value because that is more accurate. */
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traceTickCount = last_traceTickCount;
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}
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else
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{
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/* Business as usual */
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traceTickCount = uiTraceTickCount;
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}
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/* Check for overflow. May occur if the update of uiTraceTickCount has been
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delayed due to disabled interrupts. */
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if (traceTickCount == last_traceTickCount && hwtc_count < last_hwtc_count)
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{
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/* A trace tick has occurred but not been executed by the kernel, so we compensate manually. */
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traceTickCount++;
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}
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/* Check if the return address is OK, then we perform the calculation. */
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if (pTimestamp)
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{
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/* Get timestamp from trace ticks. Scale down the period to avoid unwanted overflows. */
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*pTimestamp = traceTickCount * (HWTC_PERIOD / HWTC_DIVISOR);
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/* Increase timestamp by (hwtc_count + "lost hardware ticks from scaling down period") / HWTC_DIVISOR. */
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*pTimestamp += (hwtc_count + traceTickCount * (HWTC_PERIOD % HWTC_DIVISOR)) / HWTC_DIVISOR;
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#if (SELECTED_PORT == PORT_Win32)
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/* The Win32 port uses ulGetRunTimeCounterValue for timestamping, which in turn
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uses QueryPerformanceCounter. That function is not always reliable when used over
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multiple threads. We must therefore handle rare cases where the timestamp is less
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than the previous. In practice, the Win32 should "never" roll over since the
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performance counter is 64 bit wide. */
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if (last_hwtc_count > hwtc_count)
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{
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hwtc_count = last_hwtc_count;
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}
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#endif
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if (last_traceTickCount - uiTraceTickCount - 1 < 0x80000000)
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{
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/* This means last_traceTickCount is higher than uiTraceTickCount,
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so we have previously compensated for a missed tick.
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Therefore we use the last stored value because that is more accurate. */
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traceTickCount = last_traceTickCount;
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}
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else
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{
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/* Business as usual */
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traceTickCount = uiTraceTickCount;
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}
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/* Check for overflow. May occur if the update of uiTraceTickCount has been
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delayed due to disabled interrupts. */
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if (traceTickCount == last_traceTickCount && hwtc_count < last_hwtc_count)
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{
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/* A trace tick has occurred but not been executed by the kernel, so we compensate manually. */
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traceTickCount++;
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}
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/* Check if the return address is OK, then we perform the calculation. */
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if (pTimestamp)
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{
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/* Get timestamp from trace ticks. Scale down the period to avoid unwanted overflows. */
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*pTimestamp = traceTickCount * (HWTC_PERIOD / HWTC_DIVISOR);
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/* Increase timestamp by (hwtc_count + "lost hardware ticks from scaling down period") / HWTC_DIVISOR. */
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*pTimestamp += (hwtc_count + traceTickCount * (HWTC_PERIOD % HWTC_DIVISOR)) / HWTC_DIVISOR;
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last_timestamp = *pTimestamp;
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}
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/* Store the previous values. */
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last_traceTickCount = traceTickCount;
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last_hwtc_count = hwtc_count;
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}
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/* Store the previous values. */
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last_traceTickCount = traceTickCount;
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last_hwtc_count = hwtc_count;
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}
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#endif
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#endif
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