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+ New feature added: Task notifications.
+ Optimise Cortex-M4F ports by inlining some critical section macros. + Original ports used a #define to set the path to portmacro.h - that method has been obsolete for years and now all the old definitions have been moved into a separate header files called deprecated_definitions.h. + Cortex-M port now check the active vector bits against 0xff when determining if a function is called from an interrupt - previously only a subset of the bits (0x1f) were checked. + Add in new standard demo/test files TaskNotify.c/h and include the files in the simulator demos. + Update trace recorder code, and some demos to use the new version (more to do). + Introduce uxTaskPriorityGetFromISR(). + Minor typo corrections. + Update MingW simulator demo to match the MSVC simulator demo.
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ca22607d14
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65 changed files with 5524 additions and 4527 deletions
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@ -107,29 +107,30 @@ typedef unsigned long UBaseType_t;
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/* Constants used with memory barrier intrinsics. */
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#define portSY_FULL_READ_WRITE ( 15 )
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/*-----------------------------------------------------------*/
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/* Scheduler utilities. */
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extern void vPortYield( void );
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#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) vPortYield()
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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extern uint32_t ulPortSetInterruptMask( void );
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extern void vPortClearInterruptMask( uint32_t ulNewMask );
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
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#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
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#define portDISABLE_INTERRUPTS() ulPortRaiseBASEPRI()
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#define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x)
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/*-----------------------------------------------------------*/
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@ -178,6 +179,53 @@ not necessary for to use this port. They are defined so the common demo files
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/* portNOP() is not required by this port. */
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#define portNOP()
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#ifndef portFORCE_INLINE
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#define portFORCE_INLINE __forceinline
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#endif
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
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{
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__asm
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{
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/* Barrier instructions are not used as this function is only used to
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lower the BASEPRI value. */
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msr basepri, ulBASEPRI
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}
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
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{
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uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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__asm
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{
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/* Set BASEPRI to the max syscall priority to effect a critical
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section. */
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mrs ulReturn, basepri
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msr basepri, ulNewBASEPRI
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dsb
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isb
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}
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return ulReturn;
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}
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/*-----------------------------------------------------------*/
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static portFORCE_INLINE void vPortYield( void )
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{
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/* Set a PendSV to request a context switch. */
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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/* Barriers are normally not required but do ensure the code is completely
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within the specified behaviour for the architecture. */
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__dsb( portSY_FULL_READ_WRITE );
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__isb( portSY_FULL_READ_WRITE );
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}
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/*-----------------------------------------------------------*/
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#ifdef __cplusplus
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}
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#endif
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