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Suppress MISRA C:2012 rule 11.5 deviations (#878)

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* Suppress MISRA C:2012 rule 11.5 deviations by comment also remove this rule in global config

---------

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Ubuntu <ubuntu@ip-172-31-34-245.ap-northeast-1.compute.internal>
Co-authored-by: Rahul Kar <karahulx@amazon.com>
Co-authored-by: Soren Ptak <ptaksoren@gmail.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
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chinglee-iot 2023-12-06 09:51:52 +08:00 committed by GitHub
parent cd5c774b2b
commit 84c0047ccd
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7 changed files with 191 additions and 76 deletions
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56
MISRA.md
View file

@ -20,11 +20,12 @@ grep 'MISRA Ref 8.4.1' . -rI
#### Rule 8.4 #### Rule 8.4
MISRA C:2012 Rule 8.4: A compatible declaration shall be visible when an
object or function with external linkage is defined.
_Ref 8.4.1_ _Ref 8.4.1_
- MISRA C:2012 Rule 8.4: A compatible declaration shall be visible when an - This rule requires that a compatible declaration is made available
object or function with external linkage is defined.
This rule requires that a compatible declaration is made available
in a header file when an object with external linkage is defined. in a header file when an object with external linkage is defined.
pxCurrentTCB(s) is defined with external linkage but it is only pxCurrentTCB(s) is defined with external linkage but it is only
referenced from the assembly code in the port files. Therefore, adding referenced from the assembly code in the port files. Therefore, adding
@ -34,11 +35,11 @@ _Ref 8.4.1_
#### Rule 11.3 #### Rule 11.3
_Ref 11.3.1_ MISRA C:2012 Rule 11.3: A cast shall not be performed between a pointer to
- MISRA C:2012 Rule 11.3: A cast shall not be performed between a pointer to
object type and a pointer to a different object type. object type and a pointer to a different object type.
This rule prohibits casting a pointer to object into a pointer to a
_Ref 11.3.1_
- This rule prohibits casting a pointer to object into a pointer to a
different object because it may result in an incorrectly aligned pointer, different object because it may result in an incorrectly aligned pointer,
leading to undefined behavior. Even if the casting produces a correctly leading to undefined behavior. Even if the casting produces a correctly
aligned pointer, the behavior may be still undefined if the pointer is aligned pointer, the behavior may be still undefined if the pointer is
@ -50,6 +51,43 @@ _Ref 11.3.1_
checked using configASSERT. checked using configASSERT.
#### Rule 11.5
MISRA C:2012 Rule 11.5: A conversion should not be performed from pointer to
void into pointer to object.
This rule prohibits conversion of a pointer to void into a pointer to
object because it may result in an incorrectly aligned pointer leading
to undefined behavior.
_Ref 11.5.1_
- The memory blocks returned by pvPortMalloc() are guaranteed to meet the
architecture alignment requirements specified by portBYTE_ALIGNMENT.
The casting of the pointer to void returned by pvPortMalloc() is,
therefore, safe because it is guaranteed to be aligned.
_Ref 11.5.2_
- The conversion from a pointer to void into a pointer to EventGroup_t is
safe because it is a pointer to EventGroup_t, which is returned to the
application at the time of event group creation for data hiding
purposes.
_Ref 11.5.3_
- The conversion from a pointer to void in list macros for list item owner
is safe because the type of the pointer stored and retrieved is the
same.
_Ref 11.5.4_
- The conversion from a pointer to void into a pointer to EventGroup_t is
safe because it is a pointer to EventGroup_t, which is passed as a
parameter to the xTimerPendFunctionCallFromISR API when the callback is
pended.
_Ref 11.5.5_
- The conversion from a pointer to void into a pointer to uint8_t is safe
because data storage buffers are implemented as uint8_t arrays for the
ease of sizing, alignment and access.
### MISRA configuration ### MISRA configuration
Copy below content to `misra.conf` to run Coverity on FreeRTOS-Kernel. Copy below content to `misra.conf` to run Coverity on FreeRTOS-Kernel.
@ -81,10 +119,6 @@ Copy below content to `misra.conf` to run Coverity on FreeRTOS-Kernel.
{ {
deviation: "Rule 8.7", deviation: "Rule 8.7",
reason: "API functions are not used by the library outside of the files they are defined; however, they must be externally visible in order to be used by an application." reason: "API functions are not used by the library outside of the files they are defined; however, they must be externally visible in order to be used by an application."
},
{
deviation: "Rule 11.5",
reason: "Allow casts from `void *`. List owner, pvOwner, is stored as `void *` and are cast to various types for use in functions."
} }
] ]
} }

3
croutine.c
View file

@ -110,6 +110,9 @@
traceENTER_xCoRoutineCreate( pxCoRoutineCode, uxPriority, uxIndex ); traceENTER_xCoRoutineCreate( pxCoRoutineCode, uxPriority, uxIndex );
/* Allocate the memory that will store the co-routine control block. */ /* Allocate the memory that will store the co-routine control block. */
/* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) ); pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) );
if( pxCoRoutine ) if( pxCoRoutine )

39
event_groups.c
View file

@ -143,20 +143,10 @@ static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits,
traceENTER_xEventGroupCreate(); traceENTER_xEventGroupCreate();
/* Allocate the event group. Justification for MISRA deviation as /* MISRA Ref 11.5.1 [Malloc memory assignment] */
* follows: pvPortMalloc() always ensures returned memory blocks are /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
* aligned per the requirements of the MCU stack. In this case /* coverity[misra_c_2012_rule_11_5_violation] */
* pvPortMalloc() must return a pointer that is guaranteed to meet the pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) );
* alignment requirements of the EventGroup_t structure - which (if you
* follow it through) is the alignment requirements of the TickType_t type
* (EventBits_t being of TickType_t itself). Therefore, whenever the
* stack alignment requirements are greater than or equal to the
* TickType_t alignment requirements the cast is safe. In other cases,
* where the natural word size of the architecture is less than
* sizeof( TickType_t ), the TickType_t variables will be accessed in two
* or more reads operations, and the alignment requirements is only that
* of each individual read. */
pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); /*lint !e9087 !e9079 see comment above. */
if( pxEventBits != NULL ) if( pxEventBits != NULL )
{ {
@ -749,7 +739,10 @@ void vEventGroupSetBitsCallback( void * pvEventGroup,
{ {
traceENTER_vEventGroupSetBitsCallback( pvEventGroup, ulBitsToSet ); traceENTER_vEventGroupSetBitsCallback( pvEventGroup, ulBitsToSet );
( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */ /* MISRA Ref 11.5.4 [Callback function parameter] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet );
traceRETURN_vEventGroupSetBitsCallback(); traceRETURN_vEventGroupSetBitsCallback();
} }
@ -762,7 +755,10 @@ void vEventGroupClearBitsCallback( void * pvEventGroup,
{ {
traceENTER_vEventGroupClearBitsCallback( pvEventGroup, ulBitsToClear ); traceENTER_vEventGroupClearBitsCallback( pvEventGroup, ulBitsToClear );
( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */ /* MISRA Ref 11.5.4 [Callback function parameter] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear );
traceRETURN_vEventGroupClearBitsCallback(); traceRETURN_vEventGroupClearBitsCallback();
} }
@ -831,7 +827,11 @@ static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits,
UBaseType_t uxEventGroupGetNumber( void * xEventGroup ) UBaseType_t uxEventGroupGetNumber( void * xEventGroup )
{ {
UBaseType_t xReturn; UBaseType_t xReturn;
EventGroup_t const * pxEventBits = ( EventGroup_t * ) xEventGroup; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */
/* MISRA Ref 11.5.2 [Opaque pointer] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
EventGroup_t const * pxEventBits = ( EventGroup_t * ) xEventGroup;
traceENTER_uxEventGroupGetNumber( xEventGroup ); traceENTER_uxEventGroupGetNumber( xEventGroup );
@ -859,7 +859,10 @@ static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits,
{ {
traceENTER_vEventGroupSetNumber( xEventGroup, uxEventGroupNumber ); traceENTER_vEventGroupSetNumber( xEventGroup, uxEventGroupNumber );
( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */ /* MISRA Ref 11.5.2 [Opaque pointer] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber;
traceRETURN_vEventGroupSetNumber(); traceRETURN_vEventGroupSetNumber();
} }

14
queue.c
View file

@ -517,16 +517,10 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
* zero in the case the queue is used as a semaphore. */ * zero in the case the queue is used as a semaphore. */
xQueueSizeInBytes = ( size_t ) ( ( size_t ) uxQueueLength * ( size_t ) uxItemSize ); xQueueSizeInBytes = ( size_t ) ( ( size_t ) uxQueueLength * ( size_t ) uxItemSize );
/* Allocate the queue and storage area. Justification for MISRA /* MISRA Ref 11.5.1 [Malloc memory assignment] */
* deviation as follows: pvPortMalloc() always ensures returned memory /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
* blocks are aligned per the requirements of the MCU stack. In this case /* coverity[misra_c_2012_rule_11_5_violation] */
* pvPortMalloc() must return a pointer that is guaranteed to meet the pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes );
* alignment requirements of the Queue_t structure - which in this case
* is an int8_t *. Therefore, whenever the stack alignment requirements
* are greater than or equal to the pointer to char requirements the cast
* is safe. In other cases alignment requirements are not strict (one or
* two bytes). */
pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
if( pxNewQueue != NULL ) if( pxNewQueue != NULL )
{ {

25
stream_buffer.c
View file

@ -374,8 +374,14 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
if( pvAllocatedMemory != NULL ) if( pvAllocatedMemory != NULL )
{ {
prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pvAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */ /* MISRA Ref 11.5.1 [Malloc memory assignment] */
( ( uint8_t * ) pvAllocatedMemory ) + sizeof( StreamBuffer_t ), /* Storage area follows. */ /*lint !e9016 Indexing past structure valid for uint8_t pointer, also storage area has no alignment requirement. */ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pvAllocatedMemory, /* Structure at the start of the allocated memory. */
/* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
( ( uint8_t * ) pvAllocatedMemory ) + sizeof( StreamBuffer_t ), /* Storage area follows. */
xBufferSizeBytes, xBufferSizeBytes,
xTriggerLevelBytes, xTriggerLevelBytes,
ucFlags, ucFlags,
@ -391,7 +397,10 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
traceRETURN_xStreamBufferGenericCreate( pvAllocatedMemory ); traceRETURN_xStreamBufferGenericCreate( pvAllocatedMemory );
return ( StreamBufferHandle_t ) pvAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */ /* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
return ( StreamBufferHandle_t ) pvAllocatedMemory;
} }
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ #endif /* configSUPPORT_DYNAMIC_ALLOCATION */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -940,7 +949,10 @@ static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
if( xDataLengthBytes != ( size_t ) 0 ) if( xDataLengthBytes != ( size_t ) 0 )
{ {
/* Write the data to the buffer. */ /* Write the data to the buffer. */
pxStreamBuffer->xHead = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes, xNextHead ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alignment and access. */ /* MISRA Ref 11.5.5 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxStreamBuffer->xHead = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes, xNextHead );
} }
return xDataLengthBytes; return xDataLengthBytes;
@ -1204,7 +1216,10 @@ static size_t prvReadMessageFromBuffer( StreamBuffer_t * pxStreamBuffer,
if( xCount != ( size_t ) 0 ) if( xCount != ( size_t ) 0 )
{ {
/* Read the actual data and update the tail to mark the data as officially consumed. */ /* Read the actual data and update the tail to mark the data as officially consumed. */
pxStreamBuffer->xTail = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xCount, xNextTail ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */ /* MISRA Ref 11.5.5 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxStreamBuffer->xTail = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xCount, xNextTail );
} }
return xCount; return xCount;

92
tasks.c
View file

@ -1035,6 +1035,9 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
for( pxIterator = listGET_HEAD_ENTRY( pxReadyList ); pxIterator != pxEndMarker; pxIterator = listGET_NEXT( pxIterator ) ) for( pxIterator = listGET_HEAD_ENTRY( pxReadyList ); pxIterator != pxEndMarker; pxIterator = listGET_NEXT( pxIterator ) )
{ {
/* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
TCB_t * pxTCB = ( TCB_t * ) listGET_LIST_ITEM_OWNER( pxIterator ); TCB_t * pxTCB = ( TCB_t * ) listGET_LIST_ITEM_OWNER( pxIterator );
#if ( configRUN_MULTIPLE_PRIORITIES == 0 ) #if ( configRUN_MULTIPLE_PRIORITIES == 0 )
@ -1498,6 +1501,9 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
if( pxTaskDefinition->puxStackBuffer != NULL ) if( pxTaskDefinition->puxStackBuffer != NULL )
{ {
/* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
if( pxNewTCB != NULL ) if( pxNewTCB != NULL )
@ -1622,6 +1628,9 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
/* Allocate space for the TCB. Where the memory comes from depends on /* Allocate space for the TCB. Where the memory comes from depends on
* the implementation of the port malloc function and whether or not static * the implementation of the port malloc function and whether or not static
* allocation is being used. */ * allocation is being used. */
/* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
if( pxNewTCB != NULL ) if( pxNewTCB != NULL )
@ -1631,7 +1640,10 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
/* Allocate space for the stack used by the task being created. /* Allocate space for the stack used by the task being created.
* The base of the stack memory stored in the TCB so the task can * The base of the stack memory stored in the TCB so the task can
* be deleted later if required. */ * be deleted later if required. */
pxNewTCB->pxStack = ( StackType_t * ) pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ /* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxNewTCB->pxStack = ( StackType_t * ) pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) );
if( pxNewTCB->pxStack == NULL ) if( pxNewTCB->pxStack == NULL )
{ {
@ -1646,12 +1658,18 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
StackType_t * pxStack; StackType_t * pxStack;
/* Allocate space for the stack used by the task being created. */ /* Allocate space for the stack used by the task being created. */
pxStack = pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */ /* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxStack = pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) );
if( pxStack != NULL ) if( pxStack != NULL )
{ {
/* Allocate space for the TCB. */ /* Allocate space for the TCB. */
pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */ /* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
if( pxNewTCB != NULL ) if( pxNewTCB != NULL )
{ {
@ -3937,7 +3955,10 @@ BaseType_t xTaskResumeAll( void )
* appropriate ready list. */ * appropriate ready list. */
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE ) while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
{ {
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) );
listREMOVE_ITEM( &( pxTCB->xEventListItem ) ); listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
portMEMORY_BARRIER(); portMEMORY_BARRIER();
listREMOVE_ITEM( &( pxTCB->xStateListItem ) ); listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
@ -4148,11 +4169,17 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char
if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 ) if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
{ {
listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );
do do
{ {
listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );
/* Check each character in the name looking for a match or /* Check each character in the name looking for a match or
* mismatch. */ * mismatch. */
@ -4216,6 +4243,9 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char
{ {
for( pxIterator = listGET_HEAD_ENTRY( pxList ); pxIterator != pxEndMarker; pxIterator = listGET_NEXT( pxIterator ) ) for( pxIterator = listGET_HEAD_ENTRY( pxList ); pxIterator != pxEndMarker; pxIterator = listGET_NEXT( pxIterator ) )
{ {
/* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
TCB_t * pxTCB = listGET_LIST_ITEM_OWNER( pxIterator ); TCB_t * pxTCB = listGET_LIST_ITEM_OWNER( pxIterator );
/* Check each character in the name looking for a match or /* Check each character in the name looking for a match or
@ -4738,7 +4768,10 @@ BaseType_t xTaskIncrementTick( void )
* item at the head of the delayed list. This is the time * item at the head of the delayed list. This is the time
* at which the task at the head of the delayed list must * at which the task at the head of the delayed list must
* be removed from the Blocked state. */ * be removed from the Blocked state. */
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) ); xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
if( xConstTickCount < xItemValue ) if( xConstTickCount < xItemValue )
@ -5109,7 +5142,10 @@ BaseType_t xTaskIncrementTick( void )
/* Select a new task to run using either the generic C or port /* Select a new task to run using either the generic C or port
* optimised asm code. */ * optimised asm code. */
taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
taskSELECT_HIGHEST_PRIORITY_TASK();
traceTASK_SWITCHED_IN(); traceTASK_SWITCHED_IN();
/* After the new task is switched in, update the global errno. */ /* After the new task is switched in, update the global errno. */
@ -5346,7 +5382,10 @@ BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
* *
* This function assumes that a check has already been made to ensure that * This function assumes that a check has already been made to ensure that
* pxEventList is not empty. */ * pxEventList is not empty. */
pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
configASSERT( pxUnblockedTCB ); configASSERT( pxUnblockedTCB );
listREMOVE_ITEM( &( pxUnblockedTCB->xEventListItem ) ); listREMOVE_ITEM( &( pxUnblockedTCB->xEventListItem ) );
@ -5432,7 +5471,10 @@ void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem,
/* Remove the event list form the event flag. Interrupts do not access /* Remove the event list form the event flag. Interrupts do not access
* event flags. */ * event flags. */
pxUnblockedTCB = listGET_LIST_ITEM_OWNER( pxEventListItem ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxUnblockedTCB = listGET_LIST_ITEM_OWNER( pxEventListItem );
configASSERT( pxUnblockedTCB ); configASSERT( pxUnblockedTCB );
listREMOVE_ITEM( pxEventListItem ); listREMOVE_ITEM( pxEventListItem );
@ -6039,7 +6081,10 @@ static void prvCheckTasksWaitingTermination( void )
taskENTER_CRITICAL(); taskENTER_CRITICAL();
{ {
{ {
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );
( void ) uxListRemove( &( pxTCB->xStateListItem ) ); ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
--uxCurrentNumberOfTasks; --uxCurrentNumberOfTasks;
--uxDeletedTasksWaitingCleanUp; --uxDeletedTasksWaitingCleanUp;
@ -6060,7 +6105,10 @@ static void prvCheckTasksWaitingTermination( void )
* waiting to enter the critical section. */ * waiting to enter the critical section. */
if( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U ) if( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
{ {
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) );
if( pxTCB->xTaskRunState == taskTASK_NOT_RUNNING ) if( pxTCB->xTaskRunState == taskTASK_NOT_RUNNING )
{ {
@ -6247,7 +6295,10 @@ static void prvCheckTasksWaitingTermination( void )
if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 ) if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
{ {
listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );
/* Populate an TaskStatus_t structure within the /* Populate an TaskStatus_t structure within the
* pxTaskStatusArray array for each task that is referenced from * pxTaskStatusArray array for each task that is referenced from
@ -6255,7 +6306,10 @@ static void prvCheckTasksWaitingTermination( void )
* meaning of each TaskStatus_t structure member. */ * meaning of each TaskStatus_t structure member. */
do do
{ {
listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );
vTaskGetInfo( ( TaskHandle_t ) pxNextTCB, &( pxTaskStatusArray[ uxTask ] ), pdTRUE, eState ); vTaskGetInfo( ( TaskHandle_t ) pxNextTCB, &( pxTaskStatusArray[ uxTask ] ), pdTRUE, eState );
uxTask++; uxTask++;
} while( pxNextTCB != pxFirstTCB ); } while( pxNextTCB != pxFirstTCB );
@ -7225,7 +7279,10 @@ static void prvResetNextTaskUnblockTime( void )
/* Allocate an array index for each task. NOTE! if /* Allocate an array index for each task. NOTE! if
* configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
* equate to NULL. */ * equate to NULL. */
pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */ /* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );
if( pxTaskStatusArray != NULL ) if( pxTaskStatusArray != NULL )
{ {
@ -7384,7 +7441,10 @@ static void prvResetNextTaskUnblockTime( void )
/* Allocate an array index for each task. NOTE! If /* Allocate an array index for each task. NOTE! If
* configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will * configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
* equate to NULL. */ * equate to NULL. */
pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */ /* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) );
if( pxTaskStatusArray != NULL ) if( pxTaskStatusArray != NULL )
{ {

10
timers.c
View file

@ -349,7 +349,10 @@
traceENTER_xTimerCreate( pcTimerName, xTimerPeriodInTicks, xAutoReload, pvTimerID, pxCallbackFunction ); traceENTER_xTimerCreate( pcTimerName, xTimerPeriodInTicks, xAutoReload, pvTimerID, pxCallbackFunction );
pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's name. */ /* MISRA Ref 11.5.1 [Malloc memory assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) );
if( pxNewTimer != NULL ) if( pxNewTimer != NULL )
{ {
@ -721,7 +724,10 @@
static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, static void prvProcessExpiredTimer( const TickType_t xNextExpireTime,
const TickType_t xTimeNow ) const TickType_t xTimeNow )
{ {
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ /* MISRA Ref 11.5.3 [Void pointer assignment] */
/* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-115 */
/* coverity[misra_c_2012_rule_11_5_violation] */
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
/* Remove the timer from the list of active timers. A check has already /* Remove the timer from the list of active timers. A check has already
* been performed to ensure the list is not empty. */ * been performed to ensure the list is not empty. */