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Use UBaseType_t as interrupt mask (#689)

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* Use UBaseType_t as interrupt mask
* Update GCC posix port to use UBaseType_t as interrupt mask
This commit is contained in:
chinglee-iot 2023-06-12 17:33:52 +08:00 committed by GitHub
parent 4a35c97fec
commit 80f67449ba
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GPG key ID: 4AEE18F83AFDEB23
6 changed files with 51 additions and 51 deletions
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6
event_groups.c
View file

@ -521,15 +521,15 @@ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup,
EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup )
{ {
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
EventGroup_t const * const pxEventBits = xEventGroup; EventGroup_t const * const pxEventBits = xEventGroup;
EventBits_t uxReturn; EventBits_t uxReturn;
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
uxReturn = pxEventBits->uxEventBits; uxReturn = pxEventBits->uxEventBits;
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return uxReturn; return uxReturn;
} /*lint !e818 EventGroupHandle_t is a typedef used in other functions to so can't be pointer to const. */ } /*lint !e818 EventGroupHandle_t is a typedef used in other functions to so can't be pointer to const. */

8
portable/ThirdParty/GCC/Posix/port.c vendored
View file

@ -332,17 +332,17 @@ void vPortEnableInterrupts( void )
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
portBASE_TYPE xPortSetInterruptMask( void ) UBaseType_t xPortSetInterruptMask( void )
{ {
/* Interrupts are always disabled inside ISRs (signals /* Interrupts are always disabled inside ISRs (signals
* handlers). */ * handlers). */
return pdTRUE; return ( UBaseType_t )0;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortClearInterruptMask( portBASE_TYPE xMask ) void vPortClearInterruptMask( UBaseType_t uxMask )
{ {
( void ) xMask; ( void ) uxMask;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

4
portable/ThirdParty/GCC/Posix/portmacro.h vendored
View file

@ -94,8 +94,8 @@ extern void vPortEnableInterrupts( void );
#define portSET_INTERRUPT_MASK() ( vPortDisableInterrupts() ) #define portSET_INTERRUPT_MASK() ( vPortDisableInterrupts() )
#define portCLEAR_INTERRUPT_MASK() ( vPortEnableInterrupts() ) #define portCLEAR_INTERRUPT_MASK() ( vPortEnableInterrupts() )
extern portBASE_TYPE xPortSetInterruptMask( void ); extern UBaseType_t xPortSetInterruptMask( void );
extern void vPortClearInterruptMask( portBASE_TYPE xMask ); extern void vPortClearInterruptMask( UBaseType_t xMask );
extern void vPortEnterCritical( void ); extern void vPortEnterCritical( void );
extern void vPortExitCritical( void ); extern void vPortExitCritical( void );

24
queue.c
View file

@ -1099,7 +1099,7 @@ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
const BaseType_t xCopyPosition ) const BaseType_t xCopyPosition )
{ {
BaseType_t xReturn; BaseType_t xReturn;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue; Queue_t * const pxQueue = xQueue;
configASSERT( pxQueue ); configASSERT( pxQueue );
@ -1127,7 +1127,7 @@ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
* read, instead return a flag to say whether a context switch is required or * read, instead return a flag to say whether a context switch is required or
* not (i.e. has a task with a higher priority than us been woken by this * not (i.e. has a task with a higher priority than us been woken by this
* post). */ * post). */
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) ) if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
{ {
@ -1252,7 +1252,7 @@ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue,
xReturn = errQUEUE_FULL; xReturn = errQUEUE_FULL;
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }
@ -1262,7 +1262,7 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
BaseType_t * const pxHigherPriorityTaskWoken ) BaseType_t * const pxHigherPriorityTaskWoken )
{ {
BaseType_t xReturn; BaseType_t xReturn;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue; Queue_t * const pxQueue = xQueue;
/* Similar to xQueueGenericSendFromISR() but used with semaphores where the /* Similar to xQueueGenericSendFromISR() but used with semaphores where the
@ -1298,7 +1298,7 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
@ -1418,7 +1418,7 @@ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue,
xReturn = errQUEUE_FULL; xReturn = errQUEUE_FULL;
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }
@ -1933,7 +1933,7 @@ BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
BaseType_t * const pxHigherPriorityTaskWoken ) BaseType_t * const pxHigherPriorityTaskWoken )
{ {
BaseType_t xReturn; BaseType_t xReturn;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue; Queue_t * const pxQueue = xQueue;
configASSERT( pxQueue ); configASSERT( pxQueue );
@ -1955,7 +1955,7 @@ BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
@ -2015,7 +2015,7 @@ BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue,
traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ); traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }
@ -2025,7 +2025,7 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
void * const pvBuffer ) void * const pvBuffer )
{ {
BaseType_t xReturn; BaseType_t xReturn;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
int8_t * pcOriginalReadPosition; int8_t * pcOriginalReadPosition;
Queue_t * const pxQueue = xQueue; Queue_t * const pxQueue = xQueue;
@ -2049,7 +2049,7 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
/* Cannot block in an ISR, so check there is data available. */ /* Cannot block in an ISR, so check there is data available. */
if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 ) if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
@ -2070,7 +2070,7 @@ BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,
traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ); traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue );
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }

24
stream_buffer.c
View file

@ -96,9 +96,9 @@
#define sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, \ #define sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, \
pxHigherPriorityTaskWoken ) \ pxHigherPriorityTaskWoken ) \
do { \ do { \
portBASE_TYPE xSavedInterruptStatus; \ UBaseType_t uxSavedInterruptStatus; \
\ \
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \ uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \
{ \ { \
if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL ) \ if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL ) \
{ \ { \
@ -109,7 +109,7 @@
( pxStreamBuffer )->xTaskWaitingToSend = NULL; \ ( pxStreamBuffer )->xTaskWaitingToSend = NULL; \
} \ } \
} \ } \
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); \ portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \
} while( 0 ) } while( 0 )
#endif /* sbRECEIVE_COMPLETED_FROM_ISR */ #endif /* sbRECEIVE_COMPLETED_FROM_ISR */
@ -173,9 +173,9 @@
#ifndef sbSEND_COMPLETE_FROM_ISR #ifndef sbSEND_COMPLETE_FROM_ISR
#define sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken ) \ #define sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken ) \
do { \ do { \
portBASE_TYPE xSavedInterruptStatus; \ UBaseType_t uxSavedInterruptStatus; \
\ \
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \ uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \
{ \ { \
if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL ) \ if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL ) \
{ \ { \
@ -186,7 +186,7 @@
( pxStreamBuffer )->xTaskWaitingToReceive = NULL; \ ( pxStreamBuffer )->xTaskWaitingToReceive = NULL; \
} \ } \
} \ } \
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); \ portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \
} while( 0 ) } while( 0 )
#endif /* sbSEND_COMPLETE_FROM_ISR */ #endif /* sbSEND_COMPLETE_FROM_ISR */
@ -1214,11 +1214,11 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
{ {
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
BaseType_t xReturn; BaseType_t xReturn;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
configASSERT( pxStreamBuffer ); configASSERT( pxStreamBuffer );
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL ) if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )
{ {
@ -1234,7 +1234,7 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
xReturn = pdFALSE; xReturn = pdFALSE;
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }
@ -1245,11 +1245,11 @@ BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuf
{ {
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer; StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
BaseType_t xReturn; BaseType_t xReturn;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
configASSERT( pxStreamBuffer ); configASSERT( pxStreamBuffer );
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL ) if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )
{ {
@ -1265,7 +1265,7 @@ BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuf
xReturn = pdFALSE; xReturn = pdFALSE;
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }

36
tasks.c
View file

@ -1481,7 +1481,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
{ {
TCB_t const * pxTCB; TCB_t const * pxTCB;
UBaseType_t uxReturn; UBaseType_t uxReturn;
portBASE_TYPE xSavedInterruptState; UBaseType_t uxSavedInterruptState;
/* RTOS ports that support interrupt nesting have the concept of a /* RTOS ports that support interrupt nesting have the concept of a
* maximum system call (or maximum API call) interrupt priority. * maximum system call (or maximum API call) interrupt priority.
@ -1501,14 +1501,14 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
xSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
/* If null is passed in here then it is the priority of the calling /* If null is passed in here then it is the priority of the calling
* task that is being queried. */ * task that is being queried. */
pxTCB = prvGetTCBFromHandle( xTask ); pxTCB = prvGetTCBFromHandle( xTask );
uxReturn = pxTCB->uxPriority; uxReturn = pxTCB->uxPriority;
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptState ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptState );
return uxReturn; return uxReturn;
} }
@ -1894,7 +1894,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
{ {
BaseType_t xYieldRequired = pdFALSE; BaseType_t xYieldRequired = pdFALSE;
TCB_t * const pxTCB = xTaskToResume; TCB_t * const pxTCB = xTaskToResume;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
configASSERT( xTaskToResume ); configASSERT( xTaskToResume );
@ -1916,7 +1916,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE ) if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
{ {
@ -1957,7 +1957,7 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB )
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xYieldRequired; return xYieldRequired;
} }
@ -2315,7 +2315,7 @@ TickType_t xTaskGetTickCount( void )
TickType_t xTaskGetTickCountFromISR( void ) TickType_t xTaskGetTickCountFromISR( void )
{ {
TickType_t xReturn; TickType_t xReturn;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
/* RTOS ports that support interrupt nesting have the concept of a maximum /* RTOS ports that support interrupt nesting have the concept of a maximum
* system call (or maximum API call) interrupt priority. Interrupts that are * system call (or maximum API call) interrupt priority. Interrupts that are
@ -2333,11 +2333,11 @@ TickType_t xTaskGetTickCountFromISR( void )
* link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ * link: https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
xSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
{ {
xReturn = xTickCount; xReturn = xTickCount;
} }
portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }
@ -3015,18 +3015,18 @@ BaseType_t xTaskIncrementTick( void )
{ {
TCB_t * pxTCB; TCB_t * pxTCB;
TaskHookFunction_t xReturn; TaskHookFunction_t xReturn;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
/* If xTask is NULL then set the calling task's hook. */ /* If xTask is NULL then set the calling task's hook. */
pxTCB = prvGetTCBFromHandle( xTask ); pxTCB = prvGetTCBFromHandle( xTask );
/* Save the hook function in the TCB. A critical section is required as /* Save the hook function in the TCB. A critical section is required as
* the value can be accessed from an interrupt. */ * the value can be accessed from an interrupt. */
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
xReturn = pxTCB->pxTaskTag; xReturn = pxTCB->pxTaskTag;
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }
@ -5035,7 +5035,7 @@ TickType_t uxTaskResetEventItemValue( void )
TCB_t * pxTCB; TCB_t * pxTCB;
uint8_t ucOriginalNotifyState; uint8_t ucOriginalNotifyState;
BaseType_t xReturn = pdPASS; BaseType_t xReturn = pdPASS;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
configASSERT( xTaskToNotify ); configASSERT( xTaskToNotify );
configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES ); configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES );
@ -5060,7 +5060,7 @@ TickType_t uxTaskResetEventItemValue( void )
pxTCB = xTaskToNotify; pxTCB = xTaskToNotify;
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
if( pulPreviousNotificationValue != NULL ) if( pulPreviousNotificationValue != NULL )
{ {
@ -5154,7 +5154,7 @@ TickType_t uxTaskResetEventItemValue( void )
} }
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn; return xReturn;
} }
@ -5170,7 +5170,7 @@ TickType_t uxTaskResetEventItemValue( void )
{ {
TCB_t * pxTCB; TCB_t * pxTCB;
uint8_t ucOriginalNotifyState; uint8_t ucOriginalNotifyState;
portBASE_TYPE xSavedInterruptStatus; UBaseType_t uxSavedInterruptStatus;
configASSERT( xTaskToNotify ); configASSERT( xTaskToNotify );
configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES ); configASSERT( uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES );
@ -5195,7 +5195,7 @@ TickType_t uxTaskResetEventItemValue( void )
pxTCB = xTaskToNotify; pxTCB = xTaskToNotify;
xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ {
ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ]; ucOriginalNotifyState = pxTCB->ucNotifyState[ uxIndexToNotify ];
pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED; pxTCB->ucNotifyState[ uxIndexToNotify ] = taskNOTIFICATION_RECEIVED;
@ -5245,7 +5245,7 @@ TickType_t uxTaskResetEventItemValue( void )
} }
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus ); portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
} }
#endif /* configUSE_TASK_NOTIFICATIONS */ #endif /* configUSE_TASK_NOTIFICATIONS */