mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 05:21:59 -04:00
Change the critical section handling (Fujitsu 32bit port).
This commit is contained in:
parent
eb64d935dc
commit
7e5450acd1
|
@ -51,6 +51,10 @@ any details of its type. */
|
||||||
typedef void tskTCB;
|
typedef void tskTCB;
|
||||||
extern volatile tskTCB * volatile pxCurrentTCB;
|
extern volatile tskTCB * volatile pxCurrentTCB;
|
||||||
|
|
||||||
|
/* Constants required to handle critical sections. */
|
||||||
|
#define portNO_CRITICAL_NESTING ( ( unsigned portBASE_TYPE ) 0 )
|
||||||
|
volatile unsigned portLONG ulCriticalNesting = 9999UL;
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
|
@ -64,6 +68,10 @@ extern volatile tskTCB * volatile pxCurrentTCB;
|
||||||
ST MDH, @-R15 ;Store MDH
|
ST MDH, @-R15 ;Store MDH
|
||||||
ST MDL, @-R15 ;Store MDL
|
ST MDL, @-R15 ;Store MDL
|
||||||
|
|
||||||
|
LDI #_ulCriticalNesting, R0 ;Get the address of the critical nesting counter
|
||||||
|
LD @R0, R0 ;Get the value of the critical nesting counter
|
||||||
|
ST R0, @-R15 ;Store the critical nesting value to the user stack.
|
||||||
|
|
||||||
ANDCCR #0xDF ;Switch back to system stack
|
ANDCCR #0xDF ;Switch back to system stack
|
||||||
LD @R15+,R0 ;Store PC to R0
|
LD @R15+,R0 ;Store PC to R0
|
||||||
ORCCR #0x20 ;Switch to user stack
|
ORCCR #0x20 ;Switch to user stack
|
||||||
|
@ -98,6 +106,10 @@ extern volatile tskTCB * volatile pxCurrentTCB;
|
||||||
|
|
||||||
ORCCR #0x20 ;Switch back to retreive the remaining context
|
ORCCR #0x20 ;Switch back to retreive the remaining context
|
||||||
|
|
||||||
|
LDI #_ulCriticalNesting, R0 ;Get the address of the critical nesting counter
|
||||||
|
LD @R15+, R1 ;Get the saved critical nesting value
|
||||||
|
ST R1, @R0 ;Save the critical nesting value into the ulCriticalNesting variable
|
||||||
|
|
||||||
LD @R15+, MDL ;Restore MDL
|
LD @R15+, MDL ;Restore MDL
|
||||||
LD @R15+, MDH ;Restore MDH
|
LD @R15+, MDH ;Restore MDH
|
||||||
LDM1 (R14,R13,R12,R11,R10,R9,R8) ;Restore R14-R8
|
LDM1 (R14,R13,R12,R11,R10,R9,R8) ;Restore R14-R8
|
||||||
|
@ -124,8 +136,6 @@ static void prvSetupTimerInterrupt( void );
|
||||||
*/
|
*/
|
||||||
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
||||||
{
|
{
|
||||||
unsigned portSHORT usAddress;
|
|
||||||
|
|
||||||
/* Place a few bytes of known values on the bottom of the stack.
|
/* Place a few bytes of known values on the bottom of the stack.
|
||||||
This is just useful for debugging. */
|
This is just useful for debugging. */
|
||||||
|
|
||||||
|
@ -185,8 +195,13 @@ unsigned portSHORT usAddress;
|
||||||
*pxTopOfStack = ( portSTACK_TYPE ) 0x22220000; /* MDL */
|
*pxTopOfStack = ( portSTACK_TYPE ) 0x22220000; /* MDL */
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
usAddress = ( unsigned portSHORT ) pxCode;
|
/* The task starts with its ulCriticalNesting variable set to 0, interrupts
|
||||||
*pxTopOfStack = ( portSTACK_TYPE ) usAddress ; /* PC */
|
being enabled. */
|
||||||
|
*pxTopOfStack = portNO_CRITICAL_NESTING;
|
||||||
|
pxTopOfStack--;
|
||||||
|
|
||||||
|
/* The start of the task code. */
|
||||||
|
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
|
||||||
pxTopOfStack--;
|
pxTopOfStack--;
|
||||||
|
|
||||||
/* PS - User Mode, USP, ILM=31, Interrupts enabled */
|
/* PS - User Mode, USP, ILM=31, Interrupts enabled */
|
||||||
|
@ -351,3 +366,31 @@ const unsigned portSHORT usReloadValue = ( unsigned portSHORT ) ( ( ( configPER_
|
||||||
RETI
|
RETI
|
||||||
|
|
||||||
#pragma endasm
|
#pragma endasm
|
||||||
|
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortEnterCritical( void )
|
||||||
|
{
|
||||||
|
/* Disable interrupts */
|
||||||
|
portDISABLE_INTERRUPTS();
|
||||||
|
|
||||||
|
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||||
|
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||||
|
portENTER_CRITICAL() has been called. */
|
||||||
|
ulCriticalNesting++;
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
|
void vPortExitCritical( void )
|
||||||
|
{
|
||||||
|
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||||
|
{
|
||||||
|
ulCriticalNesting--;
|
||||||
|
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||||
|
{
|
||||||
|
/* Enable all interrupt/exception. */
|
||||||
|
portENABLE_INTERRUPTS();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/*-----------------------------------------------------------*/
|
||||||
|
|
|
@ -59,7 +59,7 @@
|
||||||
#define portDOUBLE double
|
#define portDOUBLE double
|
||||||
#define portLONG long
|
#define portLONG long
|
||||||
#define portSHORT int
|
#define portSHORT int
|
||||||
#define portSTACK_TYPE unsigned portSHORT
|
#define portSTACK_TYPE unsigned portLONG
|
||||||
#define portBASE_TYPE long
|
#define portBASE_TYPE long
|
||||||
|
|
||||||
/* This is required since SOFTUNE doesn't support inline directive as is. */
|
/* This is required since SOFTUNE doesn't support inline directive as is. */
|
||||||
|
@ -75,19 +75,11 @@
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Critical section management. */
|
/* Critical section management. */
|
||||||
|
void vPortEnterCritical( void );
|
||||||
|
void vPortExitCritical( void );
|
||||||
#define portENTER_CRITICAL() \
|
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||||
__asm(" ST PS,@-R15 "); \
|
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||||
__asm(" ANDCCR #0xef "); \
|
|
||||||
|
|
||||||
|
|
||||||
#define portEXIT_CRITICAL() \
|
|
||||||
__asm(" LD @R15+,PS "); \
|
|
||||||
|
|
||||||
|
|
||||||
#define portDISABLE_INTERRUPTS() __DI();
|
#define portDISABLE_INTERRUPTS() __DI();
|
||||||
|
|
||||||
#define portENABLE_INTERRUPTS() __EI();
|
#define portENABLE_INTERRUPTS() __EI();
|
||||||
|
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
@ -102,8 +94,8 @@
|
||||||
/* portYIELD() uses SW interrupt */
|
/* portYIELD() uses SW interrupt */
|
||||||
#define portYIELD() __asm( " INT #40H " );
|
#define portYIELD() __asm( " INT #40H " );
|
||||||
|
|
||||||
/* portYIELDFromISR() uses delayed interrupt */
|
/* portYIELD_FROM_ISR() uses delayed interrupt */
|
||||||
#define portYIELDFromISR() DICR_DLYI = 1;
|
#define portYIELD_FROM_ISR() DICR_DLYI = 1
|
||||||
/*-----------------------------------------------------------*/
|
/*-----------------------------------------------------------*/
|
||||||
|
|
||||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||||
|
|
Loading…
Reference in a new issue