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Add support for 16 MPU regions to Cortex-M4 MPU ports (#96)

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ARMv7-M supports 8 or 16 MPU regions. FreeRTOS Cortex-M4 MPU ports so
far assumed 8 regions. This change adds support for 16 MPU regions. The
hardware with 16 MPU regions must define configTOTAL_MPU_REGIONS to 16
in their FreeRTOSConfig.h.

If left undefined, it defaults to 8 for backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
Gaurav-Aggarwal-AWS 2020-07-24 07:47:41 -07:00 • committed by GitHub
parent 367faab135
commit 7dd6b76011
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GPG key ID: 4AEE18F83AFDEB23
7 changed files with 167 additions and 98 deletions
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38
portable/IAR/ARM_CM4F_MPU/portasm.s
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@ -91,10 +91,23 @@ xPortPendSVHandler:
/* Region Base Address register. */
ldr r2, =0xe000ed9c
/* Read 4 sets of MPU registers. */
/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
ldmia r1!, {r4-r11}
/* Write 4 sets of MPU registers. */
stmia r2!, {r4-r11}
/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r2, {r4-r11}
#ifdef configTOTAL_MPU_REGIONS
#if ( configTOTAL_MPU_REGIONS == 16 )
/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
ldmia r1!, {r4-r11}
/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
stmia r2, {r4-r11}
/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
ldmia r1!, {r4-r11}
/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
stmia r2, {r4-r11}
#endif /* configTOTAL_MPU_REGIONS == 16. */
#endif /* configTOTAL_MPU_REGIONS */
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
ldr r3, [r2] /* Read the value of MPU_CTRL. */
@ -178,10 +191,23 @@ vPortRestoreContextOfFirstTask:
/* Region Base Address register. */
ldr r2, =0xe000ed9c
/* Read 4 sets of MPU registers. */
/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
ldmia r1!, {r4-r11}
/* Write 4 sets of MPU registers. */
stmia r2!, {r4-r11}
/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r2, {r4-r11}
#ifdef configTOTAL_MPU_REGIONS
#if ( configTOTAL_MPU_REGIONS == 16 )
/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
ldmia r1!, {r4-r11}
/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
stmia r2, {r4-r11}
/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
ldmia r1!, {r4-r11}
/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
stmia r2, {r4-r11}
#endif /* configTOTAL_MPU_REGIONS == 16. */
#endif /* configTOTAL_MPU_REGIONS */
ldr r2, =0xe000ed94 /* MPU_CTRL register. */
ldr r3, [r2] /* Read the value of MPU_CTRL. */