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Correct PLL setting for the defined configCPU_CLOCK_HZ setting.

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This commit is contained in:
Richard Barry 2008-06-21 17:35:41 +00:00
parent 1e83961601
commit 7d034a24be
1 changed files with 3 additions and 3 deletions
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6
Demo/ARM7_LPC2129_IAR/main.c
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@ -112,7 +112,7 @@
#define mainRX_ENABLE ( ( unsigned portLONG ) 0x0004 ) #define mainRX_ENABLE ( ( unsigned portLONG ) 0x0004 )
/* Constants to setup the PLL. */ /* Constants to setup the PLL. */
#define mainPLL_MUL_4 ( ( unsigned portCHAR ) 0x0003 ) #define mainPLL_MUL_5 ( ( unsigned portCHAR ) 0x0004 )
#define mainPLL_DIV_1 ( ( unsigned portCHAR ) 0x0000 ) #define mainPLL_DIV_1 ( ( unsigned portCHAR ) 0x0000 )
#define mainPLL_ENABLE ( ( unsigned portCHAR ) 0x0001 ) #define mainPLL_ENABLE ( ( unsigned portCHAR ) 0x0001 )
#define mainPLL_CONNECT ( ( unsigned portCHAR ) 0x0003 ) #define mainPLL_CONNECT ( ( unsigned portCHAR ) 0x0003 )
@ -188,8 +188,8 @@ void main( void )
static void prvSetupHardware( void ) static void prvSetupHardware( void )
{ {
/* Setup the PLL to multiply the XTAL input by 4. */ /* Setup the PLL to multiply the XTAL input by 5. */
PLLCFG = ( mainPLL_MUL_4 | mainPLL_DIV_1 ); PLLCFG = ( mainPLL_MUL_5 | mainPLL_DIV_1 );
/* Activate the PLL by turning it on then feeding the correct sequence of /* Activate the PLL by turning it on then feeding the correct sequence of
bytes. */ bytes. */