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Enable building the GCC Cortex-R5 port without an FPU (#586)
* Ensure configUSE_TASK_FPU_SUPPORT option is set correctly If one does enable the FPU of the Cortex-R5 processor, then the GCC compiler will define the macro __ARM_FP. This can be used to ensure, that the configUSE_TASK_FPU_SUPPORT is set accordingly. * Enable the implementation of vPortTaskUsesFPU only if configUSE_TASK_FPU_SUPPORT is set to 1 * Remove error case in pxPortInitialiseStack The case of configUSE_TASK_FPU_SUPPORT is 0 is now handled * Enable access to FPU registers only if FPU is enabled * Make minor formating changes * Format ARM Cortex-R5 port * Address review comments from @ChristosZosi * Minor code review suggestions Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Christos Zosimidis <christos.zosimidis@gmail.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
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3 changed files with 380 additions and 257 deletions
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@ -45,7 +45,10 @@
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.extern vTaskSwitchContext
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.extern vApplicationIRQHandler
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.extern ulPortInterruptNesting
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#if defined( __ARM_FP )
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.extern ulPortTaskHasFPUContext
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#endif /* __ARM_FP */
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.global FreeRTOS_IRQ_Handler
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.global FreeRTOS_SWI_Handler
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@ -64,20 +67,21 @@
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LDR R1, [R2]
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PUSH {R1}
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/* Does the task have a floating point context that needs saving? If
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ulPortTaskHasFPUContext is 0 then no. */
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LDR R2, ulPortTaskHasFPUContextConst
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LDR R3, [R2]
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CMP R3, #0
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#if defined( __ARM_FP )
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/* Does the task have a floating point context that needs saving? If
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ulPortTaskHasFPUContext is 0 then no. */
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LDR R2, ulPortTaskHasFPUContextConst
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LDR R3, [R2]
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CMP R3, #0
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/* Save the floating point context, if any. */
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FMRXNE R1, FPSCR
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VPUSHNE {D0-D15}
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/*VPUSHNE {D16-D31}*/
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PUSHNE {R1}
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/* Save the floating point context, if any. */
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FMRXNE R1, FPSCR
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VPUSHNE {D0-D15}
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PUSHNE {R1}
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/* Save ulPortTaskHasFPUContext itself. */
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PUSH {R3}
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/* Save ulPortTaskHasFPUContext itself. */
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PUSH {R3}
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#endif /* __ARM_FP */
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/* Save the stack pointer in the TCB. */
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LDR R0, pxCurrentTCBConst
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@ -95,18 +99,21 @@
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LDR R1, [R0]
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LDR SP, [R1]
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/* Is there a floating point context to restore? If the restored
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ulPortTaskHasFPUContext is zero then no. */
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LDR R0, ulPortTaskHasFPUContextConst
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POP {R1}
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STR R1, [R0]
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CMP R1, #0
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#if defined( __ARM_FP )
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/*
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* Is there a floating point context to restore? If the restored
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* ulPortTaskHasFPUContext is zero then no.
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*/
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LDR R0, ulPortTaskHasFPUContextConst
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POP {R1}
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STR R1, [R0]
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CMP R1, #0
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/* Restore the floating point context, if any. */
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POPNE {R0}
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/*VPOPNE {D16-D31}*/
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VPOPNE {D0-D15}
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VMSRNE FPSCR, R0
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/* Restore the floating point context, if any. */
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POPNE {R0}
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VPOPNE {D0-D15}
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VMSRNE FPSCR, R0
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#endif /* __ARM_FP */
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/* Restore the critical section nesting depth. */
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LDR R0, ulCriticalNestingConst
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@ -132,8 +139,6 @@
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.endm
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/******************************************************************************
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* SVC handler is used to start the scheduler.
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*****************************************************************************/
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@ -279,22 +284,25 @@ switch_before_exit:
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* FPU registers to be saved on interrupt entry their IRQ handler must be
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* called vApplicationIRQHandler().
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*****************************************************************************/
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.align 4
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.weak vApplicationIRQHandler
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.type vApplicationIRQHandler, %function
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vApplicationIRQHandler:
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PUSH {LR}
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FMRX R1, FPSCR
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VPUSH {D0-D15}
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PUSH {R1}
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LDR r1, vApplicationFPUSafeIRQHandlerConst
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BLX r1
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#if defined( __ARM_FP )
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FMRX R1, FPSCR
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VPUSH {D0-D15}
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PUSH {R1}
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POP {R0}
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VPOP {D0-D15}
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VMSR FPSCR, R0
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LDR r1, vApplicationFPUSafeIRQHandlerConst
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BLX r1
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POP {R0}
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VPOP {D0-D15}
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VMSR FPSCR, R0
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#endif /* __ARM_FP */
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POP {PC}
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@ -303,11 +311,15 @@ ulICCEOIRConst: .word ulICCEOIR
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ulICCPMRConst: .word ulICCPMR
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pxCurrentTCBConst: .word pxCurrentTCB
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ulCriticalNestingConst: .word ulCriticalNesting
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ulPortTaskHasFPUContextConst: .word ulPortTaskHasFPUContext
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#if defined( __ARM_FP )
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ulPortTaskHasFPUContextConst: .word ulPortTaskHasFPUContext
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vApplicationFPUSafeIRQHandlerConst: .word vApplicationFPUSafeIRQHandler
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#endif /* __ARM_FP */
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ulMaxAPIPriorityMaskConst: .word ulMaxAPIPriorityMask
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vTaskSwitchContextConst: .word vTaskSwitchContext
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vApplicationIRQHandlerConst: .word vApplicationIRQHandler
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ulPortInterruptNestingConst: .word ulPortInterruptNesting
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vApplicationFPUSafeIRQHandlerConst: .word vApplicationFPUSafeIRQHandler
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.end
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