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ARMv8.1-M: Add task dedicated PAC key support (#1195)
armv8.1-m: Add task dedicated PAC key To harden the security, each task is assigned a dedicated PAC key, so that attackers needs to guess the all the tasks' PAC keys right to exploit the system using Return Oriented Programming. The kernel is now updated to support the following: * A PAC key set with a random number generated and is saved in the task's context when a task is created. * As part of scheduling, the task's PAC key is stored/restored to/from the task's context when a task is unscheduled/scheduled from/to run. stack-overflow-check: Introduce portGET_CURRENT_TOP_OF_STACK macro When MPU wrapper v2 is used, the task's context is stored in TCB and `pxTopOfStack`` member of TCB points to the context location in TCB. We, therefore, need to read PSP to find the task's current top of stack. Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
This commit is contained in:
Ahmed Ismail
GitHub
parent
c38427eea4
commit
78e0cc778a
87 changed files with 6662 additions and 3530 deletions
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@ -77,16 +77,16 @@
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" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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" \n"
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" movs r3, #8 \n" /* r3 = 8. */
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" str r3, [r1] \n" /* Program RNR = 8. */
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" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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" movs r3, #12 \n" /* r3 = 12. */
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" str r3, [r1] \n" /* Program RNR = 12. */
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" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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#endif /* configTOTAL_MPU_REGIONS == 16 */
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" movs r3, #8 \n" /* r3 = 8. */
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" str r3, [r1] \n" /* Program RNR = 8. */
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" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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" movs r3, #12 \n" /* r3 = 12. */
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" str r3, [r1] \n" /* Program RNR = 12. */
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" ldmia r0!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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#endif /* configTOTAL_MPU_REGIONS == 16 */
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" \n"
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" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
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@ -100,6 +100,14 @@
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" ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */
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" \n"
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" restore_special_regs_first_task: \n"
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#if ( configENABLE_PAC == 1 )
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" ldmdb r2!, {r3-r6} \n" /* Read task's dedicated PAC key from the task's context. */
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" msr PAC_KEY_P_0, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
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" msr PAC_KEY_P_1, r4 \n"
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" msr PAC_KEY_P_2, r5 \n"
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" msr PAC_KEY_P_3, r6 \n"
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" clrm {r3-r6} \n" /* Clear r3-r6. */
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#endif /* configENABLE_PAC */
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" ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
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" msr psp, r3 \n"
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" msr psplim, r4 \n"
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@ -132,6 +140,15 @@
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" ldr r3, [r2] \n" /* Read pxCurrentTCB. */
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" ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
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" \n"
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#if ( configENABLE_PAC == 1 )
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" ldmia r0!, {r1-r4} \n" /* Read task's dedicated PAC key from stack. */
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" msr PAC_KEY_P_3, r1 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
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" msr PAC_KEY_P_2, r2 \n"
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" msr PAC_KEY_P_1, r3 \n"
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" msr PAC_KEY_P_0, r4 \n"
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" clrm {r1-r4} \n" /* Clear r1-r4. */
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#endif /* configENABLE_PAC */
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" \n"
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" ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
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" ldr r4, =xSecureContext \n"
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" str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */
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@ -280,17 +297,15 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
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" \n"
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" save_general_regs: \n"
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" mrs r3, psp \n"
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" \n"
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#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
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" add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */
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" tst lr, #0x10 \n"
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" ittt eq \n"
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" vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */
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" vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */
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" vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */
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" sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */
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#endif /* configENABLE_FPU || configENABLE_MVE */
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" \n"
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#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
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" add r3, r3, #0x20 \n" /* Move r3 to location where s0 is saved. */
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" tst lr, #0x10 \n"
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" ittt eq \n"
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" vstmiaeq r2!, {s16-s31} \n" /* Store s16-s31. */
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" vldmiaeq r3, {s0-s16} \n" /* Copy hardware saved FP context into s0-s16. */
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" vstmiaeq r2!, {s0-s16} \n" /* Store hardware saved FP context. */
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" sub r3, r3, #0x20 \n" /* Set r3 back to the location of hardware saved context. */
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#endif /* configENABLE_FPU || configENABLE_MVE */
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" stmia r2!, {r4-r11} \n" /* Store r4-r11. */
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" ldmia r3, {r4-r11} \n" /* Copy the hardware saved context into r4-r11. */
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" stmia r2!, {r4-r11} \n" /* Store the hardware saved context. */
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@ -300,7 +315,15 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
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" mrs r4, psplim \n" /* r4 = PSPLIM. */
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" mrs r5, control \n" /* r5 = CONTROL. */
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" stmia r2!, {r0, r3-r5, lr} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */
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" str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */
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#if ( configENABLE_PAC == 1 )
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" mrs r3, PAC_KEY_P_0 \n" /* Read task's dedicated PAC key from the PAC key registers. */
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" mrs r4, PAC_KEY_P_1 \n"
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" mrs r5, PAC_KEY_P_2 \n"
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" mrs r6, PAC_KEY_P_3 \n"
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" stmia r2!, {r3-r6} \n" /* Store the task's dedicated PAC key on the task's context. */
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" clrm {r3-r6} \n" /* Clear r3-r6. */
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#endif /* configENABLE_PAC */
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" str r2, [r1] \n" /* Save the location from where the context should be restored as the first member of TCB. */
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" \n"
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" select_next_task: \n"
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" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
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@ -335,16 +358,16 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
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" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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" \n"
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" movs r3, #8 \n" /* r3 = 8. */
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" str r3, [r1] \n" /* Program RNR = 8. */
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" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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" movs r3, #12 \n" /* r3 = 12. */
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" str r3, [r1] \n" /* Program RNR = 12. */
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" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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#endif /* configTOTAL_MPU_REGIONS == 16 */
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#if ( configTOTAL_MPU_REGIONS == 16 )
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" movs r3, #8 \n" /* r3 = 8. */
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" str r3, [r1] \n" /* Program RNR = 8. */
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" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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" movs r3, #12 \n" /* r3 = 12. */
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" str r3, [r1] \n" /* Program RNR = 12. */
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" ldmia r0!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */
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" stmia r2, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */
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#endif /* configTOTAL_MPU_REGIONS == 16 */
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" \n"
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" ldr r1, =0xe000ed94 \n" /* r1 = 0xe000ed94 [Location of MPU_CTRL]. */
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" ldr r2, [r1] \n" /* Read the value of MPU_CTRL. */
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@ -358,6 +381,14 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
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" ldr r2, [r1] \n" /* r2 = Location of saved context in TCB. */
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" \n"
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" restore_special_regs: \n"
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#if ( configENABLE_PAC == 1 )
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" ldmdb r2!, {r3-r6} \n" /* Read task's dedicated PAC key from the task's context. */
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" msr PAC_KEY_P_0, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
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" msr PAC_KEY_P_1, r4 \n"
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" msr PAC_KEY_P_2, r5 \n"
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" msr PAC_KEY_P_3, r6 \n"
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" clrm {r3-r6} \n" /* Clear r3-r6. */
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#endif /* configENABLE_PAC */
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" ldmdb r2!, {r0, r3-r5, lr} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, LR restored. */
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" msr psp, r3 \n"
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" msr psplim, r4 \n"
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@ -380,13 +411,13 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
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" ldmdb r2!, {r4-r11} \n" /* r4-r11 contain hardware saved context. */
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" stmia r3!, {r4-r11} \n" /* Copy the hardware saved context on the task stack. */
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" ldmdb r2!, {r4-r11} \n" /* r4-r11 restored. */
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#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
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" tst lr, #0x10 \n"
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" ittt eq \n"
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" vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */
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" vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */
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" vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */
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#endif /* configENABLE_FPU || configENABLE_MVE */
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#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
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" tst lr, #0x10 \n"
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" ittt eq \n"
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" vldmdbeq r2!, {s0-s16} \n" /* s0-s16 contain hardware saved FP context. */
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" vstmiaeq r3!, {s0-s16} \n" /* Copy hardware saved FP context on the task stack. */
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" vldmdbeq r2!, {s16-s31} \n" /* Restore s16-s31. */
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#endif /* configENABLE_FPU || configENABLE_MVE */
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" \n"
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" restore_context_done: \n"
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" str r2, [r1] \n" /* Save the location where the context should be saved next as the first member of TCB. */
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@ -401,89 +432,99 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
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{
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__asm volatile
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(
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" .syntax unified \n"
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" .extern SecureContext_SaveContext \n"
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" .extern SecureContext_LoadContext \n"
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" \n"
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" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
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" ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
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" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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" ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
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" mrs r2, psp \n" /* Read PSP in r2. */
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" \n"
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" cbz r0, save_ns_context \n" /* No secure context to save. */
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" push {r0-r2, r14} \n"
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" bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
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" pop {r0-r3} \n" /* LR is now in r3. */
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" mov lr, r3 \n" /* LR = r3. */
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" lsls r1, r3, #25 \n" /* r1 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
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" bpl save_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
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" \n"
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" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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" ldr r1, [r3] \n" /* Read pxCurrentTCB.*/
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" subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */
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" str r2, [r1] \n" /* Save the new top of stack in TCB. */
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" mrs r1, psplim \n" /* r1 = PSPLIM. */
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" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */
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" stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
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" b select_next_task \n"
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" \n"
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" save_ns_context: \n"
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" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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" ldr r1, [r3] \n" /* Read pxCurrentTCB. */
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#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
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" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
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" it eq \n"
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" vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */
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#endif /* configENABLE_FPU || configENABLE_MVE */
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" subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
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" str r2, [r1] \n" /* Save the new top of stack in TCB. */
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" adds r2, r2, #12 \n" /* r2 = r2 + 12. */
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" stm r2, {r4-r11} \n" /* Store the registers that are not saved automatically. */
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" mrs r1, psplim \n" /* r1 = PSPLIM. */
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" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */
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" subs r2, r2, #12 \n" /* r2 = r2 - 12. */
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" stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
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" \n"
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" select_next_task: \n"
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" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
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" msr basepri, r0 \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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" dsb \n"
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" isb \n"
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" bl vTaskSwitchContext \n"
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" mov r0, #0 \n" /* r0 = 0. */
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" msr basepri, r0 \n" /* Enable interrupts. */
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" \n"
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" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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" ldr r1, [r3] \n" /* Read pxCurrentTCB. */
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" ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
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" \n"
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" ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */
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" msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */
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" mov lr, r4 \n" /* LR = r4. */
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" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
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" str r0, [r3] \n" /* Restore the task's xSecureContext. */
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" cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */
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" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
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" ldr r1, [r3] \n" /* Read pxCurrentTCB. */
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" push {r2, r4} \n"
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" bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
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" pop {r2, r4} \n"
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" mov lr, r4 \n" /* LR = r4. */
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" lsls r1, r4, #25 \n" /* r1 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
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" bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r1 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
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" msr psp, r2 \n" /* Remember the new top of stack for the task. */
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" bx lr \n"
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" \n"
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" restore_ns_context: \n"
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" ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */
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#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
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" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
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" it eq \n"
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" vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */
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#endif /* configENABLE_FPU || configENABLE_MVE */
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" msr psp, r2 \n" /* Remember the new top of stack for the task. */
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" bx lr \n"
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" .syntax unified \n"
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" .extern SecureContext_SaveContext \n"
|
||||
" .extern SecureContext_LoadContext \n"
|
||||
" \n"
|
||||
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" ldr r0, [r3] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n" /* Read pxCurrentTCB - Value of pxCurrentTCB must be in r1 as it is used as a parameter later. */
|
||||
" mrs r2, psp \n" /* Read PSP in r2. */
|
||||
" \n"
|
||||
" cbz r0, save_ns_context \n" /* No secure context to save. */
|
||||
" save_s_context: \n"
|
||||
" push {r0-r2, lr} \n"
|
||||
" bl SecureContext_SaveContext \n" /* Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r0-r2, lr} \n"
|
||||
" \n"
|
||||
" save_ns_context: \n"
|
||||
" mov r3, lr \n" /* r3 = LR (EXC_RETURN). */
|
||||
" lsls r3, r3, #25 \n" /* r3 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bmi save_special_regs \n" /* If r3 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used. */
|
||||
" \n"
|
||||
" save_general_regs: \n"
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
" it eq \n"
|
||||
" vstmdbeq r2!, {s16-s31} \n" /* Store the additional FP context registers which are not saved automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" stmdb r2!, {r4-r11} \n" /* Store the registers that are not saved automatically. */
|
||||
" \n"
|
||||
" save_special_regs: \n"
|
||||
" mrs r3, psplim \n" /* r3 = PSPLIM. */
|
||||
" stmdb r2!, {r0, r3, lr} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" mrs r3, PAC_KEY_P_3 \n" /* Read task's dedicated PAC key from the PAC key registers. */
|
||||
" mrs r4, PAC_KEY_P_2 \n"
|
||||
" mrs r5, PAC_KEY_P_1 \n"
|
||||
" mrs r6, PAC_KEY_P_0 \n"
|
||||
" stmdb r2!, {r3-r6} \n" /* Store the task's dedicated PAC key on the stack. */
|
||||
" clrm {r3-r6} \n" /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" \n"
|
||||
" str r2, [r1] \n" /* Save the new top of stack in TCB. */
|
||||
" \n"
|
||||
" select_next_task: \n"
|
||||
" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
|
||||
" msr basepri, r0 \n" /* Disable interrupts up to configMAX_SYSCALL_INTERRUPT_PRIORITY. */
|
||||
" dsb \n"
|
||||
" isb \n"
|
||||
" bl vTaskSwitchContext \n"
|
||||
" mov r0, #0 \n" /* r0 = 0. */
|
||||
" msr basepri, r0 \n" /* Enable interrupts. */
|
||||
" \n"
|
||||
" restore_context: \n"
|
||||
" ldr r3, =pxCurrentTCB \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
|
||||
" ldr r1, [r3] \n" /* Read pxCurrentTCB. */
|
||||
" ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */
|
||||
" \n"
|
||||
" restore_special_regs: \n"
|
||||
#if ( configENABLE_PAC == 1 )
|
||||
" ldmia r2!, {r3-r6} \n" /* Read task's dedicated PAC key from stack. */
|
||||
" msr PAC_KEY_P_3, r3 \n" /* Write the task's dedicated PAC key to the PAC key registers. */
|
||||
" msr PAC_KEY_P_2, r4 \n"
|
||||
" msr PAC_KEY_P_1, r5 \n"
|
||||
" msr PAC_KEY_P_0, r6 \n"
|
||||
" clrm {r3-r6} \n" /* Clear r3-r6. */
|
||||
#endif /* configENABLE_PAC */
|
||||
" ldmia r2!, {r0, r3, lr} \n" /* Read from stack - r0 = xSecureContext, r3 = PSPLIM and LR restored. */
|
||||
" msr psplim, r3 \n" /* Restore the PSPLIM register value for the task. */
|
||||
" ldr r3, =xSecureContext \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */
|
||||
" str r0, [r3] \n" /* Restore the task's xSecureContext. */
|
||||
" cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */
|
||||
" \n"
|
||||
" restore_s_context: \n"
|
||||
" push {r1-r3, lr} \n"
|
||||
" bl SecureContext_LoadContext \n" /* Restore the secure context. Params are in r0 and r1. r0 = xSecureContext and r1 = pxCurrentTCB. */
|
||||
" pop {r1-r3, lr} \n"
|
||||
" \n"
|
||||
" restore_ns_context: \n"
|
||||
" mov r0, lr \n" /* r0 = LR (EXC_RETURN). */
|
||||
" lsls r0, r0, #25 \n" /* r0 = r0 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
|
||||
" bmi restore_context_done \n" /* r0 < 0 ==> Bit[6] in EXC_RETURN is 1 ==> secure stack was used to store the stack frame. */
|
||||
" \n"
|
||||
" restore_general_regs: \n"
|
||||
" ldmia r2!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */
|
||||
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
|
||||
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the Extended Stack Frame is in use. */
|
||||
" it eq \n"
|
||||
" vldmiaeq r2!, {s16-s31} \n" /* Restore the additional FP context registers which are not restored automatically. */
|
||||
#endif /* configENABLE_FPU || configENABLE_MVE */
|
||||
" \n"
|
||||
" restore_context_done: \n"
|
||||
" msr psp, r2 \n" /* Remember the new top of stack for the task. */
|
||||
" bx lr \n"
|
||||
::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue