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Stubs ready for ColdFire V2 demo.
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Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282_CCM.h
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Demo/ColdFire_MCF5282_Eclipse/RTOSDemo/MCF5282/MCF5282_CCM.h
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/* Coldfire C Header File
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* Copyright Freescale Semiconductor Inc
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* All rights reserved.
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*
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* 2007/03/19 Revision: 0.9
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*/
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#ifndef __MCF5282_CCM_H__
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#define __MCF5282_CCM_H__
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/*********************************************************************
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*
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* Chip Configuration Module (CCM)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_CCM_CCR (*(vuint16*)(&__IPSBAR[0x110004]))
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#define MCF_CCM_RCON (*(vuint16*)(&__IPSBAR[0x110008]))
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#define MCF_CCM_CIR (*(vuint16*)(&__IPSBAR[0x11000A]))
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/* Bit definitions and macros for MCF_CCM_CCR */
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#define MCF_CCM_CCR_BMT(x) (((x)&0x7)<<0)
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#define MCF_CCM_CCR_BMT_65536 (0)
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#define MCF_CCM_CCR_BMT_32768 (0x1)
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#define MCF_CCM_CCR_BMT_16384 (0x2)
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#define MCF_CCM_CCR_BMT_8192 (0x3)
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#define MCF_CCM_CCR_BMT_4096 (0x4)
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#define MCF_CCM_CCR_BMT_2048 (0x5)
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#define MCF_CCM_CCR_BMT_1024 (0x6)
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#define MCF_CCM_CCR_BMT_512 (0x7)
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#define MCF_CCM_CCR_BME (0x8)
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#define MCF_CCM_CCR_PSTEN (0x20)
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#define MCF_CCM_CCR_SZEN (0x40)
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#define MCF_CCM_CCR_MODE(x) (((x)&0x7)<<0x8)
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#define MCF_CCM_CCR_LOAD (0x8000)
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/* Bit definitions and macros for MCF_CCM_RCON */
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#define MCF_CCM_RCON_MODE (0x1)
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#define MCF_CCM_RCON_BOOTSEL (0x4)
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#define MCF_CCM_RCON_BOOTPS(x) (((x)&0x3)<<0x3)
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#define MCF_CCM_RCON_RLOAD (0x20)
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#define MCF_CCM_RCON_RPLLREF (0x40)
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#define MCF_CCM_RCON_RPLLSEL (0x80)
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#define MCF_CCM_RCON_RCSC(x) (((x)&0x3)<<0x8)
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/* Bit definitions and macros for MCF_CCM_CIR */
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#define MCF_CCM_CIR_PRN(x) (((x)&0xFF)<<0)
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#define MCF_CCM_CIR_PIN(x) (((x)&0xFF)<<0x8)
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#endif /* __MCF5282_CCM_H__ */
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