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Changes to core code and port layer:

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+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
This commit is contained in:
Richard Barry 2016-08-16 11:38:58 +00:00
parent bdbf347c22
commit 75ffac21d7
32 changed files with 1196 additions and 215 deletions
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4
FreeRTOS/Source/portable/GCC/ARM_CM3_MPU/portmacro.h
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@ -173,7 +173,7 @@ typedef struct MPU_SETTINGS
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/
@ -246,7 +246,7 @@ not necessary for to use this port. They are defined so the common demo files
/* Set the privilege level to user mode if xRunningPrivileged is false. */
portFORCE_INLINE static void vPortResetPrivilege( BaseType_t xRunningPrivileged )
{
if( xRunningPrivileged != pdTRUE )
if( xRunningPrivileged != pdTRUE )
{
__asm volatile ( " mrs r0, control \n" \
" orr r0, #1 \n" \