Changes to core code and port layer:

+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.

FreeRTOS/Source/portable/CCS/ARM_CM4F/port.c

@@ -299,6 +299,24 @@ BaseType_t xPortStartScheduler( void )
 			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
 		}
 
+		#ifdef __NVIC_PRIO_BITS
+		{
+			/* Check the CMSIS configuration that defines the number of
+			priority bits matches the number of priority bits actually queried
+			from the hardware. */
+			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
+		}
+		#endif
+		
+		#ifdef configPRIO_BITS
+		{
+			/* Check the FreeRTOS configuration that defines the number of
+			priority bits matches the number of priority bits actually queried
+			from the hardware. */
+			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
+		}
+		#endif
+
 		/* Shift the priority group value back to its position within the AIRCR
 		register. */
 		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

FreeRTOS/Source/portable/CCS/ARM_CM4F/portasm.asm

@@ -179,6 +179,12 @@ vPortStartFirstTask: .asmfunc
 	ldr r0, [r0]
 	;/* Set the msp back to the start of the stack. */
 	msr msp, r0
+	;/* Clear the bit that indicates the FPU is in use in case the FPU was used
+	;before the scheduler was started - which would otherwise result in the
+	;unnecessary leaving of space in the SVC stack for lazy saving of FPU
+	;registers. */
+	mov r0, #0
+	msr control, r0
 	;/* Call SVC to start the first task. */
 	cpsie i
 	cpsie f