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Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.

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Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
This commit is contained in:
Richard Barry 2013-09-01 19:53:24 +00:00
parent ed399e801e
commit 73606369c4
9 changed files with 146 additions and 102 deletions
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6
FreeRTOS/Source/portable/IAR/ARM_CM0/port.c
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@ -198,9 +198,9 @@ void vPortExitCritical( void )
void xPortSysTickHandler( void )
{
unsigned long ulDummy;
unsigned long ulPreviousMask;
ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
@ -209,7 +209,7 @@ unsigned long ulDummy;
*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
}
/*-----------------------------------------------------------*/