Make Cortex-M0 set/clear interrupt flag from ISR functions nestable.

Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
This commit is contained in:
Richard Barry 2013-09-01 19:53:24 +00:00
parent ed399e801e
commit 73606369c4
9 changed files with 146 additions and 102 deletions

View file

@ -92,7 +92,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE * pxTopOfStack, pdTASK_COD
pxTopOfStack -= 20;
/* Fill the registers with known values to assist debugging. */
pxTopOfStack[ 16 ] = portKERNEL_INTERRUPT_PRIORITY_LEVEL;
pxTopOfStack[ 16 ] = 0;
pxTopOfStack[ 15 ] = portINITIAL_PSR;
pxTopOfStack[ 14 ] = ( unsigned long ) pxCode;
pxTopOfStack[ 13 ] = 0x00000000UL; /* R15. */
@ -119,10 +119,6 @@ portBASE_TYPE xPortStartScheduler( void )
/* Set-up the timer interrupt. */
prvSetupTimerInterrupt();
/* Enable the TRAP yield. */
irq[ portIRQ_TRAP_YIELD ].ien = 1;
irq[ portIRQ_TRAP_YIELD ].ipl = portKERNEL_INTERRUPT_PRIORITY_LEVEL;
/* Integrated Interrupt Controller: Enable all interrupts. */
ic->ien = 1;
@ -143,7 +139,6 @@ static void prvSetupTimerInterrupt( void )
/* Set the IRQ Handler priority and enable it. */
irq[ IRQ_COUNTER1 ].ien = 1;
irq[ IRQ_COUNTER1 ].ipl = portKERNEL_INTERRUPT_PRIORITY_LEVEL;
}
/*-----------------------------------------------------------*/

View file

@ -69,7 +69,7 @@
extern "C" {
#endif
#include <machine/ic.h>
#include <machine/cpu.h>
/*-----------------------------------------------------------
* Port specific definitions.
@ -106,8 +106,6 @@ extern "C" {
#define portNOP() __asm__ volatile ( "mov r0, r0" )
#define portCRITICAL_NESTING_IN_TCB 1
#define portIRQ_TRAP_YIELD 31
#define portKERNEL_INTERRUPT_PRIORITY_LEVEL 0
#define portSYSTEM_INTERRUPT_PRIORITY_LEVEL 0
/*-----------------------------------------------------------*/
/* Task utilities. */
@ -126,8 +124,8 @@ extern void vTaskExitCritical( void );
/*---------------------------------------------------------------------------*/
/* Critical section management. */
#define portDISABLE_INTERRUPTS() ic->cpl = ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 )
#define portENABLE_INTERRUPTS() ic->cpl = portKERNEL_INTERRUPT_PRIORITY_LEVEL
#define portDISABLE_INTERRUPTS() cpu_int_disable()
#define portENABLE_INTERRUPTS() cpu_int_enable()
/*---------------------------------------------------------------------------*/