mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-12 00:57:44 -04:00
Merge branch 'master' into tabs_eq_sp
This commit is contained in:
commit
71f6fb2440
23 changed files with 4278 additions and 4213 deletions
|
@ -875,7 +875,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
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||||
#if ( configENABLE_MPU == 1 )
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||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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||||
StackType_t * pxEndOfStack,
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||||
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@ -888,6 +888,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
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|||
TaskFunction_t pxCode,
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||||
void * pvParameters ) /* PRIVILEGED_FUNCTION */
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||||
#endif /* configENABLE_MPU */
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||||
/* *INDENT-ON* */
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||||
{
|
||||
/* Simulate the stack frame as it would be created by a context switch
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||||
* interrupt. */
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||||
|
@ -1050,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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|||
{
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||||
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
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||||
int32_t lIndex = 0;
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||||
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||||
#if defined( __ARMCC_VERSION )
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||||
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||||
/* Declaration when these variable are defined in code instead of being
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||||
* exported from linker scripts. */
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||||
extern uint32_t * __privileged_sram_start__;
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||||
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@ -1078,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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|||
* using a separate MPU region. This is needed because privileged
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||||
* SRAM is already protected using an MPU region and ARMv8-M does
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* not allow overlapping MPU regions. */
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if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
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ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
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if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
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( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
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||||
{
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||||
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
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||||
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
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||||
|
|
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@ -1050,7 +1050,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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{
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uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
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int32_t lIndex = 0;
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||||
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||||
#if defined( __ARMCC_VERSION )
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||||
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||||
/* Declaration when these variable are defined in code instead of being
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* exported from linker scripts. */
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extern uint32_t * __privileged_sram_start__;
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@ -1078,8 +1080,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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|||
* using a separate MPU region. This is needed because privileged
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||||
* SRAM is already protected using an MPU region and ARMv8-M does
|
||||
* not allow overlapping MPU regions. */
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||||
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
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||||
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
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if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
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( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
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{
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xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
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xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
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||||
|
|
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@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
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|||
}
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||||
/*-----------------------------------------------------------*/
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||||
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||||
/* *INDENT-OFF* */
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#if ( configENABLE_MPU == 1 )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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StackType_t * pxEndOfStack,
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@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
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|||
TaskFunction_t pxCode,
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||||
void * pvParameters ) /* PRIVILEGED_FUNCTION */
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||||
#endif /* configENABLE_MPU */
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||||
/* *INDENT-ON* */
|
||||
{
|
||||
/* Simulate the stack frame as it would be created by a context switch
|
||||
* interrupt. */
|
||||
|
@ -1050,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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|||
{
|
||||
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
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||||
int32_t lIndex = 0;
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||||
|
||||
#if defined( __ARMCC_VERSION )
|
||||
|
||||
/* Declaration when these variable are defined in code instead of being
|
||||
* exported from linker scripts. */
|
||||
extern uint32_t * __privileged_sram_start__;
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||||
|
@ -1078,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
|||
* using a separate MPU region. This is needed because privileged
|
||||
* SRAM is already protected using an MPU region and ARMv8-M does
|
||||
* not allow overlapping MPU regions. */
|
||||
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
|
||||
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
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||||
if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
|
||||
( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
|
||||
{
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||||
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
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||||
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
|
||||
|
|
|
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
|
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) /* PRIVILEGED_FUNCTION */
|
||||
#endif /* configENABLE_MPU */
|
||||
/* *INDENT-ON* */
|
||||
{
|
||||
/* Simulate the stack frame as it would be created by a context switch
|
||||
* interrupt. */
|
||||
|
@ -1050,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
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|||
{
|
||||
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
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||||
int32_t lIndex = 0;
|
||||
|
||||
#if defined( __ARMCC_VERSION )
|
||||
|
||||
/* Declaration when these variable are defined in code instead of being
|
||||
* exported from linker scripts. */
|
||||
extern uint32_t * __privileged_sram_start__;
|
||||
|
@ -1078,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
|||
* using a separate MPU region. This is needed because privileged
|
||||
* SRAM is already protected using an MPU region and ARMv8-M does
|
||||
* not allow overlapping MPU regions. */
|
||||
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
|
||||
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
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||||
if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
|
||||
( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
|
||||
{
|
||||
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
|
||||
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
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||||
|
|
|
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
|
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) /* PRIVILEGED_FUNCTION */
|
||||
#endif /* configENABLE_MPU */
|
||||
/* *INDENT-ON* */
|
||||
{
|
||||
/* Simulate the stack frame as it would be created by a context switch
|
||||
* interrupt. */
|
||||
|
@ -1050,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
|||
{
|
||||
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
|
||||
int32_t lIndex = 0;
|
||||
|
||||
#if defined( __ARMCC_VERSION )
|
||||
|
||||
/* Declaration when these variable are defined in code instead of being
|
||||
* exported from linker scripts. */
|
||||
extern uint32_t * __privileged_sram_start__;
|
||||
|
@ -1078,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
|||
* using a separate MPU region. This is needed because privileged
|
||||
* SRAM is already protected using an MPU region and ARMv8-M does
|
||||
* not allow overlapping MPU regions. */
|
||||
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
|
||||
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
|
||||
if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
|
||||
( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
|
||||
{
|
||||
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
|
||||
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
|
||||
|
|
|
@ -148,7 +148,8 @@
|
|||
|
||||
|
||||
/* Adding the necessary stuff in order to be able to determine from C code wheter or not the IRQs are enabled at the processor level (not interrupt controller level) */
|
||||
#define GET_CPSR() ({u32 rval = 0U; \
|
||||
#define GET_CPSR() \
|
||||
( { u32 rval = 0U; \
|
||||
__asm__ __volatile__ ( \
|
||||
"mrs %0, cpsr\n"\
|
||||
: "=r" ( rval ) \
|
||||
|
@ -515,7 +516,9 @@ uint32_t ulPortSetInterruptMask( void )
|
|||
* critical section violation just enabled it to happen : A SysTick was waiting to happen, and calling 'portCPU_IRQ_ENABLE' would enable it to occur... Thus triggering a
|
||||
* switch of context while already performing a switch context. */
|
||||
if( !wasIRQDisabled )
|
||||
{
|
||||
portCPU_IRQ_ENABLE();
|
||||
}
|
||||
|
||||
return ulReturn;
|
||||
}
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* We require the address of the pxCurrentTCB variable, but don't want to know
|
||||
any details of its type. */
|
||||
* any details of its type. */
|
||||
typedef void RTOS_TCB_t;
|
||||
extern volatile RTOS_TCB_t * volatile pxCurrentTCB;
|
||||
|
||||
|
@ -170,23 +170,25 @@ static void prvSetupTimerInterrupt(void);
|
|||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
{
|
||||
uint16_t usAddress;
|
||||
|
||||
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
|
||||
|
||||
/* Place a few bytes of known values on the bottom of the stack.
|
||||
This is just useful for debugging. Uncomment if needed. */
|
||||
// *pxTopOfStack = 0x11;
|
||||
// pxTopOfStack--;
|
||||
// *pxTopOfStack = 0x22;
|
||||
// pxTopOfStack--;
|
||||
// *pxTopOfStack = 0x33;
|
||||
// pxTopOfStack--;
|
||||
* This is just useful for debugging. Uncomment if needed. */
|
||||
/* *pxTopOfStack = 0x11; */
|
||||
/* pxTopOfStack--; */
|
||||
/* *pxTopOfStack = 0x22; */
|
||||
/* pxTopOfStack--; */
|
||||
/* *pxTopOfStack = 0x33; */
|
||||
/* pxTopOfStack--; */
|
||||
|
||||
/* The start of the task code will be popped off the stack last, so place
|
||||
it on first. */
|
||||
* it on first. */
|
||||
usAddress = ( uint16_t ) pxCode;
|
||||
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
|
||||
pxTopOfStack--;
|
||||
|
@ -196,9 +198,9 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
|
|||
pxTopOfStack--;
|
||||
|
||||
/* Next simulate the stack as if after a call to portSAVE_CONTEXT().
|
||||
portSAVE_CONTEXT places the flags on the stack immediately after r0
|
||||
to ensure the interrupts get disabled as soon as possible, and so ensuring
|
||||
the stack use is minimal should a context switch interrupt occur. */
|
||||
* portSAVE_CONTEXT places the flags on the stack immediately after r0
|
||||
* to ensure the interrupts get disabled as soon as possible, and so ensuring
|
||||
* the stack use is minimal should a context switch interrupt occur. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = portFLAGS_INT_ENABLED;
|
||||
|
@ -238,7 +240,7 @@ BaseType_t xPortStartScheduler(void)
|
|||
portRESTORE_CONTEXT();
|
||||
|
||||
/* Simulate a function call end as generated by the compiler. We will now
|
||||
jump to the start of the task the context of which we have just restored. */
|
||||
* jump to the start of the task the context of which we have just restored. */
|
||||
asm volatile ( "ret" );
|
||||
|
||||
/* Should not get here. */
|
||||
|
@ -290,7 +292,9 @@ void vPortYieldFromTick(void) __attribute__((naked));
|
|||
void vPortYieldFromTick( void )
|
||||
{
|
||||
portSAVE_CONTEXT();
|
||||
if (xTaskIncrementTick() != pdFALSE) {
|
||||
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
|
||||
|
@ -325,7 +329,7 @@ ISR(TICK_INT_vect, ISR_NAKED)
|
|||
|
||||
asm volatile ( "reti" );
|
||||
}
|
||||
#else
|
||||
#else /* if configUSE_PREEMPTION == 1 */
|
||||
|
||||
/*
|
||||
* Tick ISR for the cooperative scheduler. All this does is increment the
|
||||
|
@ -338,4 +342,4 @@ ISR(TICK_INT_vect)
|
|||
INT_FLAGS = INT_MASK;
|
||||
xTaskIncrementTick();
|
||||
}
|
||||
#endif
|
||||
#endif /* if configUSE_PREEMPTION == 1 */
|
||||
|
|
|
@ -21,7 +21,8 @@
|
|||
#define INT_FLAGS TCB0_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB0.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB0.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -33,7 +34,8 @@
|
|||
#define INT_FLAGS TCB1_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB1.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB1.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -45,7 +47,8 @@
|
|||
#define INT_FLAGS TCB2_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB2.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB2.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -57,7 +60,8 @@
|
|||
#define INT_FLAGS TCB3_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB3.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB3.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -69,7 +73,8 @@
|
|||
#define INT_FLAGS TCB4_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB4.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB4.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -83,20 +88,21 @@
|
|||
|
||||
/* Hertz to period for RTC setup */
|
||||
#define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
|
||||
#define TICK_init() { \
|
||||
while (RTC.STATUS > 0); \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
while( RTC.STATUS > 0 ) {; } \
|
||||
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
|
||||
RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
|
||||
RTC.INTCTRL |= 1 << RTC_OVF_bp; \
|
||||
}
|
||||
|
||||
#else
|
||||
#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
|
||||
#undef TICK_INT_vect
|
||||
#undef INT_FLAGS
|
||||
#undef INT_MASK
|
||||
#undef TICK_init()
|
||||
#error Invalid timer setting.
|
||||
#endif
|
||||
#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -42,7 +42,7 @@
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* We require the address of the pxCurrentTCB variable, but don't want to know
|
||||
any details of its type. */
|
||||
* any details of its type. */
|
||||
typedef void RTOS_TCB_t;
|
||||
extern volatile RTOS_TCB_t * volatile pxCurrentTCB;
|
||||
|
||||
|
@ -166,23 +166,25 @@ static void prvSetupTimerInterrupt(void);
|
|||
/*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters)
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
{
|
||||
uint16_t usAddress;
|
||||
|
||||
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
|
||||
|
||||
/* Place a few bytes of known values on the bottom of the stack.
|
||||
This is just useful for debugging. Uncomment if needed. */
|
||||
// *pxTopOfStack = 0x11;
|
||||
// pxTopOfStack--;
|
||||
// *pxTopOfStack = 0x22;
|
||||
// pxTopOfStack--;
|
||||
// *pxTopOfStack = 0x33;
|
||||
// pxTopOfStack--;
|
||||
* This is just useful for debugging. Uncomment if needed. */
|
||||
/* *pxTopOfStack = 0x11; */
|
||||
/* pxTopOfStack--; */
|
||||
/* *pxTopOfStack = 0x22; */
|
||||
/* pxTopOfStack--; */
|
||||
/* *pxTopOfStack = 0x33; */
|
||||
/* pxTopOfStack--; */
|
||||
|
||||
/* The start of the task code will be popped off the stack last, so place
|
||||
it on first. */
|
||||
* it on first. */
|
||||
usAddress = ( uint16_t ) pxCode;
|
||||
*pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
|
||||
pxTopOfStack--;
|
||||
|
@ -192,9 +194,9 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
|
|||
pxTopOfStack--;
|
||||
|
||||
/* Next simulate the stack as if after a call to portSAVE_CONTEXT().
|
||||
portSAVE_CONTEXT places the flags on the stack immediately after r0
|
||||
to ensure the interrupts get disabled as soon as possible, and so ensuring
|
||||
the stack use is minimal should a context switch interrupt occur. */
|
||||
* portSAVE_CONTEXT places the flags on the stack immediately after r0
|
||||
* to ensure the interrupts get disabled as soon as possible, and so ensuring
|
||||
* the stack use is minimal should a context switch interrupt occur. */
|
||||
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = portFLAGS_INT_ENABLED;
|
||||
|
@ -232,7 +234,7 @@ BaseType_t xPortStartScheduler(void)
|
|||
portRESTORE_CONTEXT();
|
||||
|
||||
/* Simulate a function call end as generated by the compiler. We will now
|
||||
jump to the start of the task the context of which we have just restored. */
|
||||
* jump to the start of the task the context of which we have just restored. */
|
||||
asm volatile ( "ret" );
|
||||
|
||||
/* Should not get here. */
|
||||
|
@ -284,7 +286,9 @@ void vPortYieldFromTick(void) __attribute__((naked));
|
|||
void vPortYieldFromTick( void )
|
||||
{
|
||||
portSAVE_CONTEXT();
|
||||
if (xTaskIncrementTick() != pdFALSE) {
|
||||
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
|
||||
|
@ -319,7 +323,7 @@ ISR(TICK_INT_vect, ISR_NAKED)
|
|||
|
||||
asm volatile ( "reti" );
|
||||
}
|
||||
#else
|
||||
#else /* if configUSE_PREEMPTION == 1 */
|
||||
|
||||
/*
|
||||
* Tick ISR for the cooperative scheduler. All this does is increment the
|
||||
|
@ -332,4 +336,4 @@ ISR(TICK_INT_vect)
|
|||
INT_FLAGS = INT_MASK;
|
||||
xTaskIncrementTick();
|
||||
}
|
||||
#endif
|
||||
#endif /* if configUSE_PREEMPTION == 1 */
|
||||
|
|
|
@ -21,7 +21,8 @@
|
|||
#define INT_FLAGS TCB0_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB0.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB0.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -33,7 +34,8 @@
|
|||
#define INT_FLAGS TCB1_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB1.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB1.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -45,7 +47,8 @@
|
|||
#define INT_FLAGS TCB2_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB2.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB2.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -57,7 +60,8 @@
|
|||
#define INT_FLAGS TCB3_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB3.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB3.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -71,20 +75,21 @@
|
|||
|
||||
/* Hertz to period for RTC setup */
|
||||
#define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
|
||||
#define TICK_init() { \
|
||||
while (RTC.STATUS > 0); \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
while( RTC.STATUS > 0 ) {; } \
|
||||
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
|
||||
RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
|
||||
RTC.INTCTRL |= 1 << RTC_OVF_bp; \
|
||||
}
|
||||
|
||||
#else
|
||||
#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
|
||||
#undef TICK_INT_vect
|
||||
#undef INT_FLAGS
|
||||
#undef INT_MASK
|
||||
#undef TICK_init()
|
||||
#error Invalid timer setting.
|
||||
#endif
|
||||
#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
|
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) /* PRIVILEGED_FUNCTION */
|
||||
#endif /* configENABLE_MPU */
|
||||
/* *INDENT-ON* */
|
||||
{
|
||||
/* Simulate the stack frame as it would be created by a context switch
|
||||
* interrupt. */
|
||||
|
@ -1050,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
|||
{
|
||||
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
|
||||
int32_t lIndex = 0;
|
||||
|
||||
#if defined( __ARMCC_VERSION )
|
||||
|
||||
/* Declaration when these variable are defined in code instead of being
|
||||
* exported from linker scripts. */
|
||||
extern uint32_t * __privileged_sram_start__;
|
||||
|
@ -1078,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
|
|||
* using a separate MPU region. This is needed because privileged
|
||||
* SRAM is already protected using an MPU region and ARMv8-M does
|
||||
* not allow overlapping MPU regions. */
|
||||
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ &&
|
||||
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ )
|
||||
if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
|
||||
( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
|
||||
{
|
||||
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
|
||||
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
|
||||
|
|
|
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
|
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) /* PRIVILEGED_FUNCTION */
|
||||
#endif /* configENABLE_MPU */
|
||||
/* *INDENT-ON* */
|
||||
{
|
||||
/* Simulate the stack frame as it would be created by a context switch
|
||||
* interrupt. */
|
||||
|
|
|
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
|
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) /* PRIVILEGED_FUNCTION */
|
||||
#endif /* configENABLE_MPU */
|
||||
/* *INDENT-ON* */
|
||||
{
|
||||
/* Simulate the stack frame as it would be created by a context switch
|
||||
* interrupt. */
|
||||
|
|
|
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#if ( configENABLE_MPU == 1 )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
StackType_t * pxEndOfStack,
|
||||
|
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
|
|||
TaskFunction_t pxCode,
|
||||
void * pvParameters ) /* PRIVILEGED_FUNCTION */
|
||||
#endif /* configENABLE_MPU */
|
||||
/* *INDENT-ON* */
|
||||
{
|
||||
/* Simulate the stack frame as it would be created by a context switch
|
||||
* interrupt. */
|
||||
|
|
|
@ -117,6 +117,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
* portSAVE_CONTEXT places the flags on the stack immediately after r0
|
||||
* to ensure the interrupts get disabled as soon as possible, and so ensuring
|
||||
* the stack use is minimal should a context switch interrupt occur. */
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = portFLAGS_INT_ENABLED;
|
||||
|
|
|
@ -12,7 +12,8 @@
|
|||
#define INT_FLAGS TCB0_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB0.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB0.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -24,7 +25,8 @@
|
|||
#define INT_FLAGS TCB1_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB1.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB1.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -36,7 +38,8 @@
|
|||
#define INT_FLAGS TCB2_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB2.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB2.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -48,7 +51,8 @@
|
|||
#define INT_FLAGS TCB3_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB3.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB3.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -60,7 +64,8 @@
|
|||
#define INT_FLAGS TCB4_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB4.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB4.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -74,20 +79,21 @@
|
|||
|
||||
/* Hertz to period for RTC setup */
|
||||
#define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
|
||||
#define TICK_init() { \
|
||||
while (RTC.STATUS > 0); \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
while( RTC.STATUS > 0 ) {; } \
|
||||
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
|
||||
RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
|
||||
RTC.INTCTRL |= 1 << RTC_OVF_bp; \
|
||||
}
|
||||
|
||||
#else
|
||||
#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
|
||||
#undef TICK_INT_vect
|
||||
#undef INT_FLAGS
|
||||
#undef INT_MASK
|
||||
#undef TICK_init()
|
||||
#error Invalid timer setting.
|
||||
#endif
|
||||
#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
|
@ -117,6 +117,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
|||
* portSAVE_CONTEXT places the flags on the stack immediately after r0
|
||||
* to ensure the interrupts get disabled as soon as possible, and so ensuring
|
||||
* the stack use is minimal should a context switch interrupt occur. */
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = portFLAGS_INT_ENABLED;
|
||||
|
|
|
@ -12,7 +12,8 @@
|
|||
#define INT_FLAGS TCB0_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB0.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB0.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -24,7 +25,8 @@
|
|||
#define INT_FLAGS TCB1_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB1.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB1.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -36,7 +38,8 @@
|
|||
#define INT_FLAGS TCB2_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB2.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB2.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -48,7 +51,8 @@
|
|||
#define INT_FLAGS TCB3_INTFLAGS
|
||||
#define INT_MASK TCB_CAPT_bm
|
||||
|
||||
#define TICK_init() { \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
|
||||
TCB3.INTCTRL = TCB_CAPT_bm; \
|
||||
TCB3.CTRLA = TCB_ENABLE_bm; \
|
||||
|
@ -62,20 +66,21 @@
|
|||
|
||||
/* Hertz to period for RTC setup */
|
||||
#define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
|
||||
#define TICK_init() { \
|
||||
while (RTC.STATUS > 0); \
|
||||
#define TICK_init() \
|
||||
{ \
|
||||
while( RTC.STATUS > 0 ) {; } \
|
||||
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
|
||||
RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
|
||||
RTC.INTCTRL |= 1 << RTC_OVF_bp; \
|
||||
}
|
||||
|
||||
#else
|
||||
#else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
|
||||
#undef TICK_INT_vect
|
||||
#undef INT_FLAGS
|
||||
#undef INT_MASK
|
||||
#undef TICK_init()
|
||||
#error Invalid timer setting.
|
||||
#endif
|
||||
#endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
|
1
portable/ThirdParty/GCC/ARC_EM_HS/port.c
vendored
1
portable/ThirdParty/GCC/ARC_EM_HS/port.c
vendored
|
@ -40,6 +40,7 @@
|
|||
|
||||
volatile unsigned int ulCriticalNesting = 999UL;
|
||||
volatile unsigned int context_switch_reqflg; /* task context switch request flag in exceptions and interrupts handling */
|
||||
|
||||
/**
|
||||
* \var exc_nest_count
|
||||
* \brief the counter for exc/int processing, =0 no int/exc
|
||||
|
|
2
portable/ThirdParty/GCC/Xtensa_ESP32/port.c
vendored
2
portable/ThirdParty/GCC/Xtensa_ESP32/port.c
vendored
|
@ -153,6 +153,7 @@ void _xt_user_exit( void );
|
|||
/*
|
||||
* Stack initialization
|
||||
*/
|
||||
/* *INDENT-OFF* */
|
||||
#if portUSING_MPU_WRAPPERS
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
|
@ -163,6 +164,7 @@ void _xt_user_exit( void );
|
|||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
{
|
||||
StackType_t * sp, * tp;
|
||||
XtExcFrame * frame;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue