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alfred gedeon 2020-08-17 13:39:28 -07:00 • committed by GitHub
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71
portable/ARMv8M/non_secure/port.c
View file

@ -54,13 +54,13 @@
* on the secure side. The following are the valid configuration seetings: * on the secure side. The following are the valid configuration seetings:
* *
* 1. Run FreeRTOS on the Secure Side: * 1. Run FreeRTOS on the Secure Side:
* configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0 * configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
* *
* 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support: * 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support:
* configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1 * configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1
* *
* 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support: * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
* configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0 * configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
*/ */
#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
@ -611,7 +611,7 @@ static void prvTaskExitError( void )
extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __unprivileged_flash_end__;
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
extern uint32_t * __privileged_sram_end__; extern uint32_t * __privileged_sram_end__;
#else /* if defined( __ARMCC_VERSION ) */ #else /* if defined( __ARMCC_VERSION ) */
/* Declaration when these variable are exported from linker scripts. */ /* Declaration when these variable are exported from linker scripts. */
extern uint32_t __privileged_functions_start__[]; extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[]; extern uint32_t __privileged_functions_end__[];
@ -801,22 +801,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
ulR0 = pulCallerStackAddress[ 0 ]; ulR0 = pulCallerStackAddress[ 0 ];
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
{ {
/* Read the CONTROL register value. */ /* Read the CONTROL register value. */
__asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) );
/* The task that raised the SVC is privileged if Bit[0] /* The task that raised the SVC is privileged if Bit[0]
* in the CONTROL register is 0. */ * in the CONTROL register is 0. */
ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
} }
#else /* if ( configENABLE_MPU == 1 ) */ #else /* if ( configENABLE_MPU == 1 ) */
{ {
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0 ); xSecureContext = SecureContext_AllocateContext( ulR0 );
} }
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
configASSERT( xSecureContext != NULL ); configASSERT( xSecureContext != NULL );
@ -834,21 +834,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
case portSVC_START_SCHEDULER: case portSVC_START_SCHEDULER:
#if ( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
{ {
/* De-prioritize the non-secure exceptions so that the /* De-prioritize the non-secure exceptions so that the
* non-secure pendSV runs at the lowest priority. */ * non-secure pendSV runs at the lowest priority. */
SecureInit_DePrioritizeNSExceptions(); SecureInit_DePrioritizeNSExceptions();
/* Initialize the secure context management system. */ /* Initialize the secure context management system. */
SecureContext_Init(); SecureContext_Init();
} }
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if ( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
{ {
/* Setup the Floating Point Unit (FPU). */ /* Setup the Floating Point Unit (FPU). */
prvSetupFPU(); prvSetupFPU();
} }
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
/* Setup the context of the first task so that the first task starts /* Setup the context of the first task so that the first task starts
@ -875,7 +875,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
@ -886,8 +886,9 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* *INDENT-ON* */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
* interrupt. */ * interrupt. */
@ -1050,7 +1051,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1078,8 +1081,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
@ -1088,7 +1091,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
/* Define the region that allows access to the stack. */ /* Define the region that allows access to the stack. */
ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK; ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
( portMPU_REGION_NON_SHAREABLE ) | ( portMPU_REGION_NON_SHAREABLE ) |

64
portable/GCC/ARM_CM23/non_secure/port.c
View file

@ -611,7 +611,7 @@ static void prvTaskExitError( void )
extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __unprivileged_flash_end__;
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
extern uint32_t * __privileged_sram_end__; extern uint32_t * __privileged_sram_end__;
#else /* if defined( __ARMCC_VERSION ) */ #else /* if defined( __ARMCC_VERSION ) */
/* Declaration when these variable are exported from linker scripts. */ /* Declaration when these variable are exported from linker scripts. */
extern uint32_t __privileged_functions_start__[]; extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[]; extern uint32_t __privileged_functions_end__[];
@ -801,22 +801,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
ulR0 = pulCallerStackAddress[ 0 ]; ulR0 = pulCallerStackAddress[ 0 ];
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
{ {
/* Read the CONTROL register value. */ /* Read the CONTROL register value. */
__asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) );
/* The task that raised the SVC is privileged if Bit[0] /* The task that raised the SVC is privileged if Bit[0]
* in the CONTROL register is 0. */ * in the CONTROL register is 0. */
ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
} }
#else /* if ( configENABLE_MPU == 1 ) */ #else /* if ( configENABLE_MPU == 1 ) */
{ {
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0 ); xSecureContext = SecureContext_AllocateContext( ulR0 );
} }
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
configASSERT( xSecureContext != NULL ); configASSERT( xSecureContext != NULL );
@ -834,21 +834,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
case portSVC_START_SCHEDULER: case portSVC_START_SCHEDULER:
#if ( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
{ {
/* De-prioritize the non-secure exceptions so that the /* De-prioritize the non-secure exceptions so that the
* non-secure pendSV runs at the lowest priority. */ * non-secure pendSV runs at the lowest priority. */
SecureInit_DePrioritizeNSExceptions(); SecureInit_DePrioritizeNSExceptions();
/* Initialize the secure context management system. */ /* Initialize the secure context management system. */
SecureContext_Init(); SecureContext_Init();
} }
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if ( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
{ {
/* Setup the Floating Point Unit (FPU). */ /* Setup the Floating Point Unit (FPU). */
prvSetupFPU(); prvSetupFPU();
} }
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
/* Setup the context of the first task so that the first task starts /* Setup the context of the first task so that the first task starts
@ -881,12 +881,12 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters, void * pvParameters,
BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
#else #else
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
@ -1050,7 +1050,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1078,8 +1080,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
@ -1088,7 +1090,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
/* Define the region that allows access to the stack. */ /* Define the region that allows access to the stack. */
ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK; ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
( portMPU_REGION_NON_SHAREABLE ) | ( portMPU_REGION_NON_SHAREABLE ) |

70
portable/GCC/ARM_CM23_NTZ/non_secure/port.c
View file

@ -54,13 +54,13 @@
* on the secure side. The following are the valid configuration seetings: * on the secure side. The following are the valid configuration seetings:
* *
* 1. Run FreeRTOS on the Secure Side: * 1. Run FreeRTOS on the Secure Side:
* configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0 * configRUN_FREERTOS_SECURE_ONLY = 1 and configENABLE_TRUSTZONE = 0
* *
* 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support: * 2. Run FreeRTOS on the Non-Secure Side with Secure Side function call support:
* configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1 * configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 1
* *
* 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support: * 3. Run FreeRTOS on the Non-Secure Side only i.e. no Secure Side function call support:
* configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0 * configRUN_FREERTOS_SECURE_ONLY = 0 and configENABLE_TRUSTZONE = 0
*/ */
#if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) )
#error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side.
@ -611,7 +611,7 @@ static void prvTaskExitError( void )
extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __unprivileged_flash_end__;
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
extern uint32_t * __privileged_sram_end__; extern uint32_t * __privileged_sram_end__;
#else /* if defined( __ARMCC_VERSION ) */ #else /* if defined( __ARMCC_VERSION ) */
/* Declaration when these variable are exported from linker scripts. */ /* Declaration when these variable are exported from linker scripts. */
extern uint32_t __privileged_functions_start__[]; extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[]; extern uint32_t __privileged_functions_end__[];
@ -801,22 +801,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
ulR0 = pulCallerStackAddress[ 0 ]; ulR0 = pulCallerStackAddress[ 0 ];
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
{ {
/* Read the CONTROL register value. */ /* Read the CONTROL register value. */
__asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) );
/* The task that raised the SVC is privileged if Bit[0] /* The task that raised the SVC is privileged if Bit[0]
* in the CONTROL register is 0. */ * in the CONTROL register is 0. */
ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
} }
#else /* if ( configENABLE_MPU == 1 ) */ #else /* if ( configENABLE_MPU == 1 ) */
{ {
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0 ); xSecureContext = SecureContext_AllocateContext( ulR0 );
} }
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
configASSERT( xSecureContext != NULL ); configASSERT( xSecureContext != NULL );
@ -834,21 +834,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
case portSVC_START_SCHEDULER: case portSVC_START_SCHEDULER:
#if ( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
{ {
/* De-prioritize the non-secure exceptions so that the /* De-prioritize the non-secure exceptions so that the
* non-secure pendSV runs at the lowest priority. */ * non-secure pendSV runs at the lowest priority. */
SecureInit_DePrioritizeNSExceptions(); SecureInit_DePrioritizeNSExceptions();
/* Initialize the secure context management system. */ /* Initialize the secure context management system. */
SecureContext_Init(); SecureContext_Init();
} }
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if ( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
{ {
/* Setup the Floating Point Unit (FPU). */ /* Setup the Floating Point Unit (FPU). */
prvSetupFPU(); prvSetupFPU();
} }
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
/* Setup the context of the first task so that the first task starts /* Setup the context of the first task so that the first task starts
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
@ -886,8 +887,9 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* *INDENT-ON* */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
* interrupt. */ * interrupt. */
@ -1050,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1078,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
@ -1088,7 +1092,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
/* Define the region that allows access to the stack. */ /* Define the region that allows access to the stack. */
ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK; ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
( portMPU_REGION_NON_SHAREABLE ) | ( portMPU_REGION_NON_SHAREABLE ) |

64
portable/GCC/ARM_CM33/non_secure/port.c
View file

@ -611,7 +611,7 @@ static void prvTaskExitError( void )
extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __unprivileged_flash_end__;
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
extern uint32_t * __privileged_sram_end__; extern uint32_t * __privileged_sram_end__;
#else /* if defined( __ARMCC_VERSION ) */ #else /* if defined( __ARMCC_VERSION ) */
/* Declaration when these variable are exported from linker scripts. */ /* Declaration when these variable are exported from linker scripts. */
extern uint32_t __privileged_functions_start__[]; extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[]; extern uint32_t __privileged_functions_end__[];
@ -801,22 +801,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
ulR0 = pulCallerStackAddress[ 0 ]; ulR0 = pulCallerStackAddress[ 0 ];
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
{ {
/* Read the CONTROL register value. */ /* Read the CONTROL register value. */
__asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) );
/* The task that raised the SVC is privileged if Bit[0] /* The task that raised the SVC is privileged if Bit[0]
* in the CONTROL register is 0. */ * in the CONTROL register is 0. */
ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
} }
#else /* if ( configENABLE_MPU == 1 ) */ #else /* if ( configENABLE_MPU == 1 ) */
{ {
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0 ); xSecureContext = SecureContext_AllocateContext( ulR0 );
} }
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
configASSERT( xSecureContext != NULL ); configASSERT( xSecureContext != NULL );
@ -834,21 +834,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
case portSVC_START_SCHEDULER: case portSVC_START_SCHEDULER:
#if ( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
{ {
/* De-prioritize the non-secure exceptions so that the /* De-prioritize the non-secure exceptions so that the
* non-secure pendSV runs at the lowest priority. */ * non-secure pendSV runs at the lowest priority. */
SecureInit_DePrioritizeNSExceptions(); SecureInit_DePrioritizeNSExceptions();
/* Initialize the secure context management system. */ /* Initialize the secure context management system. */
SecureContext_Init(); SecureContext_Init();
} }
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if ( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
{ {
/* Setup the Floating Point Unit (FPU). */ /* Setup the Floating Point Unit (FPU). */
prvSetupFPU(); prvSetupFPU();
} }
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
/* Setup the context of the first task so that the first task starts /* Setup the context of the first task so that the first task starts
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
@ -886,8 +887,9 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* *INDENT-ON* */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
* interrupt. */ * interrupt. */
@ -1050,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1078,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
@ -1088,7 +1092,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
/* Define the region that allows access to the stack. */ /* Define the region that allows access to the stack. */
ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK; ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
( portMPU_REGION_NON_SHAREABLE ) | ( portMPU_REGION_NON_SHAREABLE ) |

62
portable/GCC/ARM_CM33_NTZ/non_secure/port.c
View file

@ -611,7 +611,7 @@ static void prvTaskExitError( void )
extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __unprivileged_flash_end__;
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
extern uint32_t * __privileged_sram_end__; extern uint32_t * __privileged_sram_end__;
#else /* if defined( __ARMCC_VERSION ) */ #else /* if defined( __ARMCC_VERSION ) */
/* Declaration when these variable are exported from linker scripts. */ /* Declaration when these variable are exported from linker scripts. */
extern uint32_t __privileged_functions_start__[]; extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[]; extern uint32_t __privileged_functions_end__[];
@ -801,22 +801,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
ulR0 = pulCallerStackAddress[ 0 ]; ulR0 = pulCallerStackAddress[ 0 ];
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
{ {
/* Read the CONTROL register value. */ /* Read the CONTROL register value. */
__asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) );
/* The task that raised the SVC is privileged if Bit[0] /* The task that raised the SVC is privileged if Bit[0]
* in the CONTROL register is 0. */ * in the CONTROL register is 0. */
ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
} }
#else /* if ( configENABLE_MPU == 1 ) */ #else /* if ( configENABLE_MPU == 1 ) */
{ {
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0 ); xSecureContext = SecureContext_AllocateContext( ulR0 );
} }
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
configASSERT( xSecureContext != NULL ); configASSERT( xSecureContext != NULL );
@ -834,21 +834,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
case portSVC_START_SCHEDULER: case portSVC_START_SCHEDULER:
#if ( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
{ {
/* De-prioritize the non-secure exceptions so that the /* De-prioritize the non-secure exceptions so that the
* non-secure pendSV runs at the lowest priority. */ * non-secure pendSV runs at the lowest priority. */
SecureInit_DePrioritizeNSExceptions(); SecureInit_DePrioritizeNSExceptions();
/* Initialize the secure context management system. */ /* Initialize the secure context management system. */
SecureContext_Init(); SecureContext_Init();
} }
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if ( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
{ {
/* Setup the Floating Point Unit (FPU). */ /* Setup the Floating Point Unit (FPU). */
prvSetupFPU(); prvSetupFPU();
} }
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
/* Setup the context of the first task so that the first task starts /* Setup the context of the first task so that the first task starts
@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* *INDENT-ON* */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
* interrupt. */ * interrupt. */
@ -1050,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1078,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
@ -1088,7 +1092,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
/* Define the region that allows access to the stack. */ /* Define the region that allows access to the stack. */
ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK; ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
( portMPU_REGION_NON_SHAREABLE ) | ( portMPU_REGION_NON_SHAREABLE ) |

24
portable/GCC/ARM_CM4_MPU/port.c
View file

@ -359,14 +359,14 @@ static void prvRestoreContextOfFirstTask( void )
" str r3, [r2] \n"/* Disable MPU. */ " str r3, [r2] \n"/* Disable MPU. */
" \n" " \n"
" ldr r2, =0xe000ed9c \n"/* Region Base Address register. */ " ldr r2, =0xe000ed9c \n"/* Region Base Address register. */
" ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
" stmia r2, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
" \n" " \n"
#if ( portTOTAL_NUM_REGIONS == 16 ) #if ( portTOTAL_NUM_REGIONS == 16 )
" ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
" stmia r2, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
" ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
" stmia r2, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* portTOTAL_NUM_REGIONS == 16. */ #endif /* portTOTAL_NUM_REGIONS == 16. */
" \n" " \n"
" ldr r2, =0xe000ed94 \n"/* MPU_CTRL register. */ " ldr r2, =0xe000ed94 \n"/* MPU_CTRL register. */
@ -583,14 +583,14 @@ void xPortPendSVHandler( void )
" str r3, [r2] \n"/* Disable MPU. */ " str r3, [r2] \n"/* Disable MPU. */
" \n" " \n"
" ldr r2, =0xe000ed9c \n"/* Region Base Address register. */ " ldr r2, =0xe000ed9c \n"/* Region Base Address register. */
" ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
" stmia r2, {r4-r11} \n" /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
" \n" " \n"
#if ( portTOTAL_NUM_REGIONS == 16 ) #if ( portTOTAL_NUM_REGIONS == 16 )
" ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
" stmia r2, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
" ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
" stmia r2, {r4-r11} \n" /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */ " stmia r2, {r4-r11} \n"/* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* portTOTAL_NUM_REGIONS == 16. */ #endif /* portTOTAL_NUM_REGIONS == 16. */
" \n" " \n"
" ldr r2, =0xe000ed94 \n"/* MPU_CTRL register. */ " ldr r2, =0xe000ed94 \n"/* MPU_CTRL register. */

25
portable/GCC/ARM_CR5/port.c
View file

@ -148,17 +148,18 @@
/* Adding the necessary stuff in order to be able to determine from C code wheter or not the IRQs are enabled at the processor level (not interrupt controller level) */ /* Adding the necessary stuff in order to be able to determine from C code wheter or not the IRQs are enabled at the processor level (not interrupt controller level) */
#define GET_CPSR() ({u32 rval = 0U; \ #define GET_CPSR() \
__asm__ __volatile__(\ ( { u32 rval = 0U; \
"mrs %0, cpsr\n"\ __asm__ __volatile__ ( \
: "=r" (rval)\ "mrs %0, cpsr\n"\
);\ : "=r" ( rval ) \
rval;\ ); \
}) rval; \
} )
#define CPSR_IRQ_ENABLE_MASK 0x80U #define CPSR_IRQ_ENABLE_MASK 0x80U
#define IS_IRQ_DISABLED() ({unsigned int val = 0; val = (GET_CPSR() & CPSR_IRQ_ENABLE_MASK) ? 1 : 0; val;}) #define IS_IRQ_DISABLED() ( { unsigned int val = 0; val = ( GET_CPSR() & CPSR_IRQ_ENABLE_MASK ) ? 1 : 0; val; } )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
@ -514,8 +515,10 @@ uint32_t ulPortSetInterruptMask( void )
* against the CPU traping into recursive interrupt was the IRQ Enable bit in the CPSR. By not taking it into acount, the very code that protects the CPU against * against the CPU traping into recursive interrupt was the IRQ Enable bit in the CPSR. By not taking it into acount, the very code that protects the CPU against
* critical section violation just enabled it to happen : A SysTick was waiting to happen, and calling 'portCPU_IRQ_ENABLE' would enable it to occur... Thus triggering a * critical section violation just enabled it to happen : A SysTick was waiting to happen, and calling 'portCPU_IRQ_ENABLE' would enable it to occur... Thus triggering a
* switch of context while already performing a switch context. */ * switch of context while already performing a switch context. */
if(!wasIRQDisabled) if( !wasIRQDisabled )
portCPU_IRQ_ENABLE(); {
portCPU_IRQ_ENABLE();
}
return ulReturn; return ulReturn;
} }

294
portable/GCC/AVR_AVRDx/port.c
View file

@ -33,18 +33,18 @@
#include "task.h" #include "task.h"
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the AVR port. * Implementation of functions defined in portable.h for the AVR port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
/* Start tasks with interrupts enables. */ /* Start tasks with interrupts enables. */
#define portFLAGS_INT_ENABLED ((StackType_t) 0x80) #define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* We require the address of the pxCurrentTCB variable, but don't want to know /* We require the address of the pxCurrentTCB variable, but don't want to know
any details of its type. */ * any details of its type. */
typedef void RTOS_TCB_t; typedef void RTOS_TCB_t;
extern volatile RTOS_TCB_t *volatile pxCurrentTCB; extern volatile RTOS_TCB_t * volatile pxCurrentTCB;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -64,161 +64,163 @@ extern volatile RTOS_TCB_t *volatile pxCurrentTCB;
* so we need not worry about reading/writing to the stack pointer. * so we need not worry about reading/writing to the stack pointer.
*/ */
#define portSAVE_CONTEXT() \ #define portSAVE_CONTEXT() \
asm volatile("push r0 \n\t" \ asm volatile ( "push r0 \n\t" \
"in r0, __SREG__ \n\t" \ "in r0, __SREG__ \n\t" \
"cli \n\t" \ "cli \n\t" \
"push r0 \n\t" \ "push r0 \n\t" \
"in r0, __RAMPZ__ \n\t" \ "in r0, __RAMPZ__ \n\t" \
"push r0 \n\t" \ "push r0 \n\t" \
"push r1 \n\t" \ "push r1 \n\t" \
"clr r1 \n\t" \ "clr r1 \n\t" \
"push r2 \n\t" \ "push r2 \n\t" \
"push r3 \n\t" \ "push r3 \n\t" \
"push r4 \n\t" \ "push r4 \n\t" \
"push r5 \n\t" \ "push r5 \n\t" \
"push r6 \n\t" \ "push r6 \n\t" \
"push r7 \n\t" \ "push r7 \n\t" \
"push r8 \n\t" \ "push r8 \n\t" \
"push r9 \n\t" \ "push r9 \n\t" \
"push r10 \n\t" \ "push r10 \n\t" \
"push r11 \n\t" \ "push r11 \n\t" \
"push r12 \n\t" \ "push r12 \n\t" \
"push r13 \n\t" \ "push r13 \n\t" \
"push r14 \n\t" \ "push r14 \n\t" \
"push r15 \n\t" \ "push r15 \n\t" \
"push r16 \n\t" \ "push r16 \n\t" \
"push r17 \n\t" \ "push r17 \n\t" \
"push r18 \n\t" \ "push r18 \n\t" \
"push r19 \n\t" \ "push r19 \n\t" \
"push r20 \n\t" \ "push r20 \n\t" \
"push r21 \n\t" \ "push r21 \n\t" \
"push r22 \n\t" \ "push r22 \n\t" \
"push r23 \n\t" \ "push r23 \n\t" \
"push r24 \n\t" \ "push r24 \n\t" \
"push r25 \n\t" \ "push r25 \n\t" \
"push r26 \n\t" \ "push r26 \n\t" \
"push r27 \n\t" \ "push r27 \n\t" \
"push r28 \n\t" \ "push r28 \n\t" \
"push r29 \n\t" \ "push r29 \n\t" \
"push r30 \n\t" \ "push r30 \n\t" \
"push r31 \n\t" \ "push r31 \n\t" \
"lds r26, pxCurrentTCB \n\t" \ "lds r26, pxCurrentTCB \n\t" \
"lds r27, pxCurrentTCB + 1 \n\t" \ "lds r27, pxCurrentTCB + 1 \n\t" \
"in r0, __SP_L__ \n\t" \ "in r0, __SP_L__ \n\t" \
"st x+, r0 \n\t" \ "st x+, r0 \n\t" \
"in r0, __SP_H__ \n\t" \ "in r0, __SP_H__ \n\t" \
"st x+, r0 \n\t"); "st x+, r0 \n\t" );
/* /*
* Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during * Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during
* the context save so we can write to the stack pointer. * the context save so we can write to the stack pointer.
*/ */
#define portRESTORE_CONTEXT() \ #define portRESTORE_CONTEXT() \
asm volatile("lds r26, pxCurrentTCB \n\t" \ asm volatile ( "lds r26, pxCurrentTCB \n\t" \
"lds r27, pxCurrentTCB + 1 \n\t" \ "lds r27, pxCurrentTCB + 1 \n\t" \
"ld r28, x+ \n\t" \ "ld r28, x+ \n\t" \
"out __SP_L__, r28 \n\t" \ "out __SP_L__, r28 \n\t" \
"ld r29, x+ \n\t" \ "ld r29, x+ \n\t" \
"out __SP_H__, r29 \n\t" \ "out __SP_H__, r29 \n\t" \
"pop r31 \n\t" \ "pop r31 \n\t" \
"pop r30 \n\t" \ "pop r30 \n\t" \
"pop r29 \n\t" \ "pop r29 \n\t" \
"pop r28 \n\t" \ "pop r28 \n\t" \
"pop r27 \n\t" \ "pop r27 \n\t" \
"pop r26 \n\t" \ "pop r26 \n\t" \
"pop r25 \n\t" \ "pop r25 \n\t" \
"pop r24 \n\t" \ "pop r24 \n\t" \
"pop r23 \n\t" \ "pop r23 \n\t" \
"pop r22 \n\t" \ "pop r22 \n\t" \
"pop r21 \n\t" \ "pop r21 \n\t" \
"pop r20 \n\t" \ "pop r20 \n\t" \
"pop r19 \n\t" \ "pop r19 \n\t" \
"pop r18 \n\t" \ "pop r18 \n\t" \
"pop r17 \n\t" \ "pop r17 \n\t" \
"pop r16 \n\t" \ "pop r16 \n\t" \
"pop r15 \n\t" \ "pop r15 \n\t" \
"pop r14 \n\t" \ "pop r14 \n\t" \
"pop r13 \n\t" \ "pop r13 \n\t" \
"pop r12 \n\t" \ "pop r12 \n\t" \
"pop r11 \n\t" \ "pop r11 \n\t" \
"pop r10 \n\t" \ "pop r10 \n\t" \
"pop r9 \n\t" \ "pop r9 \n\t" \
"pop r8 \n\t" \ "pop r8 \n\t" \
"pop r7 \n\t" \ "pop r7 \n\t" \
"pop r6 \n\t" \ "pop r6 \n\t" \
"pop r5 \n\t" \ "pop r5 \n\t" \
"pop r4 \n\t" \ "pop r4 \n\t" \
"pop r3 \n\t" \ "pop r3 \n\t" \
"pop r2 \n\t" \ "pop r2 \n\t" \
"pop r1 \n\t" \ "pop r1 \n\t" \
"pop r0 \n\t" \ "pop r0 \n\t" \
"out __RAMPZ__, r0 \n\t" \ "out __RAMPZ__, r0 \n\t" \
"pop r0 \n\t" \ "pop r0 \n\t" \
"out __SREG__, r0 \n\t" \ "out __SREG__, r0 \n\t" \
"pop r0 \n\t"); "pop r0 \n\t" );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
* Perform hardware setup to enable ticks from timer. * Perform hardware setup to enable ticks from timer.
*/ */
static void prvSetupTimerInterrupt(void); static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
* See header file for description. * See header file for description.
*/ */
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters) StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
{ {
uint16_t usAddress; uint16_t usAddress;
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */ /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
/* Place a few bytes of known values on the bottom of the stack. /* Place a few bytes of known values on the bottom of the stack.
This is just useful for debugging. Uncomment if needed. */ * This is just useful for debugging. Uncomment if needed. */
// *pxTopOfStack = 0x11; /* *pxTopOfStack = 0x11; */
// pxTopOfStack--; /* pxTopOfStack--; */
// *pxTopOfStack = 0x22; /* *pxTopOfStack = 0x22; */
// pxTopOfStack--; /* pxTopOfStack--; */
// *pxTopOfStack = 0x33; /* *pxTopOfStack = 0x33; */
// pxTopOfStack--; /* pxTopOfStack--; */
/* The start of the task code will be popped off the stack last, so place /* The start of the task code will be popped off the stack last, so place
it on first. */ * it on first. */
usAddress = (uint16_t)pxCode; usAddress = ( uint16_t ) pxCode;
*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
usAddress >>= 8; usAddress >>= 8;
*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
/* Next simulate the stack as if after a call to portSAVE_CONTEXT(). /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
portSAVE_CONTEXT places the flags on the stack immediately after r0 * portSAVE_CONTEXT places the flags on the stack immediately after r0
to ensure the interrupts get disabled as soon as possible, and so ensuring * to ensure the interrupts get disabled as soon as possible, and so ensuring
the stack use is minimal should a context switch interrupt occur. */ * the stack use is minimal should a context switch interrupt occur. */
*pxTopOfStack = (StackType_t)0x00; /* R0 */ *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portFLAGS_INT_ENABLED; *pxTopOfStack = portFLAGS_INT_ENABLED;
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */ *pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
pxTopOfStack--; pxTopOfStack--;
/* Now the remaining registers. The compiler expects R1 to be 0. */ /* Now the remaining registers. The compiler expects R1 to be 0. */
*pxTopOfStack = (StackType_t)0x00; /* R1 */ *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
/* Leave R2 - R23 untouched */ /* Leave R2 - R23 untouched */
pxTopOfStack -= 23; pxTopOfStack -= 23;
/* Place the parameter on the stack in the expected location. */ /* Place the parameter on the stack in the expected location. */
usAddress = (uint16_t)pvParameters; usAddress = ( uint16_t ) pvParameters;
*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
usAddress >>= 8; usAddress >>= 8;
*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
/* Leave register R26 - R31 untouched */ /* Leave register R26 - R31 untouched */
pxTopOfStack -= 7; pxTopOfStack -= 7;
@ -229,7 +231,7 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler(void) BaseType_t xPortStartScheduler( void )
{ {
/* Setup the hardware to generate the tick. */ /* Setup the hardware to generate the tick. */
prvSetupTimerInterrupt(); prvSetupTimerInterrupt();
@ -238,15 +240,15 @@ BaseType_t xPortStartScheduler(void)
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
/* Simulate a function call end as generated by the compiler. We will now /* Simulate a function call end as generated by the compiler. We will now
jump to the start of the task the context of which we have just restored. */ * jump to the start of the task the context of which we have just restored. */
asm volatile("ret"); asm volatile ( "ret" );
/* Should not get here. */ /* Should not get here. */
return pdTRUE; return pdTRUE;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortEndScheduler(void) void vPortEndScheduler( void )
{ {
/* vPortEndScheduler is not implemented in this port. */ /* vPortEndScheduler is not implemented in this port. */
} }
@ -256,13 +258,13 @@ void vPortEndScheduler(void)
* Manual context switch. The first thing we do is save the registers so we * Manual context switch. The first thing we do is save the registers so we
* can use a naked attribute. * can use a naked attribute.
*/ */
void vPortYield(void) __attribute__((naked)); void vPortYield( void ) __attribute__( ( naked ) );
void vPortYield(void) void vPortYield( void )
{ {
portSAVE_CONTEXT(); portSAVE_CONTEXT();
vTaskSwitchContext(); vTaskSwitchContext();
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
asm volatile("ret"); asm volatile ( "ret" );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -270,13 +272,13 @@ void vPortYield(void)
* Manual context switch callable from ISRs. The first thing * Manual context switch callable from ISRs. The first thing
* we do is save the registers so we can use a naked attribute. * we do is save the registers so we can use a naked attribute.
*/ */
void vPortYieldFromISR(void) __attribute__((naked)); void vPortYieldFromISR( void ) __attribute__( ( naked ) );
void vPortYieldFromISR(void) void vPortYieldFromISR( void )
{ {
portSAVE_CONTEXT(); portSAVE_CONTEXT();
vTaskSwitchContext(); vTaskSwitchContext();
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
asm volatile("reti"); asm volatile ( "reti" );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -286,24 +288,26 @@ void vPortYieldFromISR(void)
* difference from vPortYield() is the tick count is incremented as the * difference from vPortYield() is the tick count is incremented as the
* call comes from the tick ISR. * call comes from the tick ISR.
*/ */
void vPortYieldFromTick(void) __attribute__((naked)); void vPortYieldFromTick( void ) __attribute__( ( naked ) );
void vPortYieldFromTick(void) void vPortYieldFromTick( void )
{ {
portSAVE_CONTEXT(); portSAVE_CONTEXT();
if (xTaskIncrementTick() != pdFALSE) {
if( xTaskIncrementTick() != pdFALSE )
{
vTaskSwitchContext(); vTaskSwitchContext();
} }
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
asm volatile("reti"); asm volatile ( "reti" );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
* Setup timer to generate a tick interrupt. * Setup timer to generate a tick interrupt.
*/ */
static void prvSetupTimerInterrupt(void) static void prvSetupTimerInterrupt( void )
{ {
TICK_init(); TICK_init();
} }
@ -316,26 +320,26 @@ static void prvSetupTimerInterrupt(void)
* the context is saved at the start of vPortYieldFromTick(). The tick * the context is saved at the start of vPortYieldFromTick(). The tick
* count is incremented after the context is saved. * count is incremented after the context is saved.
*/ */
ISR(TICK_INT_vect, ISR_NAKED) ISR( TICK_INT_vect, ISR_NAKED )
{ {
/* Clear tick interrupt flag. */ /* Clear tick interrupt flag. */
CLR_INT(INT_FLAGS, INT_MASK); CLR_INT( INT_FLAGS, INT_MASK );
vPortYieldFromTick(); vPortYieldFromTick();
asm volatile("reti"); asm volatile ( "reti" );
} }
#else #else /* if configUSE_PREEMPTION == 1 */
/* /*
* Tick ISR for the cooperative scheduler. All this does is increment the * Tick ISR for the cooperative scheduler. All this does is increment the
* tick count. We don't need to switch context, this can only be done by * tick count. We don't need to switch context, this can only be done by
* manual calls to taskYIELD(); * manual calls to taskYIELD();
*/ */
ISR(TICK_INT_vect) ISR( TICK_INT_vect )
{ {
/* Clear tick interrupt flag. */ /* Clear tick interrupt flag. */
INT_FLAGS = INT_MASK; INT_FLAGS = INT_MASK;
xTaskIncrementTick(); xTaskIncrementTick();
} }
#endif #endif /* if configUSE_PREEMPTION == 1 */

128
portable/GCC/AVR_AVRDx/porthardware.h
View file

@ -5,98 +5,104 @@
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#define CLR_INT(FLAG_REG, FLAG_MASK) \ #define CLR_INT( FLAG_REG, FLAG_MASK ) \
asm volatile( \ asm volatile ( \
"push r16\n\t" \ "push r16\n\t" \
"ldi r16, %1\n\t" \ "ldi r16, %1\n\t" \
"sts %0, r16\n\t" \ "sts %0, r16\n\t" \
"pop r16\n\t" \ "pop r16\n\t" \
: \ : \
: "i"(_SFR_MEM_ADDR(FLAG_REG)),"i"((uint8_t)(FLAG_MASK)) \ : "i" ( _SFR_MEM_ADDR( FLAG_REG ) ), "i" ( ( uint8_t ) ( FLAG_MASK ) ) \
); );
#if ( configUSE_TIMER_INSTANCE == 0 ) #if ( configUSE_TIMER_INSTANCE == 0 )
#define TICK_INT_vect TCB0_INT_vect #define TICK_INT_vect TCB0_INT_vect
#define INT_FLAGS TCB0_INTFLAGS #define INT_FLAGS TCB0_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB0.INTCTRL = TCB_CAPT_bm; \ TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB0.CTRLA = TCB_ENABLE_bm; \ TCB0.INTCTRL = TCB_CAPT_bm; \
} TCB0.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 1 ) #elif ( configUSE_TIMER_INSTANCE == 1 )
#define TICK_INT_vect TCB1_INT_vect #define TICK_INT_vect TCB1_INT_vect
#define INT_FLAGS TCB1_INTFLAGS #define INT_FLAGS TCB1_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB1.INTCTRL = TCB_CAPT_bm; \ TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB1.CTRLA = TCB_ENABLE_bm; \ TCB1.INTCTRL = TCB_CAPT_bm; \
} TCB1.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 2 ) #elif ( configUSE_TIMER_INSTANCE == 2 )
#define TICK_INT_vect TCB2_INT_vect #define TICK_INT_vect TCB2_INT_vect
#define INT_FLAGS TCB2_INTFLAGS #define INT_FLAGS TCB2_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB2.INTCTRL = TCB_CAPT_bm; \ TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB2.CTRLA = TCB_ENABLE_bm; \ TCB2.INTCTRL = TCB_CAPT_bm; \
} TCB2.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 3 ) #elif ( configUSE_TIMER_INSTANCE == 3 )
#define TICK_INT_vect TCB3_INT_vect #define TICK_INT_vect TCB3_INT_vect
#define INT_FLAGS TCB3_INTFLAGS #define INT_FLAGS TCB3_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB3.INTCTRL = TCB_CAPT_bm; \ TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB3.CTRLA = TCB_ENABLE_bm; \ TCB3.INTCTRL = TCB_CAPT_bm; \
} TCB3.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 4 ) #elif ( configUSE_TIMER_INSTANCE == 4 )
#define TICK_INT_vect TCB4_INT_vect #define TICK_INT_vect TCB4_INT_vect
#define INT_FLAGS TCB4_INTFLAGS #define INT_FLAGS TCB4_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB4.INTCTRL = TCB_CAPT_bm; \ TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB4.CTRLA = TCB_ENABLE_bm; \ TCB4.INTCTRL = TCB_CAPT_bm; \
} TCB4.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 5 ) #elif ( configUSE_TIMER_INSTANCE == 5 )
#define TICK_INT_vect RTC_CNT_vect #define TICK_INT_vect RTC_CNT_vect
#define INT_FLAGS RTC_INTFLAGS #define INT_FLAGS RTC_INTFLAGS
#define INT_MASK RTC_OVF_bm #define INT_MASK RTC_OVF_bm
/* Hertz to period for RTC setup */ /* Hertz to period for RTC setup */
#define RTC_PERIOD_HZ(x) ( 32768 * ( ( 1.0 / x ) ) ) #define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
#define TICK_init() { \ #define TICK_init() \
while (RTC.STATUS > 0); \ { \
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \ while( RTC.STATUS > 0 ) {; } \
RTC.PER = RTC_PERIOD_HZ(configTICK_RATE_HZ); \ RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
RTC.INTCTRL |= 1 << RTC_OVF_bp; \ RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
} RTC.INTCTRL |= 1 << RTC_OVF_bp; \
}
#else #else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
#undef TICK_INT_vect #undef TICK_INT_vect
#undef INT_FLAGS #undef INT_FLAGS
#undef INT_MASK #undef INT_MASK
#undef TICK_init() #undef TICK_init()
#error Invalid timer setting. #error Invalid timer setting.
#endif #endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

284
portable/GCC/AVR_Mega0/port.c
View file

@ -33,18 +33,18 @@
#include "task.h" #include "task.h"
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the AVR port. * Implementation of functions defined in portable.h for the AVR port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
/* Start tasks with interrupts enables. */ /* Start tasks with interrupts enables. */
#define portFLAGS_INT_ENABLED ((StackType_t) 0x80) #define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* We require the address of the pxCurrentTCB variable, but don't want to know /* We require the address of the pxCurrentTCB variable, but don't want to know
any details of its type. */ * any details of its type. */
typedef void RTOS_TCB_t; typedef void RTOS_TCB_t;
extern volatile RTOS_TCB_t *volatile pxCurrentTCB; extern volatile RTOS_TCB_t * volatile pxCurrentTCB;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -64,155 +64,157 @@ extern volatile RTOS_TCB_t *volatile pxCurrentTCB;
* so we need not worry about reading/writing to the stack pointer. * so we need not worry about reading/writing to the stack pointer.
*/ */
#define portSAVE_CONTEXT() \ #define portSAVE_CONTEXT() \
asm volatile("push r0 \n\t" \ asm volatile ( "push r0 \n\t" \
"in r0, __SREG__ \n\t" \ "in r0, __SREG__ \n\t" \
"cli \n\t" \ "cli \n\t" \
"push r0 \n\t" \ "push r0 \n\t" \
"push r1 \n\t" \ "push r1 \n\t" \
"clr r1 \n\t" \ "clr r1 \n\t" \
"push r2 \n\t" \ "push r2 \n\t" \
"push r3 \n\t" \ "push r3 \n\t" \
"push r4 \n\t" \ "push r4 \n\t" \
"push r5 \n\t" \ "push r5 \n\t" \
"push r6 \n\t" \ "push r6 \n\t" \
"push r7 \n\t" \ "push r7 \n\t" \
"push r8 \n\t" \ "push r8 \n\t" \
"push r9 \n\t" \ "push r9 \n\t" \
"push r10 \n\t" \ "push r10 \n\t" \
"push r11 \n\t" \ "push r11 \n\t" \
"push r12 \n\t" \ "push r12 \n\t" \
"push r13 \n\t" \ "push r13 \n\t" \
"push r14 \n\t" \ "push r14 \n\t" \
"push r15 \n\t" \ "push r15 \n\t" \
"push r16 \n\t" \ "push r16 \n\t" \
"push r17 \n\t" \ "push r17 \n\t" \
"push r18 \n\t" \ "push r18 \n\t" \
"push r19 \n\t" \ "push r19 \n\t" \
"push r20 \n\t" \ "push r20 \n\t" \
"push r21 \n\t" \ "push r21 \n\t" \
"push r22 \n\t" \ "push r22 \n\t" \
"push r23 \n\t" \ "push r23 \n\t" \
"push r24 \n\t" \ "push r24 \n\t" \
"push r25 \n\t" \ "push r25 \n\t" \
"push r26 \n\t" \ "push r26 \n\t" \
"push r27 \n\t" \ "push r27 \n\t" \
"push r28 \n\t" \ "push r28 \n\t" \
"push r29 \n\t" \ "push r29 \n\t" \
"push r30 \n\t" \ "push r30 \n\t" \
"push r31 \n\t" \ "push r31 \n\t" \
"lds r26, pxCurrentTCB \n\t" \ "lds r26, pxCurrentTCB \n\t" \
"lds r27, pxCurrentTCB + 1 \n\t" \ "lds r27, pxCurrentTCB + 1 \n\t" \
"in r0, __SP_L__ \n\t" \ "in r0, __SP_L__ \n\t" \
"st x+, r0 \n\t" \ "st x+, r0 \n\t" \
"in r0, __SP_H__ \n\t" \ "in r0, __SP_H__ \n\t" \
"st x+, r0 \n\t"); "st x+, r0 \n\t" );
/* /*
* Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during * Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during
* the context save so we can write to the stack pointer. * the context save so we can write to the stack pointer.
*/ */
#define portRESTORE_CONTEXT() \ #define portRESTORE_CONTEXT() \
asm volatile("lds r26, pxCurrentTCB \n\t" \ asm volatile ( "lds r26, pxCurrentTCB \n\t" \
"lds r27, pxCurrentTCB + 1 \n\t" \ "lds r27, pxCurrentTCB + 1 \n\t" \
"ld r28, x+ \n\t" \ "ld r28, x+ \n\t" \
"out __SP_L__, r28 \n\t" \ "out __SP_L__, r28 \n\t" \
"ld r29, x+ \n\t" \ "ld r29, x+ \n\t" \
"out __SP_H__, r29 \n\t" \ "out __SP_H__, r29 \n\t" \
"pop r31 \n\t" \ "pop r31 \n\t" \
"pop r30 \n\t" \ "pop r30 \n\t" \
"pop r29 \n\t" \ "pop r29 \n\t" \
"pop r28 \n\t" \ "pop r28 \n\t" \
"pop r27 \n\t" \ "pop r27 \n\t" \
"pop r26 \n\t" \ "pop r26 \n\t" \
"pop r25 \n\t" \ "pop r25 \n\t" \
"pop r24 \n\t" \ "pop r24 \n\t" \
"pop r23 \n\t" \ "pop r23 \n\t" \
"pop r22 \n\t" \ "pop r22 \n\t" \
"pop r21 \n\t" \ "pop r21 \n\t" \
"pop r20 \n\t" \ "pop r20 \n\t" \
"pop r19 \n\t" \ "pop r19 \n\t" \
"pop r18 \n\t" \ "pop r18 \n\t" \
"pop r17 \n\t" \ "pop r17 \n\t" \
"pop r16 \n\t" \ "pop r16 \n\t" \
"pop r15 \n\t" \ "pop r15 \n\t" \
"pop r14 \n\t" \ "pop r14 \n\t" \
"pop r13 \n\t" \ "pop r13 \n\t" \
"pop r12 \n\t" \ "pop r12 \n\t" \
"pop r11 \n\t" \ "pop r11 \n\t" \
"pop r10 \n\t" \ "pop r10 \n\t" \
"pop r9 \n\t" \ "pop r9 \n\t" \
"pop r8 \n\t" \ "pop r8 \n\t" \
"pop r7 \n\t" \ "pop r7 \n\t" \
"pop r6 \n\t" \ "pop r6 \n\t" \
"pop r5 \n\t" \ "pop r5 \n\t" \
"pop r4 \n\t" \ "pop r4 \n\t" \
"pop r3 \n\t" \ "pop r3 \n\t" \
"pop r2 \n\t" \ "pop r2 \n\t" \
"pop r1 \n\t" \ "pop r1 \n\t" \
"pop r0 \n\t" \ "pop r0 \n\t" \
"out __SREG__, r0 \n\t" \ "out __SREG__, r0 \n\t" \
"pop r0 \n\t"); "pop r0 \n\t" );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
* Perform hardware setup to enable ticks from timer. * Perform hardware setup to enable ticks from timer.
*/ */
static void prvSetupTimerInterrupt(void); static void prvSetupTimerInterrupt( void );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
* See header file for description. * See header file for description.
*/ */
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters) StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
{ {
uint16_t usAddress; uint16_t usAddress;
/*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */ /*lint -e950 -e611 -e923 Lint doesn't like this much - but nothing I can do about it. */
/* Place a few bytes of known values on the bottom of the stack. /* Place a few bytes of known values on the bottom of the stack.
This is just useful for debugging. Uncomment if needed. */ * This is just useful for debugging. Uncomment if needed. */
// *pxTopOfStack = 0x11; /* *pxTopOfStack = 0x11; */
// pxTopOfStack--; /* pxTopOfStack--; */
// *pxTopOfStack = 0x22; /* *pxTopOfStack = 0x22; */
// pxTopOfStack--; /* pxTopOfStack--; */
// *pxTopOfStack = 0x33; /* *pxTopOfStack = 0x33; */
// pxTopOfStack--; /* pxTopOfStack--; */
/* The start of the task code will be popped off the stack last, so place /* The start of the task code will be popped off the stack last, so place
it on first. */ * it on first. */
usAddress = (uint16_t)pxCode; usAddress = ( uint16_t ) pxCode;
*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
usAddress >>= 8; usAddress >>= 8;
*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
/* Next simulate the stack as if after a call to portSAVE_CONTEXT(). /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
portSAVE_CONTEXT places the flags on the stack immediately after r0 * portSAVE_CONTEXT places the flags on the stack immediately after r0
to ensure the interrupts get disabled as soon as possible, and so ensuring * to ensure the interrupts get disabled as soon as possible, and so ensuring
the stack use is minimal should a context switch interrupt occur. */ * the stack use is minimal should a context switch interrupt occur. */
*pxTopOfStack = (StackType_t)0x00; /* R0 */ *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portFLAGS_INT_ENABLED; *pxTopOfStack = portFLAGS_INT_ENABLED;
pxTopOfStack--; pxTopOfStack--;
/* Now the remaining registers. The compiler expects R1 to be 0. */ /* Now the remaining registers. The compiler expects R1 to be 0. */
*pxTopOfStack = (StackType_t)0x00; /* R1 */ *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
/* Leave R2 - R23 untouched */ /* Leave R2 - R23 untouched */
pxTopOfStack -= 23; pxTopOfStack -= 23;
/* Place the parameter on the stack in the expected location. */ /* Place the parameter on the stack in the expected location. */
usAddress = (uint16_t)pvParameters; usAddress = ( uint16_t ) pvParameters;
*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
pxTopOfStack--; pxTopOfStack--;
usAddress >>= 8; usAddress >>= 8;
*pxTopOfStack = (StackType_t)(usAddress & (uint16_t)0x00ff); *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
/* Leave register R26 - R31 untouched */ /* Leave register R26 - R31 untouched */
pxTopOfStack -= 7; pxTopOfStack -= 7;
@ -223,7 +225,7 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xPortStartScheduler(void) BaseType_t xPortStartScheduler( void )
{ {
/* Setup the hardware to generate the tick. */ /* Setup the hardware to generate the tick. */
prvSetupTimerInterrupt(); prvSetupTimerInterrupt();
@ -232,15 +234,15 @@ BaseType_t xPortStartScheduler(void)
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
/* Simulate a function call end as generated by the compiler. We will now /* Simulate a function call end as generated by the compiler. We will now
jump to the start of the task the context of which we have just restored. */ * jump to the start of the task the context of which we have just restored. */
asm volatile("ret"); asm volatile ( "ret" );
/* Should not get here. */ /* Should not get here. */
return pdTRUE; return pdTRUE;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortEndScheduler(void) void vPortEndScheduler( void )
{ {
/* vPortEndScheduler is not implemented in this port. */ /* vPortEndScheduler is not implemented in this port. */
} }
@ -250,13 +252,13 @@ void vPortEndScheduler(void)
* Manual context switch. The first thing we do is save the registers so we * Manual context switch. The first thing we do is save the registers so we
* can use a naked attribute. * can use a naked attribute.
*/ */
void vPortYield(void) __attribute__((naked)); void vPortYield( void ) __attribute__( ( naked ) );
void vPortYield(void) void vPortYield( void )
{ {
portSAVE_CONTEXT(); portSAVE_CONTEXT();
vTaskSwitchContext(); vTaskSwitchContext();
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
asm volatile("ret"); asm volatile ( "ret" );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -264,13 +266,13 @@ void vPortYield(void)
* Manual context switch callable from ISRs. The first thing * Manual context switch callable from ISRs. The first thing
* we do is save the registers so we can use a naked attribute. * we do is save the registers so we can use a naked attribute.
*/ */
void vPortYieldFromISR(void) __attribute__((naked)); void vPortYieldFromISR( void ) __attribute__( ( naked ) );
void vPortYieldFromISR(void) void vPortYieldFromISR( void )
{ {
portSAVE_CONTEXT(); portSAVE_CONTEXT();
vTaskSwitchContext(); vTaskSwitchContext();
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
asm volatile("reti"); asm volatile ( "reti" );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -280,24 +282,26 @@ void vPortYieldFromISR(void)
* difference from vPortYield() is the tick count is incremented as the * difference from vPortYield() is the tick count is incremented as the
* call comes from the tick ISR. * call comes from the tick ISR.
*/ */
void vPortYieldFromTick(void) __attribute__((naked)); void vPortYieldFromTick( void ) __attribute__( ( naked ) );
void vPortYieldFromTick(void) void vPortYieldFromTick( void )
{ {
portSAVE_CONTEXT(); portSAVE_CONTEXT();
if (xTaskIncrementTick() != pdFALSE) {
if( xTaskIncrementTick() != pdFALSE )
{
vTaskSwitchContext(); vTaskSwitchContext();
} }
portRESTORE_CONTEXT(); portRESTORE_CONTEXT();
asm volatile("reti"); asm volatile ( "reti" );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* /*
* Setup timer to generate a tick interrupt. * Setup timer to generate a tick interrupt.
*/ */
static void prvSetupTimerInterrupt(void) static void prvSetupTimerInterrupt( void )
{ {
TICK_init(); TICK_init();
} }
@ -310,26 +314,26 @@ static void prvSetupTimerInterrupt(void)
* the context is saved at the start of vPortYieldFromTick(). The tick * the context is saved at the start of vPortYieldFromTick(). The tick
* count is incremented after the context is saved. * count is incremented after the context is saved.
*/ */
ISR(TICK_INT_vect, ISR_NAKED) ISR( TICK_INT_vect, ISR_NAKED )
{ {
/* Clear tick interrupt flag. */ /* Clear tick interrupt flag. */
CLR_INT(INT_FLAGS, INT_MASK); CLR_INT( INT_FLAGS, INT_MASK );
vPortYieldFromTick(); vPortYieldFromTick();
asm volatile("reti"); asm volatile ( "reti" );
} }
#else #else /* if configUSE_PREEMPTION == 1 */
/* /*
* Tick ISR for the cooperative scheduler. All this does is increment the * Tick ISR for the cooperative scheduler. All this does is increment the
* tick count. We don't need to switch context, this can only be done by * tick count. We don't need to switch context, this can only be done by
* manual calls to taskYIELD(); * manual calls to taskYIELD();
*/ */
ISR(TICK_INT_vect) ISR( TICK_INT_vect )
{ {
/* Clear tick interrupt flag. */ /* Clear tick interrupt flag. */
INT_FLAGS = INT_MASK; INT_FLAGS = INT_MASK;
xTaskIncrementTick(); xTaskIncrementTick();
} }
#endif #endif /* if configUSE_PREEMPTION == 1 */

111
portable/GCC/AVR_Mega0/porthardware.h
View file

@ -5,86 +5,91 @@
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#define CLR_INT(FLAG_REG, FLAG_MASK) \ #define CLR_INT( FLAG_REG, FLAG_MASK ) \
asm volatile( \ asm volatile ( \
"push r16\n\t" \ "push r16\n\t" \
"ldi r16, %1\n\t" \ "ldi r16, %1\n\t" \
"sts %0, r16\n\t" \ "sts %0, r16\n\t" \
"pop r16\n\t" \ "pop r16\n\t" \
: \ : \
: "i"(_SFR_MEM_ADDR(FLAG_REG)),"i"((uint8_t)(FLAG_MASK)) \ : "i" ( _SFR_MEM_ADDR( FLAG_REG ) ), "i" ( ( uint8_t ) ( FLAG_MASK ) ) \
); );
#if ( configUSE_TIMER_INSTANCE == 0 ) #if ( configUSE_TIMER_INSTANCE == 0 )
#define TICK_INT_vect TCB0_INT_vect #define TICK_INT_vect TCB0_INT_vect
#define INT_FLAGS TCB0_INTFLAGS #define INT_FLAGS TCB0_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB0.INTCTRL = TCB_CAPT_bm; \ TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB0.CTRLA = TCB_ENABLE_bm; \ TCB0.INTCTRL = TCB_CAPT_bm; \
} TCB0.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 1 ) #elif ( configUSE_TIMER_INSTANCE == 1 )
#define TICK_INT_vect TCB1_INT_vect #define TICK_INT_vect TCB1_INT_vect
#define INT_FLAGS TCB1_INTFLAGS #define INT_FLAGS TCB1_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB1.INTCTRL = TCB_CAPT_bm; \ TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB1.CTRLA = TCB_ENABLE_bm; \ TCB1.INTCTRL = TCB_CAPT_bm; \
} TCB1.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 2 ) #elif ( configUSE_TIMER_INSTANCE == 2 )
#define TICK_INT_vect TCB2_INT_vect #define TICK_INT_vect TCB2_INT_vect
#define INT_FLAGS TCB2_INTFLAGS #define INT_FLAGS TCB2_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB2.INTCTRL = TCB_CAPT_bm; \ TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB2.CTRLA = TCB_ENABLE_bm; \ TCB2.INTCTRL = TCB_CAPT_bm; \
} TCB2.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 3 ) #elif ( configUSE_TIMER_INSTANCE == 3 )
#define TICK_INT_vect TCB3_INT_vect #define TICK_INT_vect TCB3_INT_vect
#define INT_FLAGS TCB3_INTFLAGS #define INT_FLAGS TCB3_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB3.INTCTRL = TCB_CAPT_bm; \ TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB3.CTRLA = TCB_ENABLE_bm; \ TCB3.INTCTRL = TCB_CAPT_bm; \
} TCB3.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 4 ) #elif ( configUSE_TIMER_INSTANCE == 4 )
#define TICK_INT_vect RTC_CNT_vect #define TICK_INT_vect RTC_CNT_vect
#define INT_FLAGS RTC_INTFLAGS #define INT_FLAGS RTC_INTFLAGS
#define INT_MASK RTC_OVF_bm #define INT_MASK RTC_OVF_bm
/* Hertz to period for RTC setup */ /* Hertz to period for RTC setup */
#define RTC_PERIOD_HZ(x) ( 32768 * ( ( 1.0 / x ) ) ) #define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
#define TICK_init() { \ #define TICK_init() \
while (RTC.STATUS > 0); \ { \
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \ while( RTC.STATUS > 0 ) {; } \
RTC.PER = RTC_PERIOD_HZ(configTICK_RATE_HZ); \ RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
RTC.INTCTRL |= 1 << RTC_OVF_bp; \ RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
} RTC.INTCTRL |= 1 << RTC_OVF_bp; \
}
#else #else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
#undef TICK_INT_vect #undef TICK_INT_vect
#undef INT_FLAGS #undef INT_FLAGS
#undef INT_MASK #undef INT_MASK
#undef TICK_init() #undef TICK_init()
#error Invalid timer setting. #error Invalid timer setting.
#endif #endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

66
portable/IAR/ARM_CM23/non_secure/port.c
View file

@ -611,7 +611,7 @@ static void prvTaskExitError( void )
extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __unprivileged_flash_end__;
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
extern uint32_t * __privileged_sram_end__; extern uint32_t * __privileged_sram_end__;
#else /* if defined( __ARMCC_VERSION ) */ #else /* if defined( __ARMCC_VERSION ) */
/* Declaration when these variable are exported from linker scripts. */ /* Declaration when these variable are exported from linker scripts. */
extern uint32_t __privileged_functions_start__[]; extern uint32_t __privileged_functions_start__[];
extern uint32_t __privileged_functions_end__[]; extern uint32_t __privileged_functions_end__[];
@ -801,22 +801,22 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
ulR0 = pulCallerStackAddress[ 0 ]; ulR0 = pulCallerStackAddress[ 0 ];
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
{ {
/* Read the CONTROL register value. */ /* Read the CONTROL register value. */
__asm volatile ( "mrs %0, control" : "=r" ( ulControl ) ); __asm volatile ( "mrs %0, control" : "=r" ( ulControl ) );
/* The task that raised the SVC is privileged if Bit[0] /* The task that raised the SVC is privileged if Bit[0]
* in the CONTROL register is 0. */ * in the CONTROL register is 0. */
ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 ); ulIsTaskPrivileged = ( ( ulControl & portCONTROL_PRIVILEGED_MASK ) == 0 );
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged ); xSecureContext = SecureContext_AllocateContext( ulR0, ulIsTaskPrivileged );
} }
#else /* if ( configENABLE_MPU == 1 ) */ #else /* if ( configENABLE_MPU == 1 ) */
{ {
/* Allocate and load a context for the secure task. */ /* Allocate and load a context for the secure task. */
xSecureContext = SecureContext_AllocateContext( ulR0 ); xSecureContext = SecureContext_AllocateContext( ulR0 );
} }
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
configASSERT( xSecureContext != NULL ); configASSERT( xSecureContext != NULL );
@ -834,21 +834,21 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
case portSVC_START_SCHEDULER: case portSVC_START_SCHEDULER:
#if ( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
{ {
/* De-prioritize the non-secure exceptions so that the /* De-prioritize the non-secure exceptions so that the
* non-secure pendSV runs at the lowest priority. */ * non-secure pendSV runs at the lowest priority. */
SecureInit_DePrioritizeNSExceptions(); SecureInit_DePrioritizeNSExceptions();
/* Initialize the secure context management system. */ /* Initialize the secure context management system. */
SecureContext_Init(); SecureContext_Init();
} }
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if ( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
{ {
/* Setup the Floating Point Unit (FPU). */ /* Setup the Floating Point Unit (FPU). */
prvSetupFPU(); prvSetupFPU();
} }
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
/* Setup the context of the first task so that the first task starts /* Setup the context of the first task so that the first task starts
@ -876,18 +876,20 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters, void * pvParameters,
BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */ BaseType_t xRunPrivileged ) /* PRIVILEGED_FUNCTION */
#else #else
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* *INDENT-ON* */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
* interrupt. */ * interrupt. */
@ -1050,7 +1052,9 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber; uint32_t ulRegionStartAddress, ulRegionEndAddress, ulRegionNumber;
int32_t lIndex = 0; int32_t lIndex = 0;
#if defined( __ARMCC_VERSION ) #if defined( __ARMCC_VERSION )
/* Declaration when these variable are defined in code instead of being /* Declaration when these variable are defined in code instead of being
* exported from linker scripts. */ * exported from linker scripts. */
extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_start__;
@ -1078,8 +1082,8 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
* using a separate MPU region. This is needed because privileged * using a separate MPU region. This is needed because privileged
* SRAM is already protected using an MPU region and ARMv8-M does * SRAM is already protected using an MPU region and ARMv8-M does
* not allow overlapping MPU regions. */ * not allow overlapping MPU regions. */
if( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ && if( ( ulRegionStartAddress >= ( uint32_t ) __privileged_sram_start__ ) &&
ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) ( ulRegionEndAddress <= ( uint32_t ) __privileged_sram_end__ ) )
{ {
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = 0;
xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0; xMPUSettings->xRegionsSettings[ 0 ].ulRLAR = 0;
@ -1088,7 +1092,7 @@ void vPortEndScheduler( void ) /* PRIVILEGED_FUNCTION */
{ {
/* Define the region that allows access to the stack. */ /* Define the region that allows access to the stack. */
ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK; ulRegionStartAddress &= portMPU_RBAR_ADDRESS_MASK;
ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK; ulRegionEndAddress &= portMPU_RLAR_ADDRESS_MASK;
xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) | xMPUSettings->xRegionsSettings[ 0 ].ulRBAR = ( ulRegionStartAddress ) |
( portMPU_REGION_NON_SHAREABLE ) | ( portMPU_REGION_NON_SHAREABLE ) |

2
portable/IAR/ARM_CM23_NTZ/non_secure/port.c
View file

@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* *INDENT-ON* */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
* interrupt. */ * interrupt. */

2
portable/IAR/ARM_CM33/non_secure/port.c
View file

@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* *INDENT-ON* */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
* interrupt. */ * interrupt. */

2
portable/IAR/ARM_CM33_NTZ/non_secure/port.c
View file

@ -876,6 +876,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* *INDENT-OFF* */
#if ( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack, StackType_t * pxEndOfStack,
@ -888,6 +889,7 @@ void vPortSVCHandler_C( uint32_t * pulCallerStackAddress ) /* PRIVILEGED_FUNCTIO
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) /* PRIVILEGED_FUNCTION */ void * pvParameters ) /* PRIVILEGED_FUNCTION */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* *INDENT-ON* */
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
* interrupt. */ * interrupt. */

7
portable/IAR/AVR_AVRDx/port.c
View file

@ -114,9 +114,10 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
pxTopOfStack -= ( configCALL_STACK_SIZE - 2 ); pxTopOfStack -= ( configCALL_STACK_SIZE - 2 );
/* Next simulate the stack as if after a call to portSAVE_CONTEXT(). /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
* portSAVE_CONTEXT places the flags on the stack immediately after r0 * portSAVE_CONTEXT places the flags on the stack immediately after r0
* to ensure the interrupts get disabled as soon as possible, and so ensuring * to ensure the interrupts get disabled as soon as possible, and so ensuring
* the stack use is minimal should a context switch interrupt occur. */ * the stack use is minimal should a context switch interrupt occur. */
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portFLAGS_INT_ENABLED; *pxTopOfStack = portFLAGS_INT_ENABLED;

112
portable/IAR/AVR_AVRDx/porthardware.h
View file

@ -8,86 +8,92 @@
#if ( configUSE_TIMER_INSTANCE == 0 ) #if ( configUSE_TIMER_INSTANCE == 0 )
#define TICK_INT_vect TCB0_INT_vect #define TICK_INT_vect TCB0_INT_vect
#define INT_FLAGS TCB0_INTFLAGS #define INT_FLAGS TCB0_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB0.INTCTRL = TCB_CAPT_bm; \ TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB0.CTRLA = TCB_ENABLE_bm; \ TCB0.INTCTRL = TCB_CAPT_bm; \
} TCB0.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 1 ) #elif ( configUSE_TIMER_INSTANCE == 1 )
#define TICK_INT_vect TCB1_INT_vect #define TICK_INT_vect TCB1_INT_vect
#define INT_FLAGS TCB1_INTFLAGS #define INT_FLAGS TCB1_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB1.INTCTRL = TCB_CAPT_bm; \ TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB1.CTRLA = TCB_ENABLE_bm; \ TCB1.INTCTRL = TCB_CAPT_bm; \
} TCB1.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 2 ) #elif ( configUSE_TIMER_INSTANCE == 2 )
#define TICK_INT_vect TCB2_INT_vect #define TICK_INT_vect TCB2_INT_vect
#define INT_FLAGS TCB2_INTFLAGS #define INT_FLAGS TCB2_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB2.INTCTRL = TCB_CAPT_bm; \ TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB2.CTRLA = TCB_ENABLE_bm; \ TCB2.INTCTRL = TCB_CAPT_bm; \
} TCB2.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 3 ) #elif ( configUSE_TIMER_INSTANCE == 3 )
#define TICK_INT_vect TCB3_INT_vect #define TICK_INT_vect TCB3_INT_vect
#define INT_FLAGS TCB3_INTFLAGS #define INT_FLAGS TCB3_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB3.INTCTRL = TCB_CAPT_bm; \ TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB3.CTRLA = TCB_ENABLE_bm; \ TCB3.INTCTRL = TCB_CAPT_bm; \
} TCB3.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 4 ) #elif ( configUSE_TIMER_INSTANCE == 4 )
#define TICK_INT_vect TCB4_INT_vect #define TICK_INT_vect TCB4_INT_vect
#define INT_FLAGS TCB4_INTFLAGS #define INT_FLAGS TCB4_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB4.INTCTRL = TCB_CAPT_bm; \ TCB4.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB4.CTRLA = TCB_ENABLE_bm; \ TCB4.INTCTRL = TCB_CAPT_bm; \
} TCB4.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 5 ) #elif ( configUSE_TIMER_INSTANCE == 5 )
#define TICK_INT_vect RTC_CNT_vect #define TICK_INT_vect RTC_CNT_vect
#define INT_FLAGS RTC_INTFLAGS #define INT_FLAGS RTC_INTFLAGS
#define INT_MASK RTC_OVF_bm #define INT_MASK RTC_OVF_bm
/* Hertz to period for RTC setup */ /* Hertz to period for RTC setup */
#define RTC_PERIOD_HZ(x) ( 32768 * ( ( 1.0 / x ) ) ) #define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
#define TICK_init() { \ #define TICK_init() \
while (RTC.STATUS > 0); \ { \
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \ while( RTC.STATUS > 0 ) {; } \
RTC.PER = RTC_PERIOD_HZ(configTICK_RATE_HZ); \ RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
RTC.INTCTRL |= 1 << RTC_OVF_bp; \ RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
} RTC.INTCTRL |= 1 << RTC_OVF_bp; \
}
#else #else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
#undef TICK_INT_vect #undef TICK_INT_vect
#undef INT_FLAGS #undef INT_FLAGS
#undef INT_MASK #undef INT_MASK
#undef TICK_init() #undef TICK_init()
#error Invalid timer setting. #error Invalid timer setting.
#endif #endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

7
portable/IAR/AVR_Mega0/port.c
View file

@ -114,9 +114,10 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
pxTopOfStack -= ( configCALL_STACK_SIZE - 2 ); pxTopOfStack -= ( configCALL_STACK_SIZE - 2 );
/* Next simulate the stack as if after a call to portSAVE_CONTEXT(). /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
* portSAVE_CONTEXT places the flags on the stack immediately after r0 * portSAVE_CONTEXT places the flags on the stack immediately after r0
* to ensure the interrupts get disabled as soon as possible, and so ensuring * to ensure the interrupts get disabled as soon as possible, and so ensuring
* the stack use is minimal should a context switch interrupt occur. */ * the stack use is minimal should a context switch interrupt occur. */
*pxTopOfStack = ( StackType_t ) 0x00; /* R0 */ *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portFLAGS_INT_ENABLED; *pxTopOfStack = portFLAGS_INT_ENABLED;

95
portable/IAR/AVR_Mega0/porthardware.h
View file

@ -8,74 +8,79 @@
#if ( configUSE_TIMER_INSTANCE == 0 ) #if ( configUSE_TIMER_INSTANCE == 0 )
#define TICK_INT_vect TCB0_INT_vect #define TICK_INT_vect TCB0_INT_vect
#define INT_FLAGS TCB0_INTFLAGS #define INT_FLAGS TCB0_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB0.INTCTRL = TCB_CAPT_bm; \ TCB0.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB0.CTRLA = TCB_ENABLE_bm; \ TCB0.INTCTRL = TCB_CAPT_bm; \
} TCB0.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 1 ) #elif ( configUSE_TIMER_INSTANCE == 1 )
#define TICK_INT_vect TCB1_INT_vect #define TICK_INT_vect TCB1_INT_vect
#define INT_FLAGS TCB1_INTFLAGS #define INT_FLAGS TCB1_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB1.INTCTRL = TCB_CAPT_bm; \ TCB1.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB1.CTRLA = TCB_ENABLE_bm; \ TCB1.INTCTRL = TCB_CAPT_bm; \
} TCB1.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 2 ) #elif ( configUSE_TIMER_INSTANCE == 2 )
#define TICK_INT_vect TCB2_INT_vect #define TICK_INT_vect TCB2_INT_vect
#define INT_FLAGS TCB2_INTFLAGS #define INT_FLAGS TCB2_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB2.INTCTRL = TCB_CAPT_bm; \ TCB2.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB2.CTRLA = TCB_ENABLE_bm; \ TCB2.INTCTRL = TCB_CAPT_bm; \
} TCB2.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 3 ) #elif ( configUSE_TIMER_INSTANCE == 3 )
#define TICK_INT_vect TCB3_INT_vect #define TICK_INT_vect TCB3_INT_vect
#define INT_FLAGS TCB3_INTFLAGS #define INT_FLAGS TCB3_INTFLAGS
#define INT_MASK TCB_CAPT_bm #define INT_MASK TCB_CAPT_bm
#define TICK_init() { \ #define TICK_init() \
TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \ { \
TCB3.INTCTRL = TCB_CAPT_bm; \ TCB3.CCMP = configCPU_CLOCK_HZ / configTICK_RATE_HZ; \
TCB3.CTRLA = TCB_ENABLE_bm; \ TCB3.INTCTRL = TCB_CAPT_bm; \
} TCB3.CTRLA = TCB_ENABLE_bm; \
}
#elif ( configUSE_TIMER_INSTANCE == 4 ) #elif ( configUSE_TIMER_INSTANCE == 4 )
#define TICK_INT_vect RTC_CNT_vect #define TICK_INT_vect RTC_CNT_vect
#define INT_FLAGS RTC_INTFLAGS #define INT_FLAGS RTC_INTFLAGS
#define INT_MASK RTC_OVF_bm #define INT_MASK RTC_OVF_bm
/* Hertz to period for RTC setup */ /* Hertz to period for RTC setup */
#define RTC_PERIOD_HZ(x) ( 32768 * ( ( 1.0 / x ) ) ) #define RTC_PERIOD_HZ( x ) ( 32768 * ( ( 1.0 / x ) ) )
#define TICK_init() { \ #define TICK_init() \
while (RTC.STATUS > 0); \ { \
RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \ while( RTC.STATUS > 0 ) {; } \
RTC.PER = RTC_PERIOD_HZ(configTICK_RATE_HZ); \ RTC.CTRLA = RTC_PRESCALER_DIV1_gc | 1 << RTC_RTCEN_bp; \
RTC.INTCTRL |= 1 << RTC_OVF_bp; \ RTC.PER = RTC_PERIOD_HZ( configTICK_RATE_HZ ); \
} RTC.INTCTRL |= 1 << RTC_OVF_bp; \
}
#else #else /* if ( configUSE_TIMER_INSTANCE == 0 ) */
#undef TICK_INT_vect #undef TICK_INT_vect
#undef INT_FLAGS #undef INT_FLAGS
#undef INT_MASK #undef INT_MASK
#undef TICK_init() #undef TICK_init()
#error Invalid timer setting. #error Invalid timer setting.
#endif #endif /* if ( configUSE_TIMER_INSTANCE == 0 ) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

1
portable/ThirdParty/GCC/ARC_EM_HS/port.c vendored
View file

@ -40,6 +40,7 @@
volatile unsigned int ulCriticalNesting = 999UL; volatile unsigned int ulCriticalNesting = 999UL;
volatile unsigned int context_switch_reqflg; /* task context switch request flag in exceptions and interrupts handling */ volatile unsigned int context_switch_reqflg; /* task context switch request flag in exceptions and interrupts handling */
/** /**
* \var exc_nest_count * \var exc_nest_count
* \brief the counter for exc/int processing, =0 no int/exc * \brief the counter for exc/int processing, =0 no int/exc

4
portable/ThirdParty/GCC/Xtensa_ESP32/port.c vendored
View file

@ -153,6 +153,7 @@ void _xt_user_exit( void );
/* /*
* Stack initialization * Stack initialization
*/ */
/* *INDENT-OFF* */
#if portUSING_MPU_WRAPPERS #if portUSING_MPU_WRAPPERS
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack, StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
@ -163,6 +164,7 @@ void _xt_user_exit( void );
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) void * pvParameters )
#endif #endif
/* *INDENT-ON* */
{ {
StackType_t * sp, * tp; StackType_t * sp, * tp;
XtExcFrame * frame; XtExcFrame * frame;
@ -408,7 +410,7 @@ void vPortCPUInitializeMutex( portMUX_TYPE * mux )
return result; return result;
} }
#else /* ifdef CONFIG_FREERTOS_PORTMUX_DEBUG */ #else /* ifdef CONFIG_FREERTOS_PORTMUX_DEBUG */
void vPortCPUAcquireMutex( portMUX_TYPE * mux ) void vPortCPUAcquireMutex( portMUX_TYPE * mux )
{ {
unsigned int irqStatus = portENTER_CRITICAL_NESTED(); unsigned int irqStatus = portENTER_CRITICAL_NESTED();

4
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c vendored
View file

@ -35,9 +35,9 @@
#include "xtensa_rtos.h" #include "xtensa_rtos.h"
#if CONFIG_IDF_TARGET_ESP32S2 #if CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/clk.h" #include "esp32s2/clk.h"
#elif CONFIG_IDF_TARGET_ESP32 #elif CONFIG_IDF_TARGET_ESP32
#include "esp32/clk.h" #include "esp32/clk.h"
#endif #endif
#ifdef XT_RTOS_TIMER_INT #ifdef XT_RTOS_TIMER_INT

4
portable/ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c vendored
View file

@ -35,9 +35,9 @@
#include "freertos/portable.h" #include "freertos/portable.h"
#if CONFIG_IDF_TARGET_ESP32S2 #if CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/ets_sys.h" #include "esp32s2/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32 #elif CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/ets_sys.h" #include "esp32/rom/ets_sys.h"
#endif #endif
#if XCHAL_HAVE_EXCEPTIONS #if XCHAL_HAVE_EXCEPTIONS