Add suppport for ARM CM55 (#494)

* Add supposrt for ARM CM55

* Fix file header

* Remove duplicate code

* Refactor portmacro.h

1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is
   common to all ARMv8-M ports and portmacro.h which is different for
   different compiler and architecture. This enables us to provide
   Cortex-M55 ports without code duplication.
2. Update copy_files.py so that it copies Cortex-M55 ports correctly -
   all files except portmacro.h are used from Cortex-M33 ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
This commit is contained in:
alfred gedeon 2022-06-02 00:00:10 +02:00 committed by GitHub
parent 1ec8e49de4
commit 719ceee352
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
81 changed files with 14385 additions and 4330 deletions

View file

@ -1,10 +1,11 @@
This directory tree contains the master copy of the FreeeRTOS Cortex-M33 port.
This directory tree contains the master copy of the FreeRTOS Armv8-M and
Armv8.1-M ports.
Do not use the files located here! These file are copied into separate
FreeRTOS/Source/portable/[compiler]/ARM_CM33_NNN directories prior to each
FreeRTOS release.
FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55]_NNN directories prior to
each FreeRTOS release.
If your Cortex-M33 application uses TrustZone then use the files from the
FreeRTOS/Source/portable/[compiler]/ARM_CM33 directories.
If your Armv8-M/Armv8.1-M application uses TrustZone then use the files from the
FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55] directories.
If your Cortex-M33 application does not use TrustZone then use the files from
the FreeRTOS/Source/portable/[compiler]/ARM_CM33_NTZ directories.
If your Armv8-M/Armv8.1-M application does not use TrustZone then use the files from
the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55]_NTZ directories.

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@ -73,10 +73,10 @@ void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
" cbz r1, save_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */
" mrs r1, psp \n" /* r1 = PSP. */
" \n"
#if ( configENABLE_FPU == 1 )
" vstmdb r1!, {s0} \n" /* Trigger the defferred stacking of FPU registers. */
" vldmia r1!, {s0} \n" /* Nullify the effect of the pervious statement. */
#endif /* configENABLE_FPU */
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
" vstmdb r1!, {s0} \n" /* Trigger the deferred stacking of FPU registers. */
" vldmia r1!, {s0} \n" /* Nullify the effect of the previous statement. */
#endif /* configENABLE_FPU || configENABLE_MVE */
" \n"
#if ( configENABLE_MPU == 1 )
" mrs r2, control \n" /* r2 = CONTROL. */

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@ -64,10 +64,10 @@ SecureContext_SaveContextAsm:
cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */
mrs r1, psp /* r1 = PSP. */
#if ( configENABLE_FPU == 1 )
vstmdb r1!, {s0} /* Trigger the defferred stacking of FPU registers. */
vldmia r1!, {s0} /* Nullify the effect of the pervious statement. */
#endif /* configENABLE_FPU */
#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
vstmdb r1!, {s0} /* Trigger the deferred stacking of FPU registers. */
vldmia r1!, {s0} /* Nullify the effect of the previous statement. */
#endif /* configENABLE_FPU || configENABLE_MVE */
#if ( configENABLE_MPU == 1 )
mrs r2, control /* r2 = CONTROL. */