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Add suppport for ARM CM55 (#494)
* Add supposrt for ARM CM55 * Fix file header * Remove duplicate code * Refactor portmacro.h 1. portmacro.h is re-factored into 2 parts - portmacrocommon.h which is common to all ARMv8-M ports and portmacro.h which is different for different compiler and architecture. This enables us to provide Cortex-M55 ports without code duplication. 2. Update copy_files.py so that it copies Cortex-M55 ports correctly - all files except portmacro.h are used from Cortex-M33 ports. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
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81 changed files with 14385 additions and 4330 deletions
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@ -1,10 +1,11 @@
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This directory tree contains the master copy of the FreeeRTOS Cortex-M33 port.
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This directory tree contains the master copy of the FreeRTOS Armv8-M and
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Armv8.1-M ports.
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Do not use the files located here! These file are copied into separate
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FreeRTOS/Source/portable/[compiler]/ARM_CM33_NNN directories prior to each
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FreeRTOS release.
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FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55]_NNN directories prior to
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each FreeRTOS release.
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If your Cortex-M33 application uses TrustZone then use the files from the
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FreeRTOS/Source/portable/[compiler]/ARM_CM33 directories.
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If your Armv8-M/Armv8.1-M application uses TrustZone then use the files from the
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FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55] directories.
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If your Cortex-M33 application does not use TrustZone then use the files from
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the FreeRTOS/Source/portable/[compiler]/ARM_CM33_NTZ directories.
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If your Armv8-M/Armv8.1-M application does not use TrustZone then use the files from
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the FreeRTOS/Source/portable/[compiler]/ARM_CM[23|33|55]_NTZ directories.
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@ -73,10 +73,10 @@ void SecureContext_SaveContextAsm( SecureContext_t * pxSecureContext )
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" cbz r1, save_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */
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" mrs r1, psp \n" /* r1 = PSP. */
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" \n"
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#if ( configENABLE_FPU == 1 )
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" vstmdb r1!, {s0} \n" /* Trigger the defferred stacking of FPU registers. */
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" vldmia r1!, {s0} \n" /* Nullify the effect of the pervious statement. */
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#endif /* configENABLE_FPU */
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#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
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" vstmdb r1!, {s0} \n" /* Trigger the deferred stacking of FPU registers. */
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" vldmia r1!, {s0} \n" /* Nullify the effect of the previous statement. */
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#endif /* configENABLE_FPU || configENABLE_MVE */
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" \n"
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#if ( configENABLE_MPU == 1 )
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" mrs r2, control \n" /* r2 = CONTROL. */
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@ -64,10 +64,10 @@ SecureContext_SaveContextAsm:
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cbz r1, save_ctx_therad_mode /* Do nothing if the processor is running in the Thread Mode. */
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mrs r1, psp /* r1 = PSP. */
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#if ( configENABLE_FPU == 1 )
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vstmdb r1!, {s0} /* Trigger the defferred stacking of FPU registers. */
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vldmia r1!, {s0} /* Nullify the effect of the pervious statement. */
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#endif /* configENABLE_FPU */
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#if ( ( configENABLE_FPU == 1 ) || ( configENABLE_MVE == 1 ) )
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vstmdb r1!, {s0} /* Trigger the deferred stacking of FPU registers. */
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vldmia r1!, {s0} /* Nullify the effect of the previous statement. */
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#endif /* configENABLE_FPU || configENABLE_MVE */
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#if ( configENABLE_MPU == 1 )
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mrs r2, control /* r2 = CONTROL. */
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