mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 17:48:33 -04:00
Style: uncrusitfy
This commit is contained in:
Alfred Gedeon
alfred gedeon
parent
a5dbc2b1de
commit
718178c68a
406 changed files with 108795 additions and 106323 deletions
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@ -25,54 +25,54 @@
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM4F port.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the ARM CM4F port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
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#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
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#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t * ) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t * ) 0xe000e014 )
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#define portNVIC_SYSPRI2 ( ( volatile uint32_t * ) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
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#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
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/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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#define portVECTACTIVE_MASK ( 0xFFUL )
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#define portVECTACTIVE_MASK ( 0xFFUL )
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/* Constants required to manipulate the VFP. */
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#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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#define portINITIAL_EXC_RETURN ( 0xfffffffd )
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#define portINITIAL_XPSR ( 0x01000000 )
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#define portINITIAL_EXC_RETURN ( 0xfffffffd )
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/* Let the user override the pre-loading of the initial LR with the address of
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prvTaskExitError() in case it messes up unwinding of the stack in the
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debugger. */
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* prvTaskExitError() in case it messes up unwinding of the stack in the
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* debugger. */
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#ifdef configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#else
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/* For strict compliance with the Cortex-M spec the task start address should
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have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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* have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
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#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
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/* The priority used by the kernel is assigned to a variable to make access
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from inline assembler easier. */
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const uint32_t ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;
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* from inline assembler easier. */
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const uint32_t ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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* variable. */
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static uint32_t ulCriticalNesting = 0xaaaaaaaaUL;
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/*
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* Setup the timer to generate the tick interrupts.
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@ -96,7 +96,7 @@ extern void vPortStartFirstTask( void );
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static void prvTaskExitError( void );
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/* This exists purely to allow the const to be used from within the
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port_asm.asm assembly file. */
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* port_asm.asm assembly file. */
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const uint32_t ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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/*-----------------------------------------------------------*/
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@ -104,47 +104,52 @@ const uint32_t ulMaxSyscallInterruptPriorityConst = configMAX_SYSCALL_INTERRUPT_
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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/* Simulate the stack frame as it would be created by a context switch
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* interrupt. */
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/* Offset added to account for the way the MCU uses the stack on entry/exit
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of interrupts, and to ensure alignment. */
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pxTopOfStack--;
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/* Offset added to account for the way the MCU uses the stack on entry/exit
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* of interrupts, and to ensure alignment. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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/* Save code space by skipping register initialisation. */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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/* Save code space by skipping register initialisation. */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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/* A save method is being used that requires each task to maintain its
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own exec return value. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_EXC_RETURN;
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/* A save method is being used that requires each task to maintain its
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* own exec return value. */
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pxTopOfStack--;
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*pxTopOfStack = portINITIAL_EXC_RETURN;
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pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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return pxTopOfStack;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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static void prvTaskExitError( void )
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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/* A function that implements a task must not exit or attempt to return to
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* its caller as there is nothing to return to. If a task wants to exit it
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* should instead call vTaskDelete( NULL ).
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*
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* Artificially force an assert() to be triggered if configASSERT() is
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* defined, then stop here so application writers can catch the error. */
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configASSERT( ulCriticalNesting == ~0UL );
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portDISABLE_INTERRUPTS();
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT( ulCriticalNesting == ~0UL );
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portDISABLE_INTERRUPTS();
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for( ;; );
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for( ; ; )
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{
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}
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}
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/*-----------------------------------------------------------*/
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@ -153,98 +158,99 @@ static void prvTaskExitError( void )
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
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/* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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* See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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configASSERT( ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) );
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/* Make PendSV and SysTick the lowest priority interrupts. */
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*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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/* Make PendSV and SysTick the lowest priority interrupts. */
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*( portNVIC_SYSPRI2 ) |= portNVIC_PENDSV_PRI;
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*( portNVIC_SYSPRI2 ) |= portNVIC_SYSTICK_PRI;
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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* here already. */
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prvSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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ulCriticalNesting = 0;
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/* Initialise the critical nesting count ready for the first task. */
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ulCriticalNesting = 0;
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/* Ensure the VFP is enabled - it should be anyway. */
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vPortEnableVFP();
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/* Ensure the VFP is enabled - it should be anyway. */
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vPortEnableVFP();
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/* Lazy save always. */
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*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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/* Lazy save always. */
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*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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/* Start the first task. */
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vPortStartFirstTask();
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/* Start the first task. */
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vPortStartFirstTask();
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/* Should not get here! */
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return 0;
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( ulCriticalNesting == 1000UL );
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/* Not implemented in ports where there is nothing to return to.
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* Artificially force an assert. */
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configASSERT( ulCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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void vPortYield( void )
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{
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/* Set a PendSV to request a context switch. */
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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/* Set a PendSV to request a context switch. */
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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/* Barriers are normally not required but do ensure the code is completely
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within the specified behaviour for the architecture. */
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__DSB();
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__ISB();
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/* Barriers are normally not required but do ensure the code is completely
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* within the specified behaviour for the architecture. */
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__DSB();
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__ISB();
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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ulCriticalNesting++;
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__DSB();
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__ISB();
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portDISABLE_INTERRUPTS();
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ulCriticalNesting++;
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__DSB();
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__ISB();
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/* This is not the interrupt safe version of the enter critical function so
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assert() if it is being called from an interrupt context. Only API
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functions that end in "FromISR" can be used in an interrupt. Only assert if
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the critical nesting count is 1 to protect against recursive calls if the
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assert function also uses a critical section. */
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if( ulCriticalNesting == 1 )
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{
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configASSERT( ( ( *(portNVIC_INT_CTRL) ) & portVECTACTIVE_MASK ) == 0 );
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}
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/* This is not the interrupt safe version of the enter critical function so
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* assert() if it is being called from an interrupt context. Only API
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* functions that end in "FromISR" can be used in an interrupt. Only assert if
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* the critical nesting count is 1 to protect against recursive calls if the
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* assert function also uses a critical section. */
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if( ulCriticalNesting == 1 )
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{
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configASSERT( ( ( *( portNVIC_INT_CTRL ) ) & portVECTACTIVE_MASK ) == 0 );
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}
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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configASSERT( ulCriticalNesting );
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ulCriticalNesting--;
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if( ulCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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configASSERT( ulCriticalNesting );
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ulCriticalNesting--;
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if( ulCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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void SysTick_Handler( void )
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{
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uint32_t ulDummy;
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uint32_t ulDummy;
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ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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{
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if( xTaskIncrementTick() != pdFALSE )
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{
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/* Pend a context switch. */
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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{
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if( xTaskIncrementTick() != pdFALSE )
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{
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/* Pend a context switch. */
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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}
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/*-----------------------------------------------------------*/
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@ -254,9 +260,8 @@ uint32_t ulDummy;
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*/
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void prvSetupTimerInterrupt( void )
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{
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/* Configure SysTick to interrupt at the requested rate. */
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*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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/* Configure SysTick to interrupt at the requested rate. */
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*( portNVIC_SYSTICK_LOAD ) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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*( portNVIC_SYSTICK_CTRL ) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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}
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/*-----------------------------------------------------------*/
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@ -26,11 +26,11 @@
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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#define PORTMACRO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
|
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extern "C" {
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#endif
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/*-----------------------------------------------------------
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* Port specific definitions.
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@ -43,47 +43,47 @@ extern "C" {
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
|
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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typedef portSTACK_TYPE StackType_t;
|
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typedef long BaseType_t;
|
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typedef unsigned long UBaseType_t;
|
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|
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#if( configUSE_16_BIT_TICKS == 1 )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#else
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
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#if ( configUSE_16_BIT_TICKS == 1 )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#else
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
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|
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
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not need to be guarded with a critical section. */
|
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#define portTICK_TYPE_IS_ATOMIC 1
|
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#endif
|
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
|
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* not need to be guarded with a critical section. */
|
||||
#define portTICK_TYPE_IS_ATOMIC 1
|
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#endif
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/*-----------------------------------------------------------*/
|
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|
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/* Architecture specifics. */
|
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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#define portSTACK_GROWTH ( -1 )
|
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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/*-----------------------------------------------------------*/
|
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|
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|
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/* Scheduler utilities. */
|
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extern void vPortYield( void );
|
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#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
|
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#define portNVIC_PENDSVSET 0x10000000
|
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#define portYIELD() vPortYield()
|
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extern void vPortYield( void );
|
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#define portNVIC_INT_CTRL ( ( volatile uint32_t * ) 0xe000ed04 )
|
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#define portNVIC_PENDSVSET 0x10000000
|
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#define portYIELD() vPortYield()
|
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|
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#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET
|
||||
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
|
@ -93,40 +93,39 @@ extern void vPortYield( void );
|
|||
* Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other
|
||||
* registers. r0 is clobbered.
|
||||
*/
|
||||
#define portSET_INTERRUPT_MASK() __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
#define portSET_INTERRUPT_MASK() __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY )
|
||||
|
||||
/*
|
||||
* Set basepri back to 0 without effective other registers.
|
||||
* r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see
|
||||
* http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.
|
||||
*/
|
||||
#define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 )
|
||||
#define portCLEAR_INTERRUPT_MASK() __set_BASEPRI( 0 )
|
||||
|
||||
extern uint32_t ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( uint32_t ulNewMask );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask( x )
|
||||
extern uint32_t ulPortSetInterruptMask( void );
|
||||
extern void vPortClearInterruptMask( uint32_t ulNewMask );
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x )
|
||||
|
||||
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
extern void vPortEnterCritical( void );
|
||||
extern void vPortExitCritical( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()
|
||||
#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()
|
||||
#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
#define portNOP()
|
||||
#define portNOP()
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue