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Alfred Gedeon
alfred gedeon
parent
a5dbc2b1de
commit
718178c68a
406 changed files with 108795 additions and 106323 deletions
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@ -25,8 +25,8 @@
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the Atmel ARM7 port.
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*----------------------------------------------------------*/
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* Implementation of functions defined in portable.h for the Atmel ARM7 port.
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*----------------------------------------------------------*/
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/* Standard includes. */
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@ -49,21 +49,21 @@
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/*-----------------------------------------------------------*/
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/* Constants required to setup the initial stack. */
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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/* Constants required to setup the PIT. */
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#define port1MHz_IN_Hz ( 1000000ul )
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#define port1SECOND_IN_uS ( 1000000.0 )
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#define port1MHz_IN_Hz ( 1000000ul )
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#define port1SECOND_IN_uS ( 1000000.0 )
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/* Constants required to handle critical sections. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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#define portINT_LEVEL_SENSITIVE 0
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#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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#define portINT_LEVEL_SENSITIVE 0
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#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
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#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
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/*-----------------------------------------------------------*/
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/* Setup the PIT to generate the tick interrupts. */
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@ -73,8 +73,8 @@ static void prvSetupTimerInterrupt( void );
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static void vPortTickISR( void );
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/* ulCriticalNesting will get set to zero when the first task starts. It
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cannot be initialised to 0 as this will cause interrupts to be enabled
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during the kernel initialisation process. */
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* cannot be initialised to 0 as this will cause interrupts to be enabled
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* during the kernel initialisation process. */
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uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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/*-----------------------------------------------------------*/
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@ -85,171 +85,167 @@ uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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StackType_t *pxOriginalTOS;
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StackType_t * pxOriginalTOS;
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pxOriginalTOS = pxTopOfStack;
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pxOriginalTOS = pxTopOfStack;
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/* To ensure asserts in tasks.c don't fail, although in this case the assert
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is not really required. */
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pxTopOfStack--;
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/* To ensure asserts in tasks.c don't fail, although in this case the assert
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* is not really required. */
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pxTopOfStack--;
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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/* Setup the initial stack of the task. The stack is set exactly as
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* expected by the portRESTORE_CONTEXT() macro. */
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/* First on the stack is the return address - which in this case is the
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start of the task. The offset is added to make the return address appear
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as it would within an IRQ ISR. */
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*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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/* First on the stack is the return address - which in this case is the
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* start of the task. The offset is added to make the return address appear
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* as it would within an IRQ ISR. */
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*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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pxTopOfStack--;
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/* When the task starts is will expect to find the function parameter in
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R0. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* When the task starts is will expect to find the function parameter in
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* R0. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack--;
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/* The status register is set for system mode, with interrupts enabled. */
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*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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#ifdef THUMB_INTERWORK
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{
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/* We want the task to start in thumb mode. */
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*pxTopOfStack |= portTHUMB_MODE_BIT;
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}
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#endif
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pxTopOfStack--;
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/* The status register is set for system mode, with interrupts enabled. */
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*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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/* Interrupt flags cannot always be stored on the stack and will
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instead be stored in a variable, which is then saved as part of the
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tasks context. */
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*pxTopOfStack = portNO_CRITICAL_NESTING;
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#ifdef THUMB_INTERWORK
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{
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/* We want the task to start in thumb mode. */
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*pxTopOfStack |= portTHUMB_MODE_BIT;
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}
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#endif
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return pxTopOfStack;
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pxTopOfStack--;
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/* Interrupt flags cannot always be stored on the stack and will
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* instead be stored in a variable, which is then saved as part of the
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* tasks context. */
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*pxTopOfStack = portNO_CRITICAL_NESTING;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void vPortStartFirstTask( void );
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extern void vPortStartFirstTask( void );
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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* here already. */
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prvSetupTimerInterrupt();
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/* Start the first task. */
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vPortStartFirstTask();
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/* Start the first task. */
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vPortStartFirstTask();
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/* Should not get here! */
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return 0;
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the ARM port will require this function as there
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is nothing to return to. */
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/* It is unlikely that the ARM port will require this function as there
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* is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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static __arm void vPortTickISR( void )
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{
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volatile uint32_t ulDummy;
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/* Increment the tick count - which may wake some tasks but as the
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preemptive scheduler is not being used any woken task is not given
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processor time no matter what its priority. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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vTaskSwitchContext();
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}
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/* Clear the PIT interrupt. */
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ulDummy = AT91C_BASE_PITC->PITC_PIVR;
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/* To remove compiler warning. */
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( void ) ulDummy;
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/* The AIC is cleared in the asm wrapper, outside of this function. */
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volatile uint32_t ulDummy;
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/* Increment the tick count - which may wake some tasks but as the
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* preemptive scheduler is not being used any woken task is not given
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* processor time no matter what its priority. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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vTaskSwitchContext();
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}
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/* Clear the PIT interrupt. */
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ulDummy = AT91C_BASE_PITC->PITC_PIVR;
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/* To remove compiler warning. */
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( void ) ulDummy;
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/* The AIC is cleared in the asm wrapper, outside of this function. */
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}
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/*-----------------------------------------------------------*/
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static void prvSetupTimerInterrupt( void )
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{
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const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
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const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
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/* Setup the PIT for the required frequency. */
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PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
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/* Setup the PIT interrupt. */
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AIC_DisableIT( AT91C_ID_SYS );
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AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
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AIC_EnableIT( AT91C_ID_SYS );
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PIT_EnableIT();
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/* Setup the PIT for the required frequency. */
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PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
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/* Setup the PIT interrupt. */
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AIC_DisableIT( AT91C_ID_SYS );
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AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
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AIC_EnableIT( AT91C_ID_SYS );
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PIT_EnableIT();
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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/* Disable interrupts first! */
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__disable_irq();
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/* Disable interrupts first! */
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__disable_irq();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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* directly. Increment ulCriticalNesting to keep a count of how many times
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* portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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{
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/* Decrement the nesting count as we are leaving a critical section. */
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ulCriticalNesting--;
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if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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{
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/* Decrement the nesting count as we are leaving a critical section. */
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ulCriticalNesting--;
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/* If the nesting level has reached zero then interrupts should be
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re-enabled. */
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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__enable_irq();
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}
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}
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/* If the nesting level has reached zero then interrupts should be
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* re-enabled. */
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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__enable_irq();
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}
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}
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}
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/*-----------------------------------------------------------*/
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