mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-09-01 11:53:53 -04:00
Style: uncrusitfy
This commit is contained in:
parent
a5dbc2b1de
commit
718178c68a
406 changed files with 108795 additions and 106323 deletions
|
@ -1,78 +1,96 @@
|
|||
EXTERN pxCurrentTCB
|
||||
EXTERN ulCriticalNesting
|
||||
EXTERN pxCurrentTCB
|
||||
EXTERN ulCriticalNesting
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Context save and restore macro definitions
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;
|
||||
Context save and restore macro definitions
|
||||
;
|
||||
|
||||
portSAVE_CONTEXT MACRO
|
||||
|
||||
; Push R0 as we are going to use the register.
|
||||
STMDB SP!, {R0}
|
||||
;
|
||||
Push R0 as we are going to use the register.
|
||||
STMDB SP !, { R0 }
|
||||
|
||||
; Set R0 to point to the task stack pointer.
|
||||
STMDB SP, {SP}^
|
||||
NOP
|
||||
SUB SP, SP, #4
|
||||
LDMIA SP!, {R0}
|
||||
;
|
||||
Set R0 to point to the task stack pointer.
|
||||
STMDB SP, { SP } ^
|
||||
NOP
|
||||
SUB SP, SP, # 4
|
||||
LDMIA SP !, { R0 }
|
||||
|
||||
; Push the return address onto the stack.
|
||||
STMDB R0!, {LR}
|
||||
;
|
||||
Push the return address onto the stack.
|
||||
STMDB R0 !, { LR }
|
||||
|
||||
; Now we have saved LR we can use it instead of R0.
|
||||
MOV LR, R0
|
||||
;
|
||||
|
||||
; Pop R0 so we can save it onto the system mode stack.
|
||||
LDMIA SP!, {R0}
|
||||
Now we have saved LR we can use it instead of R0.
|
||||
MOV LR, R0
|
||||
|
||||
; Push all the system mode registers onto the task stack.
|
||||
STMDB LR, {R0-LR}^
|
||||
NOP
|
||||
SUB LR, LR, #60
|
||||
;
|
||||
Pop R0 so we can save it onto the system mode stack.
|
||||
LDMIA SP !, { R0 }
|
||||
|
||||
; Push the SPSR onto the task stack.
|
||||
MRS R0, SPSR
|
||||
STMDB LR!, {R0}
|
||||
;
|
||||
Push all the system mode registers onto the task stack.
|
||||
STMDB LR, { R0 - LR } ^
|
||||
NOP
|
||||
SUB LR, LR, # 60
|
||||
|
||||
LDR R0, =ulCriticalNesting
|
||||
LDR R0, [R0]
|
||||
STMDB LR!, {R0}
|
||||
;
|
||||
Push the SPSR onto the task stack.
|
||||
MRS R0, SPSR
|
||||
STMDB LR !, { R0 }
|
||||
|
||||
; Store the new top of stack for the task.
|
||||
LDR R1, =pxCurrentTCB
|
||||
LDR R0, [R1]
|
||||
STR LR, [R0]
|
||||
LDR R0, = ulCriticalNesting
|
||||
LDR R0, [ R0 ]
|
||||
STMDB LR !, { R0 }
|
||||
|
||||
ENDM
|
||||
;
|
||||
Store the new top of stack for the task.
|
||||
LDR R1, = pxCurrentTCB
|
||||
LDR R0, [ R1 ]
|
||||
STR LR, [ R0 ]
|
||||
|
||||
ENDM
|
||||
|
||||
|
||||
portRESTORE_CONTEXT MACRO
|
||||
|
||||
; Set the LR to the task stack.
|
||||
LDR R1, =pxCurrentTCB
|
||||
LDR R0, [R1]
|
||||
LDR LR, [R0]
|
||||
;
|
||||
Set the LR to the task stack.
|
||||
LDR R1, = pxCurrentTCB
|
||||
LDR R0, [ R1 ]
|
||||
LDR LR, [ R0 ]
|
||||
|
||||
; The critical nesting depth is the first item on the stack.
|
||||
; Load it into the ulCriticalNesting variable.
|
||||
LDR R0, =ulCriticalNesting
|
||||
LDMFD LR!, {R1}
|
||||
STR R1, [R0]
|
||||
;
|
||||
The critical nesting depth is the first item on the stack.
|
||||
;
|
||||
Load it into the ulCriticalNesting variable.
|
||||
LDR R0, = ulCriticalNesting
|
||||
LDMFD LR !, { R1 }
|
||||
STR R1, [ R0 ]
|
||||
|
||||
; Get the SPSR from the stack.
|
||||
LDMFD LR!, {R0}
|
||||
MSR SPSR_cxsf, R0
|
||||
;
|
||||
Get the SPSR from the stack.
|
||||
LDMFD LR !, { R0 }
|
||||
MSR SPSR_cxsf, R0
|
||||
|
||||
; Restore all system mode registers for the task.
|
||||
LDMFD LR, {R0-R14}^
|
||||
NOP
|
||||
;
|
||||
Restore all system mode registers for the task.
|
||||
LDMFD LR, { R0 - R14 } ^
|
||||
NOP
|
||||
|
||||
; Restore the return address.
|
||||
LDR LR, [LR, #+60]
|
||||
;
|
||||
Restore the return address.
|
||||
LDR LR, [ LR, # + 60 ]
|
||||
|
||||
; And return - correcting the offset in the LR to obtain the
|
||||
; correct address.
|
||||
SUBS PC, LR, #4
|
||||
;
|
||||
|
||||
ENDM
|
||||
And return -correcting the offset in the LR to obtain the
|
||||
;
|
||||
|
||||
correct address.
|
||||
SUBS PC, LR, # 4
|
||||
|
||||
ENDM
|
||||
|
|
|
@ -25,8 +25,8 @@
|
|||
*/
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the Atmel ARM7 port.
|
||||
*----------------------------------------------------------*/
|
||||
* Implementation of functions defined in portable.h for the Atmel ARM7 port.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Standard includes. */
|
||||
|
@ -49,21 +49,21 @@
|
|||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Constants required to setup the initial stack. */
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
|
||||
#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
|
||||
#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
|
||||
#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
|
||||
|
||||
/* Constants required to setup the PIT. */
|
||||
#define port1MHz_IN_Hz ( 1000000ul )
|
||||
#define port1SECOND_IN_uS ( 1000000.0 )
|
||||
#define port1MHz_IN_Hz ( 1000000ul )
|
||||
#define port1SECOND_IN_uS ( 1000000.0 )
|
||||
|
||||
/* Constants required to handle critical sections. */
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
|
||||
|
||||
|
||||
#define portINT_LEVEL_SENSITIVE 0
|
||||
#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
|
||||
#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
|
||||
#define portINT_LEVEL_SENSITIVE 0
|
||||
#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 )
|
||||
#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Setup the PIT to generate the tick interrupts. */
|
||||
|
@ -73,8 +73,8 @@ static void prvSetupTimerInterrupt( void );
|
|||
static void vPortTickISR( void );
|
||||
|
||||
/* ulCriticalNesting will get set to zero when the first task starts. It
|
||||
cannot be initialised to 0 as this will cause interrupts to be enabled
|
||||
during the kernel initialisation process. */
|
||||
* cannot be initialised to 0 as this will cause interrupts to be enabled
|
||||
* during the kernel initialisation process. */
|
||||
uint32_t ulCriticalNesting = ( uint32_t ) 9999;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
@ -85,171 +85,167 @@ uint32_t ulCriticalNesting = ( uint32_t ) 9999;
|
|||
*
|
||||
* See header file for description.
|
||||
*/
|
||||
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
|
||||
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
|
||||
TaskFunction_t pxCode,
|
||||
void * pvParameters )
|
||||
{
|
||||
StackType_t *pxOriginalTOS;
|
||||
StackType_t * pxOriginalTOS;
|
||||
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
pxOriginalTOS = pxTopOfStack;
|
||||
|
||||
/* To ensure asserts in tasks.c don't fail, although in this case the assert
|
||||
is not really required. */
|
||||
pxTopOfStack--;
|
||||
/* To ensure asserts in tasks.c don't fail, although in this case the assert
|
||||
* is not really required. */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
expected by the portRESTORE_CONTEXT() macro. */
|
||||
/* Setup the initial stack of the task. The stack is set exactly as
|
||||
* expected by the portRESTORE_CONTEXT() macro. */
|
||||
|
||||
/* First on the stack is the return address - which in this case is the
|
||||
start of the task. The offset is added to make the return address appear
|
||||
as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
/* First on the stack is the return address - which in this case is the
|
||||
* start of the task. The offset is added to make the return address appear
|
||||
* as it would within an IRQ ISR. */
|
||||
*pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
|
||||
pxTopOfStack--;
|
||||
|
||||
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
|
||||
pxTopOfStack--;
|
||||
*pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* When the task starts is will expect to find the function parameter in
|
||||
R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
/* When the task starts is will expect to find the function parameter in
|
||||
* R0. */
|
||||
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
|
||||
pxTopOfStack--;
|
||||
|
||||
/* The status register is set for system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
|
||||
#ifdef THUMB_INTERWORK
|
||||
{
|
||||
/* We want the task to start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
#endif
|
||||
|
||||
pxTopOfStack--;
|
||||
/* The status register is set for system mode, with interrupts enabled. */
|
||||
*pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
|
||||
|
||||
/* Interrupt flags cannot always be stored on the stack and will
|
||||
instead be stored in a variable, which is then saved as part of the
|
||||
tasks context. */
|
||||
*pxTopOfStack = portNO_CRITICAL_NESTING;
|
||||
#ifdef THUMB_INTERWORK
|
||||
{
|
||||
/* We want the task to start in thumb mode. */
|
||||
*pxTopOfStack |= portTHUMB_MODE_BIT;
|
||||
}
|
||||
#endif
|
||||
|
||||
return pxTopOfStack;
|
||||
pxTopOfStack--;
|
||||
|
||||
/* Interrupt flags cannot always be stored on the stack and will
|
||||
* instead be stored in a variable, which is then saved as part of the
|
||||
* tasks context. */
|
||||
*pxTopOfStack = portNO_CRITICAL_NESTING;
|
||||
|
||||
return pxTopOfStack;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
BaseType_t xPortStartScheduler( void )
|
||||
{
|
||||
extern void vPortStartFirstTask( void );
|
||||
extern void vPortStartFirstTask( void );
|
||||
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
||||
* here already. */
|
||||
prvSetupTimerInterrupt();
|
||||
|
||||
/* Start the first task. */
|
||||
vPortStartFirstTask();
|
||||
/* Start the first task. */
|
||||
vPortStartFirstTask();
|
||||
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
/* Should not get here! */
|
||||
return 0;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEndScheduler( void )
|
||||
{
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
is nothing to return to. */
|
||||
/* It is unlikely that the ARM port will require this function as there
|
||||
* is nothing to return to. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static __arm void vPortTickISR( void )
|
||||
{
|
||||
volatile uint32_t ulDummy;
|
||||
|
||||
/* Increment the tick count - which may wake some tasks but as the
|
||||
preemptive scheduler is not being used any woken task is not given
|
||||
processor time no matter what its priority. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
|
||||
/* Clear the PIT interrupt. */
|
||||
ulDummy = AT91C_BASE_PITC->PITC_PIVR;
|
||||
|
||||
/* To remove compiler warning. */
|
||||
( void ) ulDummy;
|
||||
|
||||
/* The AIC is cleared in the asm wrapper, outside of this function. */
|
||||
volatile uint32_t ulDummy;
|
||||
|
||||
/* Increment the tick count - which may wake some tasks but as the
|
||||
* preemptive scheduler is not being used any woken task is not given
|
||||
* processor time no matter what its priority. */
|
||||
if( xTaskIncrementTick() != pdFALSE )
|
||||
{
|
||||
vTaskSwitchContext();
|
||||
}
|
||||
|
||||
/* Clear the PIT interrupt. */
|
||||
ulDummy = AT91C_BASE_PITC->PITC_PIVR;
|
||||
|
||||
/* To remove compiler warning. */
|
||||
( void ) ulDummy;
|
||||
|
||||
/* The AIC is cleared in the asm wrapper, outside of this function. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
|
||||
const uint32_t ulPeriodIn_uS = ( 1.0 / ( double ) configTICK_RATE_HZ ) * port1SECOND_IN_uS;
|
||||
|
||||
/* Setup the PIT for the required frequency. */
|
||||
PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
|
||||
|
||||
/* Setup the PIT interrupt. */
|
||||
AIC_DisableIT( AT91C_ID_SYS );
|
||||
AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
|
||||
AIC_EnableIT( AT91C_ID_SYS );
|
||||
PIT_EnableIT();
|
||||
/* Setup the PIT for the required frequency. */
|
||||
PIT_Init( ulPeriodIn_uS, BOARD_MCK / port1MHz_IN_Hz );
|
||||
|
||||
/* Setup the PIT interrupt. */
|
||||
AIC_DisableIT( AT91C_ID_SYS );
|
||||
AIC_ConfigureIT( AT91C_ID_SYS, AT91C_AIC_PRIOR_LOWEST, vPortTickISR );
|
||||
AIC_EnableIT( AT91C_ID_SYS );
|
||||
PIT_EnableIT();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortEnterCritical( void )
|
||||
{
|
||||
/* Disable interrupts first! */
|
||||
__disable_irq();
|
||||
/* Disable interrupts first! */
|
||||
__disable_irq();
|
||||
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
/* Now interrupts are disabled ulCriticalNesting can be accessed
|
||||
* directly. Increment ulCriticalNesting to keep a count of how many times
|
||||
* portENTER_CRITICAL() has been called. */
|
||||
ulCriticalNesting++;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vPortExitCritical( void )
|
||||
{
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
if( ulCriticalNesting > portNO_CRITICAL_NESTING )
|
||||
{
|
||||
/* Decrement the nesting count as we are leaving a critical section. */
|
||||
ulCriticalNesting--;
|
||||
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
__enable_irq();
|
||||
}
|
||||
}
|
||||
/* If the nesting level has reached zero then interrupts should be
|
||||
* re-enabled. */
|
||||
if( ulCriticalNesting == portNO_CRITICAL_NESTING )
|
||||
{
|
||||
__enable_irq();
|
||||
}
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
|
@ -26,13 +26,13 @@
|
|||
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#include <intrinsics.h>
|
||||
#include <intrinsics.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
|
@ -45,69 +45,67 @@ extern "C" {
|
|||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
#define portCHAR char
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG long
|
||||
#define portSHORT short
|
||||
#define portSTACK_TYPE uint32_t
|
||||
#define portBASE_TYPE long
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef long BaseType_t;
|
||||
typedef unsigned long UBaseType_t;
|
||||
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
#if ( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Hardware specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portYIELD() asm ( "SWI 0" )
|
||||
#define portNOP() asm ( "NOP" )
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 8
|
||||
#define portYIELD() asm ( "SWI 0" )
|
||||
#define portNOP() asm ( "NOP" )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Critical section handling. */
|
||||
__arm __interwork void vPortDisableInterruptsFromThumb( void );
|
||||
__arm __interwork void vPortEnableInterruptsFromThumb( void );
|
||||
__arm __interwork void vPortEnterCritical( void );
|
||||
__arm __interwork void vPortExitCritical( void );
|
||||
__arm __interwork void vPortDisableInterruptsFromThumb( void );
|
||||
__arm __interwork void vPortEnableInterruptsFromThumb( void );
|
||||
__arm __interwork void vPortEnterCritical( void );
|
||||
__arm __interwork void vPortExitCritical( void );
|
||||
|
||||
#define portDISABLE_INTERRUPTS() __disable_irq()
|
||||
#define portENABLE_INTERRUPTS() __enable_irq()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
#define portDISABLE_INTERRUPTS() __disable_irq()
|
||||
#define portENABLE_INTERRUPTS() __enable_irq()
|
||||
#define portENTER_CRITICAL() vPortEnterCritical()
|
||||
#define portEXIT_CRITICAL() vPortExitCritical()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task utilities. */
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
{ \
|
||||
extern void vTaskSwitchContext( void ); \
|
||||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
}
|
||||
#define portEND_SWITCHING_ISR( xSwitchRequired ) \
|
||||
{ \
|
||||
extern void vTaskSwitchContext( void ); \
|
||||
\
|
||||
if( xSwitchRequired ) \
|
||||
{ \
|
||||
vTaskSwitchContext(); \
|
||||
} \
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue