mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Style: uncrusitfy
This commit is contained in:
Alfred Gedeon
alfred gedeon
parent
a5dbc2b1de
commit
718178c68a
406 changed files with 108795 additions and 106323 deletions
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@ -1,4 +1,5 @@
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/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief FreeRTOS port source for AVR32 UC3.
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@ -49,26 +50,26 @@
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#include "gpio.h"
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#if configDBG
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#include "usart.h"
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#include "usart.h"
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#endif
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#if( configTICK_USE_TC==1 )
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#include "tc.h"
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#if ( configTICK_USE_TC == 1 )
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#include "tc.h"
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#endif
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/* Constants required to setup the task context. */
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#define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )
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#define portINITIAL_SR ( ( StackType_t ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
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#define portINSTRUCTION_SIZE ( ( StackType_t ) 0 )
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/* Each task maintains its own critical nesting variable. */
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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volatile uint32_t ulCriticalNesting = 9999UL;
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#if( configTICK_USE_TC==0 )
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static void prvScheduleNextTick( void );
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#if ( configTICK_USE_TC == 0 )
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static void prvScheduleNextTick( void );
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#else
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static void prvClearTcInt( void );
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static void prvClearTcInt( void );
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#endif
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/* Setup the timer to generate the tick interrupts. */
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@ -80,145 +81,149 @@ static void prvSetupTimerInterrupt( void );
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* Low-level initialization routine called during startup, before the main
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* function.
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*/
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int __low_level_init(void)
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int __low_level_init( void )
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{
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#if configHEAP_INIT
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#pragma segment = "HEAP"
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BaseType_t *pxMem;
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#endif
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#if configHEAP_INIT
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#pragma segment = "HEAP"
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BaseType_t * pxMem;
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#endif
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/* Enable exceptions. */
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ENABLE_ALL_EXCEPTIONS();
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/* Enable exceptions. */
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ENABLE_ALL_EXCEPTIONS();
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/* Initialize interrupt handling. */
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INTC_init_interrupts();
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/* Initialize interrupt handling. */
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INTC_init_interrupts();
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#if configHEAP_INIT
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{
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/* Initialize the heap used by malloc. */
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for( pxMem = __segment_begin( "HEAP" ); pxMem < ( BaseType_t * ) __segment_end( "HEAP" ); )
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{
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*pxMem++ = 0xA5A5A5A5;
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}
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}
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#endif
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#if configHEAP_INIT
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{
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/* Initialize the heap used by malloc. */
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for( pxMem = __segment_begin( "HEAP" ); pxMem < ( BaseType_t * ) __segment_end( "HEAP" ); )
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{
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*pxMem++ = 0xA5A5A5A5;
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}
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}
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#endif
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/* Code section present if and only if the debug trace is activated. */
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#if configDBG
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{
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static const gpio_map_t DBG_USART_GPIO_MAP =
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{
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{ configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
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{ configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
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};
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/* Code section present if and only if the debug trace is activated. */
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#if configDBG
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{
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static const gpio_map_t DBG_USART_GPIO_MAP =
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{
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{ configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
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{ configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
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};
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static const usart_options_t DBG_USART_OPTIONS =
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{
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.baudrate = configDBG_USART_BAUDRATE,
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.charlength = 8,
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.paritytype = USART_NO_PARITY,
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.stopbits = USART_1_STOPBIT,
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.channelmode = USART_NORMAL_CHMODE
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};
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static const usart_options_t DBG_USART_OPTIONS =
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{
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.baudrate = configDBG_USART_BAUDRATE,
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.charlength = 8,
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.paritytype = USART_NO_PARITY,
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.stopbits = USART_1_STOPBIT,
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.channelmode = USART_NORMAL_CHMODE
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};
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/* Initialize the USART used for the debug trace with the configured parameters. */
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extern volatile avr32_usart_t *volatile stdio_usart_base;
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stdio_usart_base = configDBG_USART;
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gpio_enable_module( DBG_USART_GPIO_MAP,
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sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
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usart_init_rs232(configDBG_USART, &DBG_USART_OPTIONS, configCPU_CLOCK_HZ);
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}
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#endif
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/* Initialize the USART used for the debug trace with the configured parameters. */
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extern volatile avr32_usart_t * volatile stdio_usart_base;
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stdio_usart_base = configDBG_USART;
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gpio_enable_module( DBG_USART_GPIO_MAP,
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sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[ 0 ] ) );
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usart_init_rs232( configDBG_USART, &DBG_USART_OPTIONS, configCPU_CLOCK_HZ );
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}
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#endif /* if configDBG */
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/* Request initialization of data segments. */
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return 1;
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/* Request initialization of data segments. */
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return 1;
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}
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/*-----------------------------------------------------------*/
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/* Added as there is no such function in FreeRTOS. */
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void *pvPortRealloc( void *pv, size_t xWantedSize )
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void * pvPortRealloc( void * pv,
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size_t xWantedSize )
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{
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void *pvReturn;
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void * pvReturn;
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vTaskSuspendAll();
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{
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pvReturn = realloc( pv, xWantedSize );
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}
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xTaskResumeAll();
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vTaskSuspendAll();
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{
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pvReturn = realloc( pv, xWantedSize );
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}
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xTaskResumeAll();
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return pvReturn;
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return pvReturn;
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}
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/*-----------------------------------------------------------*/
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/* The cooperative scheduler requires a normal IRQ service routine to
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simply increment the system tick. */
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* simply increment the system tick. */
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/* The preemptive scheduler is defined as "naked" as the full context is saved
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on entry as part of the context switch. */
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#pragma shadow_registers = full // Naked.
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* on entry as part of the context switch. */
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#pragma shadow_registers = full /* Naked. */
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static void vTick( void )
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{
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_OS_INT();
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_OS_INT();
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#if( configTICK_USE_TC==1 )
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/* Clear the interrupt flag. */
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prvClearTcInt();
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#else
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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clock cycles from now. */
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prvScheduleNextTick();
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#endif
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#if ( configTICK_USE_TC == 1 )
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/* Clear the interrupt flag. */
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prvClearTcInt();
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#else
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/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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calls in a critical section . */
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portENTER_CRITICAL();
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xTaskIncrementTick();
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portEXIT_CRITICAL();
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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* clock cycles from now. */
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prvScheduleNextTick();
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#endif
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/* Restore the context of the "elected task". */
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portRESTORE_CONTEXT_OS_INT();
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/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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* calls in a critical section . */
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portENTER_CRITICAL();
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xTaskIncrementTick();
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portEXIT_CRITICAL();
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/* Restore the context of the "elected task". */
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portRESTORE_CONTEXT_OS_INT();
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}
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/*-----------------------------------------------------------*/
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#pragma shadow_registers = full // Naked.
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#pragma shadow_registers = full /* Naked. */
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void SCALLYield( void )
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{
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_SCALL();
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vTaskSwitchContext();
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portRESTORE_CONTEXT_SCALL();
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT_SCALL();
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vTaskSwitchContext();
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portRESTORE_CONTEXT_SCALL();
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}
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/*-----------------------------------------------------------*/
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/* The code generated by the GCC compiler uses the stack in different ways at
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different optimisation levels. The interrupt flags can therefore not always
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be saved to the stack. Instead the critical section nesting level is stored
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in a variable, which is then saved as part of the stack context. */
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* different optimisation levels. The interrupt flags can therefore not always
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* be saved to the stack. Instead the critical section nesting level is stored
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* in a variable, which is then saved as part of the stack context. */
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#pragma optimize = no_inline
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void vPortEnterCritical( void )
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{
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/* Disable interrupts */
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portDISABLE_INTERRUPTS();
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/* Disable interrupts */
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portDISABLE_INTERRUPTS();
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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directly. Increment ulCriticalNesting to keep a count of how many times
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portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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* directly. Increment ulCriticalNesting to keep a count of how many times
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* portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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#pragma optimize = no_inline
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void vPortExitCritical( void )
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{
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if(ulCriticalNesting > portNO_CRITICAL_NESTING)
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{
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ulCriticalNesting--;
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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/* Enable all interrupt/exception. */
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portENABLE_INTERRUPTS();
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}
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}
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if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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{
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ulCriticalNesting--;
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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/* Enable all interrupt/exception. */
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portENABLE_INTERRUPTS();
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}
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}
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}
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/*-----------------------------------------------------------*/
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@ -228,178 +233,184 @@ void vPortExitCritical( void )
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*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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{
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/* Setup the initial stack of the task. The stack is set exactly as
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expected by the portRESTORE_CONTEXT() macro. */
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/* Setup the initial stack of the task. The stack is set exactly as
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* expected by the portRESTORE_CONTEXT() macro. */
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/* When the task starts, it will expect to find the function parameter in R12. */
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pxTopOfStack--;
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*pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */
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*pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */
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*pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */
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*pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */
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*pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */
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*pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */
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*pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
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*pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */
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*pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */
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*pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */
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*pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */
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*pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */
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*pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */
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*pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */
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*pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */
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*pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */
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*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
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/* When the task starts, it will expect to find the function parameter in R12. */
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pxTopOfStack--;
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*pxTopOfStack-- = ( StackType_t ) 0x08080808; /* R8 */
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*pxTopOfStack-- = ( StackType_t ) 0x09090909; /* R9 */
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*pxTopOfStack-- = ( StackType_t ) 0x0A0A0A0A; /* R10 */
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*pxTopOfStack-- = ( StackType_t ) 0x0B0B0B0B; /* R11 */
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*pxTopOfStack-- = ( StackType_t ) pvParameters; /* R12 */
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*pxTopOfStack-- = ( StackType_t ) 0xDEADBEEF; /* R14/LR */
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*pxTopOfStack-- = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
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*pxTopOfStack-- = ( StackType_t ) portINITIAL_SR; /* SR */
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*pxTopOfStack-- = ( StackType_t ) 0xFF0000FF; /* R0 */
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*pxTopOfStack-- = ( StackType_t ) 0x01010101; /* R1 */
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*pxTopOfStack-- = ( StackType_t ) 0x02020202; /* R2 */
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*pxTopOfStack-- = ( StackType_t ) 0x03030303; /* R3 */
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*pxTopOfStack-- = ( StackType_t ) 0x04040404; /* R4 */
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*pxTopOfStack-- = ( StackType_t ) 0x05050505; /* R5 */
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*pxTopOfStack-- = ( StackType_t ) 0x06060606; /* R6 */
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*pxTopOfStack-- = ( StackType_t ) 0x07070707; /* R7 */
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*pxTopOfStack = ( StackType_t ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
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return pxTopOfStack;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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* here already. */
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prvSetupTimerInterrupt();
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/* Start the first task. */
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portRESTORE_CONTEXT();
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/* Start the first task. */
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portRESTORE_CONTEXT();
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/* Should not get here! */
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return 0;
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the AVR32 port will require this function as there
|
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is nothing to return to. */
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/* It is unlikely that the AVR32 port will require this function as there
|
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* is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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|
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/* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
|
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clock cycles from now. */
|
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#if( configTICK_USE_TC==0 )
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static void prvScheduleFirstTick(void)
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{
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uint32_t lCycles;
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* clock cycles from now. */
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#if ( configTICK_USE_TC == 0 )
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static void prvScheduleFirstTick( void )
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{
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uint32_t lCycles;
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lCycles = Get_system_register(AVR32_COUNT);
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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// generation feature does not get disabled.
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if(0 == lCycles)
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{
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lCycles++;
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}
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Set_system_register(AVR32_COMPARE, lCycles);
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}
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#pragma optimize = no_inline
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static void prvScheduleNextTick(void)
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{
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uint32_t lCycles, lCount;
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lCycles = Get_system_register( AVR32_COUNT );
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lCycles += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
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lCycles = Get_system_register(AVR32_COMPARE);
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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// If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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// generation feature does not get disabled.
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if(0 == lCycles)
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{
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lCycles++;
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}
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lCount = Get_system_register(AVR32_COUNT);
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if( lCycles < lCount )
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{ // We missed a tick, recover for the next.
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lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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}
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Set_system_register(AVR32_COMPARE, lCycles);
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}
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#else
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#pragma optimize = no_inline
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static void prvClearTcInt(void)
|
||||
{
|
||||
AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
|
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}
|
||||
#endif
|
||||
/* If lCycles ends up to be 0, make it 1 so that the COMPARE and exception */
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/* generation feature does not get disabled. */
|
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if( 0 == lCycles )
|
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{
|
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lCycles++;
|
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}
|
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|
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Set_system_register( AVR32_COMPARE, lCycles );
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}
|
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|
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#pragma optimize = no_inline
|
||||
static void prvScheduleNextTick( void )
|
||||
{
|
||||
uint32_t lCycles, lCount;
|
||||
|
||||
lCycles = Get_system_register( AVR32_COMPARE );
|
||||
lCycles += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
|
||||
|
||||
/* If lCycles ends up to be 0, make it 1 so that the COMPARE and exception */
|
||||
/* generation feature does not get disabled. */
|
||||
if( 0 == lCycles )
|
||||
{
|
||||
lCycles++;
|
||||
}
|
||||
|
||||
lCount = Get_system_register( AVR32_COUNT );
|
||||
|
||||
if( lCycles < lCount )
|
||||
{ /* We missed a tick, recover for the next. */
|
||||
lCycles += ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
|
||||
}
|
||||
|
||||
Set_system_register( AVR32_COMPARE, lCycles );
|
||||
}
|
||||
#else /* if ( configTICK_USE_TC == 0 ) */
|
||||
#pragma optimize = no_inline
|
||||
static void prvClearTcInt( void )
|
||||
{
|
||||
AVR32_TC.channel[ configTICK_TC_CHANNEL ].sr;
|
||||
}
|
||||
#endif /* if ( configTICK_USE_TC == 0 ) */
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Setup the timer to generate the tick interrupts. */
|
||||
static void prvSetupTimerInterrupt(void)
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
{
|
||||
#if( configTICK_USE_TC==1 )
|
||||
#if ( configTICK_USE_TC == 1 )
|
||||
volatile avr32_tc_t * tc = &AVR32_TC;
|
||||
|
||||
volatile avr32_tc_t *tc = &AVR32_TC;
|
||||
/* Options for waveform genration. */
|
||||
tc_waveform_opt_t waveform_opt =
|
||||
{
|
||||
.channel = configTICK_TC_CHANNEL, /* Channel selection. */
|
||||
|
||||
// Options for waveform genration.
|
||||
tc_waveform_opt_t waveform_opt =
|
||||
{
|
||||
.channel = configTICK_TC_CHANNEL, /* Channel selection. */
|
||||
.bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
|
||||
.beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
|
||||
.bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
|
||||
.bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
|
||||
|
||||
.bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
|
||||
.beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
|
||||
.bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
|
||||
.bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
|
||||
.aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
|
||||
.aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
|
||||
.acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
|
||||
.acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
|
||||
|
||||
.aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
|
||||
.aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
|
||||
.acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
|
||||
.acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
|
||||
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, /* Waveform selection: Up mode without automatic trigger on RC compare. */
|
||||
.enetrg = FALSE, /* External event trigger enable. */
|
||||
.eevt = 0, /* External event selection. */
|
||||
.eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
|
||||
.cpcdis = FALSE, /* Counter disable when RC compare. */
|
||||
.cpcstop = FALSE, /* Counter clock stopped with RC compare. */
|
||||
|
||||
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
|
||||
.enetrg = FALSE, /* External event trigger enable. */
|
||||
.eevt = 0, /* External event selection. */
|
||||
.eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
|
||||
.cpcdis = FALSE, /* Counter disable when RC compare. */
|
||||
.cpcstop = FALSE, /* Counter clock stopped with RC compare. */
|
||||
.burst = FALSE, /* Burst signal selection. */
|
||||
.clki = FALSE, /* Clock inversion. */
|
||||
.tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
|
||||
};
|
||||
|
||||
.burst = FALSE, /* Burst signal selection. */
|
||||
.clki = FALSE, /* Clock inversion. */
|
||||
.tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
|
||||
};
|
||||
tc_interrupt_t tc_interrupt =
|
||||
{
|
||||
.etrgs = 0,
|
||||
.ldrbs = 0,
|
||||
.ldras = 0,
|
||||
.cpcs = 1,
|
||||
.cpbs = 0,
|
||||
.cpas = 0,
|
||||
.lovrs = 0,
|
||||
.covfs = 0,
|
||||
};
|
||||
#endif /* if ( configTICK_USE_TC == 1 ) */
|
||||
|
||||
tc_interrupt_t tc_interrupt =
|
||||
{
|
||||
.etrgs=0,
|
||||
.ldrbs=0,
|
||||
.ldras=0,
|
||||
.cpcs =1,
|
||||
.cpbs =0,
|
||||
.cpas =0,
|
||||
.lovrs=0,
|
||||
.covfs=0,
|
||||
};
|
||||
/* Disable all interrupt/exception. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
#endif
|
||||
/* Register the compare interrupt handler to the interrupt controller and
|
||||
* enable the compare interrupt. */
|
||||
|
||||
/* Disable all interrupt/exception. */
|
||||
portDISABLE_INTERRUPTS();
|
||||
#if ( configTICK_USE_TC == 1 )
|
||||
{
|
||||
INTC_register_interrupt( ( __int_handler ) & vTick, configTICK_TC_IRQ, INT0 );
|
||||
|
||||
/* Register the compare interrupt handler to the interrupt controller and
|
||||
enable the compare interrupt. */
|
||||
/* Initialize the timer/counter. */
|
||||
tc_init_waveform( tc, &waveform_opt );
|
||||
|
||||
#if( configTICK_USE_TC==1 )
|
||||
{
|
||||
INTC_register_interrupt((__int_handler)&vTick, configTICK_TC_IRQ, INT0);
|
||||
/* Set the compare triggers.
|
||||
* Remember TC counter is 16-bits, so counting second is not possible!
|
||||
* That's why we configure it to count ms. */
|
||||
tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4 ) / configTICK_RATE_HZ );
|
||||
|
||||
/* Initialize the timer/counter. */
|
||||
tc_init_waveform(tc, &waveform_opt);
|
||||
tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
|
||||
|
||||
/* Set the compare triggers.
|
||||
Remember TC counter is 16-bits, so counting second is not possible!
|
||||
That's why we configure it to count ms. */
|
||||
tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
|
||||
|
||||
tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
|
||||
|
||||
/* Start the timer/counter. */
|
||||
tc_start(tc, configTICK_TC_CHANNEL);
|
||||
}
|
||||
#else
|
||||
{
|
||||
INTC_register_interrupt((__int_handler)&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
|
||||
prvScheduleFirstTick();
|
||||
}
|
||||
#endif
|
||||
/* Start the timer/counter. */
|
||||
tc_start( tc, configTICK_TC_CHANNEL );
|
||||
}
|
||||
#else /* if ( configTICK_USE_TC == 1 ) */
|
||||
{
|
||||
INTC_register_interrupt( ( __int_handler ) & vTick, AVR32_CORE_COMPARE_IRQ, INT0 );
|
||||
prvScheduleFirstTick();
|
||||
}
|
||||
#endif /* if ( configTICK_USE_TC == 1 ) */
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue