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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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Style: uncrusitfy
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Alfred Gedeon
alfred gedeon
parent
a5dbc2b1de
commit
718178c68a
406 changed files with 108795 additions and 106323 deletions
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@ -39,38 +39,38 @@
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint8_t
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#define portBASE_TYPE char
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint8_t
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#define portBASE_TYPE char
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typedef portSTACK_TYPE StackType_t;
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typedef signed char BaseType_t;
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typedef unsigned char UBaseType_t;
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typedef portSTACK_TYPE StackType_t;
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typedef signed char BaseType_t;
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typedef unsigned char UBaseType_t;
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#if( configUSE_16_BIT_TICKS == 1 )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#if ( configUSE_16_BIT_TICKS == 1 )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#else
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#endif
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portBYTE_ALIGNMENT 1
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portYIELD() __asm( "swi" );
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#define portNOP() __asm( "nop" );
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#define portBYTE_ALIGNMENT 1
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portYIELD() __asm( "swi" );
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#define portNOP() __asm( "nop" );
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/*-----------------------------------------------------------*/
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/* Critical section handling. */
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#define portENABLE_INTERRUPTS() __asm( "cli" )
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#define portDISABLE_INTERRUPTS() __asm( "sei" )
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#define portENABLE_INTERRUPTS() __asm( "cli" )
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#define portDISABLE_INTERRUPTS() __asm( "sei" )
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/*
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* Disable interrupts before incrementing the count of critical section nesting.
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@ -78,29 +78,29 @@ typedef unsigned char UBaseType_t;
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* re-enabled. Once interrupts are disabled the nesting count can be accessed
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* directly. Each task maintains its own nesting count.
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*/
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#define portENTER_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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portDISABLE_INTERRUPTS(); \
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uxCriticalNesting++; \
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}
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#define portENTER_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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portDISABLE_INTERRUPTS(); \
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uxCriticalNesting++; \
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}
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/*
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* Interrupts are disabled so we can access the nesting count directly. If the
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* nesting is found to be 0 (no nesting) then we are leaving the critical
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* section and interrupts can be re-enabled.
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*/
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#define portEXIT_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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uxCriticalNesting--; \
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if( uxCriticalNesting == 0 ) \
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{ \
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portENABLE_INTERRUPTS(); \
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} \
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}
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#define portEXIT_CRITICAL() \
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{ \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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uxCriticalNesting--; \
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if( uxCriticalNesting == 0 ) \
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{ \
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portENABLE_INTERRUPTS(); \
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} \
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}
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/*-----------------------------------------------------------*/
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/* Task utilities. */
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@ -116,70 +116,71 @@ typedef unsigned char UBaseType_t;
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*/
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#ifdef BANKED_MODEL
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/*
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* Load the stack pointer for the task, then pull the critical nesting
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* count and PPAGE register from the stack. The remains of the
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* context are restored by the RTI instruction.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "lds 0, x" ); \
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__asm( "pula" ); \
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__asm( "staa uxCriticalNesting" ); \
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__asm( "pula" ); \
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__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \
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}
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/*
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* By the time this macro is called the processor has already stacked the
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* registers. Simply stack the nesting count and PPAGE value, then save
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* the task stack pointer.
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*/
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \
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__asm( "psha" ); \
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__asm( "ldaa uxCriticalNesting" ); \
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__asm( "psha" ); \
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "sts 0, x" ); \
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}
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#else
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/*
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* Load the stack pointer for the task, then pull the critical nesting
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* count and PPAGE register from the stack. The remains of the
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* context are restored by the RTI instruction.
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*/
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "lds 0, x" ); \
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__asm( "pula" ); \
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__asm( "staa uxCriticalNesting" ); \
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__asm( "pula" ); \
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__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \
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}
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/*
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* These macros are as per the BANKED versions above, but without saving
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* and restoring the PPAGE register.
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*/
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/*
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* By the time this macro is called the processor has already stacked the
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* registers. Simply stack the nesting count and PPAGE value, then save
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* the task stack pointer.
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*/
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \
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__asm( "psha" ); \
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__asm( "ldaa uxCriticalNesting" ); \
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__asm( "psha" ); \
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "sts 0, x" ); \
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}
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#else /* ifdef BANKED_MODEL */
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "lds 0, x" ); \
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__asm( "pula" ); \
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__asm( "staa uxCriticalNesting" ); \
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}
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/*
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* These macros are as per the BANKED versions above, but without saving
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* and restoring the PPAGE register.
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*/
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldaa uxCriticalNesting" ); \
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__asm( "psha" ); \
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "sts 0, x" ); \
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}
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#endif
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "lds 0, x" ); \
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__asm( "pula" ); \
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__asm( "staa uxCriticalNesting" ); \
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}
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile void * pxCurrentTCB; \
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extern volatile UBaseType_t uxCriticalNesting; \
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\
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__asm( "ldaa uxCriticalNesting" ); \
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__asm( "psha" ); \
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__asm( "ldx pxCurrentTCB" ); \
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__asm( "sts 0, x" ); \
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}
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#endif /* ifdef BANKED_MODEL */
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/*
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* Utility macro to call macros above in correct order in order to perform a
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@ -187,15 +188,14 @@ typedef unsigned char UBaseType_t;
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* the ISR does not use any local (stack) variables. If the ISR uses stack
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* variables portYIELD() should be used in it's place.
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*/
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#define portTASK_SWITCH_FROM_ISR() \
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portSAVE_CONTEXT(); \
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vTaskSwitchContext(); \
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portRESTORE_CONTEXT();
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#define portTASK_SWITCH_FROM_ISR() \
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portSAVE_CONTEXT(); \
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vTaskSwitchContext(); \
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portRESTORE_CONTEXT();
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#endif /* PORTMACRO_H */
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