mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-10-17 02:07:48 -04:00
+TCP: Fix spellings (#302)
* MISRA v5 * Add spelling corrections * Update after Shubham's comments * Actually fix the spelling
This commit is contained in:
parent
ab70c1ce33
commit
6fb8b1fc33
41 changed files with 109 additions and 112 deletions
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@ -376,7 +376,7 @@ const TickType_t xShortTime = pdMS_TO_TICKS( 100UL );
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if( ( xEndTime - xStartTime ) > xMaxTime )
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{
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/* Wated more than xMaxTime, return. */
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/* Waited more than xMaxTime, return. */
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xReturn = pdFALSE;
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break;
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}
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@ -53,8 +53,8 @@ extern "C" {
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// IEEE defined Registers
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#define GMII_BMCR 0x00 // Basic Control
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#define GMII_BMSR 0x01 // Basic Status
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#define GMII_PHYID1 0x02 // PHY Idendifier 1
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#define GMII_PHYID2 0x03 // PHY Idendifier 2
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#define GMII_PHYID1 0x02 // PHY Identifier 1
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#define GMII_PHYID2 0x03 // PHY Identifier 2
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#define GMII_ANAR 0x04 // Auto_Negotiation Advertisement
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#define GMII_ANLPAR 0x05 // Auto_negotiation Link Partner Ability
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#define GMII_ANER 0x06 // Auto-negotiation Expansion
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@ -179,8 +179,8 @@ extern "C" {
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#define GMII_EXTEND_CAPAB (1 << 0) // Extended Capability
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// Bit definitions: GMII_PHYID1 0x02 PHY Idendifier 1
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// Bit definitions: GMII_PHYID2 0x03 PHY Idendifier 2
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// Bit definitions: GMII_PHYID1 0x02 PHY Identifier 1
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// Bit definitions: GMII_PHYID2 0x03 PHY Identifier 2
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#define GMII_LSB_MASK 0x3F
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#define GMII_OUI_MSB 0x0022
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#define GMII_OUI_LSB 0x05
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@ -427,7 +427,7 @@ void gmac_dev_init(Gmac* p_gmac, gmac_device_t* p_gmac_dev,
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/*
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* GMAC_DCFGR_TXCOEN: (GMAC_DCFGR) Transmitter Checksum Generation Offload Enable.
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* Note: tha SAM4E does have RX checksum offloading
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* Note: that SAM4E does have RX checksum offloading
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* but TX checksum offloading has NOT been implemented.
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*/
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@ -649,7 +649,7 @@ uint32_t gmac_dev_write(gmac_device_t* p_gmac_dev, void *p_buffer,
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if (p_buffer && ul_size) {
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/* Driver manages the ring buffer */
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/* Calculating the checksum here is faster than calculating it from the GMAC buffer
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* because withing p_buffer, it is well aligned */
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* because within p_buffer, it is well aligned */
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#if( ipconfigZERO_COPY_TX_DRIVER != 0 )
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{
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/* Zero-copy... */
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@ -859,7 +859,7 @@ void gmac_handler(gmac_device_t* p_gmac_dev)
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if (ul_isr & GMAC_ISR_RCOMP)
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ul_rsr |= GMAC_RSR_REC;
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/* Invoke callbacks which can be useful to wake op a task */
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/* Invoke callbacks which can be useful to wake up a task */
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if (p_gmac_dev->func_rx_cb) {
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p_gmac_dev->func_rx_cb(ul_rsr);
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}
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@ -1223,7 +1223,7 @@ void gmac_handler(gmac_device_t* p_gmac_dev);
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* #define ETHERNET_CONF_ETHADDR4 0xA0
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* #define ETHERNET_CONF_ETHADDR5 0x02
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* \endcode
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* -# Define the IP address configration used in the application. When DHCP
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* -# Define the IP address configuration used in the application. When DHCP
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* is enabled, this configuration is not effected.
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* - \code
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* #define ETHERNET_CONF_IPADDR0 192
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@ -1242,7 +1242,7 @@ void gmac_handler(gmac_device_t* p_gmac_dev);
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* #define ETHERNET_CONF_NET_MASK2 255
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* #define ETHERNET_CONF_NET_MASK3 0
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* \endcode
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* -# Configure the PHY maintainance interface.
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* -# Configure the PHY maintenance interface.
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* - \code
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* #define ETH_PHY_MODE GMAC_PHY_MII
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* \endcode
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@ -622,7 +622,7 @@ uint32_t gmac_dev_read(gmac_device_t* p_gmac_dev, uint8_t* p_frame,
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}
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else
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{
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/* The driver couldn't not allocate a buffer to receive a packet.
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/* The driver could not allocate a buffer to receive a packet.
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Leave the current DMA buffer in place. */
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}
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}
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@ -685,7 +685,7 @@ uint32_t gmac_dev_write(gmac_device_t* p_gmac_dev, void *p_buffer,
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if (p_buffer && ul_size) {
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/* Driver manages the ring buffer */
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/* Calculating the checksum here is faster than calculating it from the GMAC buffer
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* because withing p_buffer, it is well aligned */
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* because within p_buffer, it is well aligned */
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#if( ipconfigZERO_COPY_TX_DRIVER != 0 )
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{
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/* Zero-copy... */
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@ -853,7 +853,7 @@ void gmac_handler(gmac_device_t* p_gmac_dev)
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if (ul_isr & GMAC_ISR_RCOMP)
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ul_rsr |= GMAC_RSR_REC;
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/* Invoke callbacks which can be useful to wake op a task */
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/* Invoke callbacks which can be useful to wake up a task */
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xRxCallback( ul_rsr );
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}
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@ -616,7 +616,7 @@ size_t xExpectedLength;
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IPPacket_t *pxIPPacket;
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pxIPPacket = ( IPPacket_t * ) pxDescriptor->pucEthernetBuffer;
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/* Look at the actual length of the packet, translate it to a host-endial notation. */
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/* Look at the actual length of the packet, translate it to a host-endian notation. */
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xExpectedLength = sizeof( EthernetHeader_t ) + ( size_t ) FreeRTOS_htons( pxIPPacket->xIPHeader.usLength );
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if( xExpectedLength == ( pxDescriptor->xDataLength + 4 ) )
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@ -133,7 +133,7 @@ BaseType_t xNetworkInterfaceInitialise( void )
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BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor, BaseType_t xReleaseAfterSend )
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{
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uint8_t *buffer=NULL;
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// FreeRTOS_printf(("<-- dataLength=%d\n",pxDescriptor->xDataLength));
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if( pxDescriptor->xDataLength >= PACKET_BUFFER_SIZE )
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{
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FreeRTOS_printf(("TX buffer length %d over %d\n", pxDescriptor->xDataLength, PACKET_BUFFER_SIZE));
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@ -272,7 +272,6 @@ static void prvEMACHandlerTask( void *pvParameters )
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if( pxBufferDescriptor != NULL )
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{
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memcpy( pxBufferDescriptor->pucEthernetBuffer, buffer, dataLength );
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// FreeRTOS_printf(("--> dataLength=%d\n",dataLength));
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pxBufferDescriptor->xDataLength = dataLength;
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} else {
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numaker_eth_rx_next();
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@ -252,7 +252,7 @@ int numaker_eth_init(uint8_t *mac_addr)
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init_tx_desc();
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init_rx_desc();
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numaker_set_mac_addr(mac_addr); // need to reconfigure hardware address 'cos we just RESET emc...
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numaker_set_mac_addr(mac_addr); // need to reconfigure hardware address because we just RESET EMAC...
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/* Configure the MAC interrupt enable register. */
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@ -317,7 +317,7 @@ int numaker_eth_get_rx_buf(uint16_t *len, uint8_t **buf)
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unsigned int cur_entry, status;
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cur_entry = EMAC->CRXDSA;
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if ((cur_entry == (uint32_t)cur_rx_desc_ptr) && (!(m_status & EMAC_INTSTS_RDUIF_Msk))) // cur_entry may equal to cur_rx_desc_ptr if RDU occures
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if ((cur_entry == (uint32_t)cur_rx_desc_ptr) && (!(m_status & EMAC_INTSTS_RDUIF_Msk))) // cur_entry may equal to cur_rx_desc_ptr if RDU occurred
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return -1;
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status = cur_rx_desc_ptr->status1;
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@ -54,7 +54,7 @@
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#define BMCR_FULLDPLX 0x0100 /* Full duplex */
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#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
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#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
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#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
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#define BMCR_PDOWN 0x0800 /* Power down the DP83840 */
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#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
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#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
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#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
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@ -453,7 +453,7 @@ void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkB
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/***********************************************************************************************************************
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* Function Name: prvLinkStatusChange ()
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* Description : Function will be called when the Link Status of the phy has changed ( see ether_callback.c )
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* Arguments : xStatus : true when statyus has become high
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* Arguments : xStatus : true when status has become high
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* Return Value : void
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**********************************************************************************************************************/
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void prvLinkStatusChange( BaseType_t xStatus )
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@ -221,15 +221,15 @@ DMA TX descriptors. */
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static SemaphoreHandle_t xTXDescriptorSemaphore = NULL;
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/*
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* Note: it is adviced to define both
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* Note: it is advised to define both
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*
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* #define ipconfigZERO_COPY_RX_DRIVER 1
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* #define ipconfigZERO_COPY_TX_DRIVER 1
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*
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* The method using memcpy is slower and probaly uses more RAM memory.
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* The method using memcpy is slower and probably uses more RAM memory.
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* The possibility is left in the code just for comparison.
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*
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* It is adviced to define ETH_TXBUFNB at least 4. Note that no
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* It is advised to define ETH_TXBUFNB at least 4. Note that no
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* TX buffers are allocated in a zero-copy driver.
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*/
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/* MAC buffers: ---------------------------------------------------------*/
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@ -848,7 +848,7 @@ IPStackEvent_t xRxEvent;
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if( xSendEventStructToIPTask( &xRxEvent, ( TickType_t ) 1000 ) != pdPASS )
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{
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/* The buffer could not be sent to the stack so must be released again.
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This is a deferred handler taskr, not a real interrupt, so it is ok to
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This is a deferred handler task, not a real interrupt, so it is ok to
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use the task level function here. */
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#if( ipconfigUSE_LINKED_RX_MESSAGES != 0 )
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{
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@ -891,7 +891,7 @@ uint8_t *pucBuffer;
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while( ( pxDMARxDescriptor->Status & ETH_DMARXDESC_OWN ) == 0u )
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{
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BaseType_t xAccepted = pdTRUE;
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/* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
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/* Get the Frame Length of the received packet: subtract 4 bytes of the CRC */
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xReceivedLength = ( ( pxDMARxDescriptor->Status & ETH_DMARXDESC_FL ) >> ETH_DMARXDESC_FRAMELENGTHSHIFT ) - 4;
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pucBuffer = (uint8_t *) pxDMARxDescriptor->Buffer1Addr;
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@ -909,7 +909,7 @@ uint8_t *pucBuffer;
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if( ( pxDMARxDescriptor->Status & ( ETH_DMARXDESC_CE | ETH_DMARXDESC_IPV4HCE | ETH_DMARXDESC_FT ) ) != ETH_DMARXDESC_FT )
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{
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/* Not an Ethernet frame-type or a checmsum error. */
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/* Not an Ethernet frame-type or a checksum error. */
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xAccepted = pdFALSE;
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}
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else
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@ -920,7 +920,7 @@ uint8_t *pucBuffer;
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if( xAccepted != pdFALSE )
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{
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/* The packet wil be accepted, but check first if a new Network Buffer can
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/* The packet will be accepted, but check first if a new Network Buffer can
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be obtained. If not, the packet will still be dropped. */
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pxNewDescriptor = pxGetNetworkBufferWithDescriptor( ETH_RX_BUF_SIZE, xDescriptorWaitTime );
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@ -942,8 +942,8 @@ uint8_t *pucBuffer;
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pxCurDescriptor = pxNewDescriptor;
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if( pxNewDescriptor != NULL )
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{
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/* The packet is acepted and a new Network Buffer was created,
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copy data to the Network Bufffer. */
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/* The packet is accepted and a new Network Buffer was created,
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copy data to the Network Buffer. */
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memcpy( pxNewDescriptor->pucEthernetBuffer, pucBuffer, xReceivedLength );
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}
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}
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@ -651,7 +651,7 @@ static const char *prvRemoveSpaces( char *pcBuffer, int aBuflen, const char *pcM
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{
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char *pcTarget = pcBuffer;
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/* Utility function used to formap messages being printed only. */
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/* Utility function used to format messages being printed only. */
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while( ( *pcMessage != 0 ) && ( pcTarget < ( pcBuffer + aBuflen - 1 ) ) )
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{
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*( pcTarget++ ) = *pcMessage;
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@ -320,7 +320,7 @@ IPStackEvent_t xRxEvent;
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if( xSendEventStructToIPTask( &xRxEvent, ( TickType_t ) 1000 ) != pdPASS )
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{
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/* The buffer could not be sent to the stack so must be released again.
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This is a deferred handler taskr, not a real interrupt, so it is ok to
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This is a deferred handler task, not a real interrupt, so it is ok to
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use the task level function here. */
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#if( ipconfigUSE_LINKED_RX_MESSAGES != 0 )
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{
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@ -481,7 +481,7 @@ const uint32_t ulHz_Per_MHz = 1000000UL;
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if( ( xEndTime - xStartTime ) > xMaxTime )
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{
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/* Wated more than xMaxTime, return. */
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/* Waited more than xMaxTime, return. */
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xReturn = pdFALSE;
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break;
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}
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@ -84,12 +84,12 @@
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#define REG_MAC_ADDR_5 (0x15) /* MARH */
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#define REG_BUS_CLOCK_CTRL (0x20) /* OBCR */
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#define BUS_CLOCK_166 (0x0004) /* 166 MHz on-chip bus clock (defaul is 125MHz) */
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#define BUS_CLOCK_DIVIDEDBY_5 (0x0003) /* Bus clock devided by 5 */
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#define BUS_CLOCK_DIVIDEDBY_3 (0x0002) /* Bus clock devided by 3 */
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#define BUS_CLOCK_DIVIDEDBY_2 (0x0001) /* Bus clock devided by 2 */
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#define BUS_CLOCK_DIVIDEDBY_1 (0x0000) /* Bus clock devided by 1 */
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#define BUS_CLOCK_DIVIDED_MASK (0x0003) /* Bus clock devider mask */
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#define BUS_CLOCK_166 (0x0004) /* 166 MHz on-chip bus clock (default is 125MHz) */
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#define BUS_CLOCK_DIVIDEDBY_5 (0x0003) /* Bus clock divided by 5 */
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#define BUS_CLOCK_DIVIDEDBY_3 (0x0002) /* Bus clock divided by 3 */
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#define BUS_CLOCK_DIVIDEDBY_2 (0x0001) /* Bus clock divided by 2 */
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#define BUS_CLOCK_DIVIDEDBY_1 (0x0000) /* Bus clock divided by 1 */
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#define BUS_CLOCK_DIVIDED_MASK (0x0003) /* Bus clock divider mask */
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#define BUS_SPEED_166_MHZ (0x0004) /* Set bus speed to 166 MHz */
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#define BUS_SPEED_125_MHZ (0x0000) /* Set bus speed to 125 MHz */
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#define TX_CTRL_IP_CHECKSUM (0x0020) /* Enable IP frame checksum generation */
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#define TX_CTRL_FLUSH_QUEUE (0x0010) /* Clear transmit queue, reset tx frame pointer */
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#define TX_CTRL_FLOW_ENABLE (0x0008) /* Enable transmit flow control */
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#define TX_CTRL_PAD_ENABLE (0x0004) /* Eanble adding a padding to a packet shorter than 64 bytes */
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#define TX_CTRL_PAD_ENABLE (0x0004) /* Enable adding a padding to a packet shorter than 64 bytes */
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#define TX_CTRL_CRC_ENABLE (0x0002) /* Enable adding a CRC to the end of transmit frame */
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#define TX_CTRL_ENABLE (0x0001) /* Enable tranmsit */
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#define TX_CTRL_ENABLE (0x0001) /* Enable transmit */
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#define REG_TX_STATUS (0x72) /* TXSR */
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#define TX_STAT_LATE_COL (0x2000) /* Tranmsit late collision occurs */
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#define TX_STAT_MAX_COL (0x1000) /* Tranmsit maximum collision is reached */
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#define TX_STAT_LATE_COL (0x2000) /* Transmit late collision occurs */
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#define TX_STAT_MAX_COL (0x1000) /* Transmit maximum collision is reached */
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#define TX_FRAME_ID_MASK (0x003F) /* Transmit frame ID mask */
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#define TX_STAT_ERRORS ( TX_STAT_MAX_COL | TX_STAT_LATE_COL )
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#define RX_CTRL_IP_CHECKSUM (0x1000) /* Enable IP frame checksum verification */
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#define RX_CTRL_MAC_FILTER (0x0800) /* Receive with address that pass MAC address filtering */
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#define RX_CTRL_FLOW_ENABLE (0x0400) /* Enable receive flow control */
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#define RX_CTRL_BAD_PACKET (0x0200) /* Eanble receive CRC error frames */
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#define RX_CTRL_BAD_PACKET (0x0200) /* Enable receive CRC error frames */
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#define RX_CTRL_MULTICAST (0x0100) /* Receive multicast frames that pass the CRC hash filtering */
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#define RX_CTRL_BROADCAST (0x0080) /* Receive all the broadcast frames */
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#define RX_CTRL_ALL_MULTICAST (0x0040) /* Receive all the multicast frames (including broadcast frames) */
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@ -232,7 +232,7 @@
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#define RX_PHY_ERROR (0x0010) /* Received frame has runt error */
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#define RX_FRAME_ETHER (0x0008) /* Received frame is an Ethernet-type frame */
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#define RX_TOO_LONG (0x0004) /* Received frame length exceeds max size 0f 2048 bytes */
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#define RX_RUNT_ERROR (0x0002) /* Received frame was demaged by a collision */
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#define RX_RUNT_ERROR (0x0002) /* Received frame was damaged by a collision */
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#define RX_BAD_CRC (0x0001) /* Received frame has a CRC error */
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#define RX_ERRORS ( RX_BAD_CRC | RX_TOO_LONG | RX_RUNT_ERROR | RX_PHY_ERROR | \
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RX_ICMP_ERROR | RX_IP_ERROR | RX_TCP_ERROR | RX_UDP_ERROR )
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#define TXQ_ENQUEUE (0x0001) /* Enable enqueue tx frames one frame at a time */
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#define REG_RXQ_CMD (0x82) /* RXQCR */
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#define RXQ_STAT_TIME_INT (0x1000) /* RX interrupt is occured by timer duration */
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#define RXQ_STAT_BYTE_CNT_INT (0x0800) /* RX interrupt is occured by byte count threshold */
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#define RXQ_STAT_FRAME_CNT_INT (0x0400) /* RX interrupt is occured by frame count threshold */
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#define RXQ_STAT_TIME_INT (0x1000) /* RX interrupt is occurred by timer duration */
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#define RXQ_STAT_BYTE_CNT_INT (0x0800) /* RX interrupt is occurred by byte count threshold */
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#define RXQ_STAT_FRAME_CNT_INT (0x0400) /* RX interrupt is occurred by frame count threshold */
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#define RXQ_TWOBYTE_OFFSET (0x0200) /* Enable adding 2-byte before frame header for IP aligned with DWORD */
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#define RXQ_TIME_INT (0x0080) /* Enable RX interrupt by timer duration */
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#define RXQ_BYTE_CNT_INT (0x0040) /* Enable RX interrupt by byte count threshold */
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#define POWER_STATE_MASK (0x0003) /* Power management mode mask */
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#define REG_WAKEUP_TIME (0xD6) /* GSWUTR */
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#define WAKEUP_TIME (0xFF00) /* Min time (sec) wake-uo after detected energy */
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#define WAKEUP_TIME (0xFF00) /* Min time (sec) wake-up after detected energy */
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#define GOSLEEP_TIME (0x00FF) /* Min time (sec) before goto sleep when in energy mode */
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/*
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||||
|
@ -457,7 +457,7 @@
|
|||
#define REG_PORT_STATUS (0xF8) /* P1SR */
|
||||
#define PORT_HP_MDIX (0x8000) /* Set PHY in HP auto MDI-X mode */
|
||||
#define PORT_REVERSED_POLARITY (0x2000) /* Polarity is reversed */
|
||||
#define PORT_RX_FLOW_CTRL (0x1000) /* Reeive flow control feature is active */
|
||||
#define PORT_RX_FLOW_CTRL (0x1000) /* Receive flow control feature is active */
|
||||
#define PORT_TX_FLOW_CTRL (0x0800) /* Transmit flow control feature is active */
|
||||
#define PORT_STAT_SPEED_100MBIT (0x0400) /* Link is 100Mbps */
|
||||
#define PORT_STAT_FULL_DUPLEX (0x0200) /* Link is full duplex mode */
|
||||
|
|
|
@ -35,7 +35,7 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|||
#include "NetworkBufferManagement.h"
|
||||
#include "FreeRTOS_Stream_Buffer.h"
|
||||
|
||||
/* ======================== Standard Library inludes ======================== */
|
||||
/* ======================== Standard Library includes ======================== */
|
||||
#include <stdio.h>
|
||||
#include <unistd.h>
|
||||
#include <stdint.h>
|
||||
|
@ -652,7 +652,7 @@ int ret;
|
|||
( void ) pvParam;
|
||||
|
||||
/* Disable signals to this thread since this is a Linux pthread to be able to
|
||||
* printf and other blocking operations without being interruped and put in
|
||||
* printf and other blocking operations without being interrupted and put in
|
||||
* suspension mode by the linux port signals
|
||||
*/
|
||||
sigset_t set;
|
||||
|
@ -689,7 +689,7 @@ const time_t xMaxMSToWait = 1000;
|
|||
|
||||
( void ) pvParam;
|
||||
|
||||
/* disable signals to avoid treating this thread as a FreeRTOS task and puting
|
||||
/* disable signals to avoid treating this thread as a FreeRTOS task and putting
|
||||
* it to sleep by the scheduler */
|
||||
sigset_t set;
|
||||
sigfillset( &set );
|
||||
|
@ -833,7 +833,7 @@ static void prvInterruptSimulatorTask( void *pvParameters )
|
|||
}
|
||||
|
||||
/*!
|
||||
* @brief remove spacces from pcMessage into pcBuffer
|
||||
* @brief remove spaces from pcMessage into pcBuffer
|
||||
* @param [out] pcBuffer buffer to fill up
|
||||
* @param [in] aBuflen length of pcBuffer
|
||||
* @param [in] pcMessage original message
|
||||
|
@ -845,7 +845,7 @@ static const char * prvRemoveSpaces( char *pcBuffer,
|
|||
{
|
||||
char *pcTarget = pcBuffer;
|
||||
|
||||
/* Utility function used to formap messages being printed only. */
|
||||
/* Utility function used to format messages being printed only. */
|
||||
while( ( *pcMessage != 0 ) && ( pcTarget < ( &pcBuffer[ aBuflen - 1 ] ) ) )
|
||||
{
|
||||
*( pcTarget++ ) = *pcMessage;
|
||||
|
|
|
@ -274,7 +274,7 @@
|
|||
iptraceNETWORK_INTERFACE_TRANSMIT();
|
||||
}
|
||||
|
||||
/* else same error occurred; this normally should not happen! But the buffer is left in there so it shold be freed! */
|
||||
/* else same error occurred; this normally should not happen! But the buffer is left in there so it should be freed! */
|
||||
|
||||
/* The buffer has been sent so can be released. */
|
||||
if( xReleaseAfterSend != pdFALSE )
|
||||
|
@ -767,7 +767,7 @@
|
|||
}
|
||||
|
||||
if( !pktSuccess )
|
||||
{ /* smth went wrong; nothing sent to the */
|
||||
{ /* something went wrong; nothing sent to the */
|
||||
if( pxBufferDescriptor != 0 )
|
||||
{
|
||||
pxBufferDescriptor->pucEthernetBuffer = 0;
|
||||
|
|
|
@ -175,7 +175,7 @@
|
|||
}
|
||||
|
||||
if( !pktSuccess )
|
||||
{ /* smth went wrong; nothing sent to the */
|
||||
{ /* something went wrong; nothing sent to the */
|
||||
if( pxNetworkBuffer != NULL )
|
||||
{
|
||||
pxNetworkBuffer->pucEthernetBuffer = 0;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue