Set the RM48 directory structure to match the FreeRTOS convention.

This commit is contained in:
Richard Barry 2012-10-14 21:33:53 +00:00
parent 4410dd363e
commit 6ec4c7cecb
48 changed files with 77 additions and 18121 deletions

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/** @file gio.c
* @brief GIO Driver Inmplmentation File
* @date 10.June.2010
* @version 1.01.000
*
*/
/* (c) Texas Instruments 2009-2010, All rights reserved. */
#include "gio.h"
/** @fn void gioInit(void)
* @brief Initializes the GIO Driver
*
* This function initializes the GIO module and set the GIO ports
* to the inital values.
*/
void gioInit(void)
{
/** bring GIO module out of reset */
gioREG->GCR0 = 1;
gioREG->INTENACLR = 0xFF;
gioREG->LVLCLR = 0xFF;
/** @b initalise @b Port @b A */
/** - Port A output values */
gioPORTA->DOUT = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - Port A direction */
gioPORTA->DIR = 1 /* Bit 0 */
| (1 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - Port A open drain enable */
gioPORTA->PDR = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - Port A pullup / pulldown selection */
gioPORTA->PSL = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - Port A pullup / pulldown enable*/
gioPORTA->PULDIS = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** @b initalise @b Port @b B */
/** - Port B output values */
gioPORTB->DOUT = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - Port B direction */
gioPORTB->DIR = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - Port B open drain enable */
gioPORTB->PDR = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - Port B pullup / pulldown selection */
gioPORTB->PSL = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - Port B pullup / pulldown enable*/
gioPORTB->PULDIS = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** @b initalise @b interrupts */
/** - interrupt polarity */
gioREG->POL = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - interrupt level */
gioREG->LVLSET = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
/** - clear all pending interrupts */
gioREG->FLG = 0xFF;
/** - enable interrupts */
gioREG->INTENASET = 0 /* Bit 0 */
| (0 << 1) /* Bit 1 */
| (0 << 2) /* Bit 2 */
| (0 << 3) /* Bit 3 */
| (0 << 4) /* Bit 4 */
| (0 << 5) /* Bit 5 */
| (0 << 6) /* Bit 6 */
| (0 << 7); /* Bit 7 */
}
/** @fn void gioSetDirection(gioPORT_t *port, unsigned dir)
* @brief Set Port Direction
* @param[in] port pointer to GIO port:
* - gioPORTA: PortA pointer
* - gioPORTB: PortB pointer
* @param[in] dir value to write to DIR register
*
* Set the direction of GIO pins at runtime.
*/
void gioSetDirection(gioPORT_t *port, unsigned dir)
{
port->DIR = dir;
}
/** @fn void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value)
* @brief Write Bit
* @param[in] port pointer to GIO port:
* - gioPORTA: PortA pointer
* - gioPORTB: PortB pointer
* @param[in] bit number 0-7 that specifies the bit to be written to.
* - 0: LSB
* - 7: MSB
* @param[in] value binrary value to write to bit
*
* Writes a value to the specified pin of the given GIO port
*/
void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value)
{
if (value)
{
port->DSET = 1 << bit;
}
else
{
port->DCLR = 1 << bit;
}
}
/** @fn void gioSetPort(gioPORT_t *port, unsigned value)
* @brief Write Port Value
* @param[in] port pointer to GIO port:
* - gioPORTA: PortA pointer
* - gioPORTB: PortB pointer
* @param[in] value value to write to port
*
* Writes a value to all pin of a given GIO port
*/
void gioSetPort(gioPORT_t *port, unsigned value)
{
port->DOUT = value;
}
/** @fn unsigned gioGetBit(gioPORT_t *port, unsigned bit)
* @brief Read Bit
* @param[in] port pointer to GIO port:
* - gioPORTA: PortA pointer
* - gioPORTB: PortB pointer
* @param[in] bit number 0-7 that specifies the bit to be written to.
* - 0: LSB
* - 7: MSB
*
* Reads a the current value from the specified pin of the given GIO port
*/
unsigned gioGetBit(gioPORT_t *port, unsigned bit)
{
return (port->DIN >> bit) & 1U;
}
/** @fn unsigned gioGetPort(gioPORT_t *port)
* @brief Read Port Value
* @param[in] port pointer to GIO port:
* - gioPORTA: PortA pointer
* - gioPORTB: PortB pointer
*
* Reads a the current value of a given GIO port
*/
unsigned gioGetPort(gioPORT_t *port)
{
return port->DIN;
}
/** @fn void gioEnableNotification(unsigned bit)
* @brief Enable Interrupt
* @param[in] bit interrupt pin to enable
* - 0: LSB
* - 7: MSB
*
* Enables an innterrupt pin of PortA
*/
void gioEnableNotification(unsigned bit)
{
gioREG->INTENASET = 1 << bit;
}
/** @fn void gioDisableNotification(unsigned bit)
* @brief Disable Interrupt
* @param[in] bit interrupt pin to enable
* - 0: LSB
* - 7: MSB
*
* Disables an innterrupt pin of PortA
*/
void gioDisableNotification(unsigned bit)
{
gioREG->INTENACLR = 1 << bit;
}

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/** @file gio.h
* @brief GIO Driver Definition File
* @date 11.August.2009
* @version 1.01.000
*
*/
/* (c) Texas Instruments 2009-2010, All rights reserved. */
#ifndef __GIO_H__
#define __GIO_H__
/** @struct gioBase
* @brief GIO Base Register Definition
*
* This structure is used to access the GIO module egisters.
*/
/** @typedef gioBASE_t
* @brief GIO Register Frame Type Definition
*
* This type is used to access the GIO Registers.
*/
typedef volatile struct gioBase
{
unsigned GCR0; /**< 0x0000: Global Control Register */
unsigned PWDN; /**< 0x0004: Power Down Register */
unsigned INTDET; /**< 0x0008: Interrupt Detect Regsiter*/
unsigned POL; /**< 0x000C: Interrupt Polarity Register */
unsigned INTENASET; /**< 0x0010: Interrupt Enable Set Register */
unsigned INTENACLR; /**< 0x0014: Interrupt Enable Clear Register */
unsigned LVLSET; /**< 0x0018: Interrupt Priority Set Register */
unsigned LVLCLR; /**< 0x001C: Interrupt Priority Clear Register */
unsigned FLG; /**< 0x0020: Interrupt Flag Register */
unsigned OFFSET0; /**< 0x0024: Interrupt Offset A Register */
unsigned OFFSET1; /**< 0x0028: Interrupt Offset B Register */
} gioBASE_t;
/** @struct gioPort
* @brief GIO Port Register Definition
*/
/** @typedef gioPORT_t
* @brief GIO Port Register Type Definition
*
* This type is used to access the GIO Port Registers.
*/
typedef volatile struct gioPort
{
unsigned DIR; /**< 0x0000: Data Direction Register */
unsigned DIN; /**< 0x0004: Data Input Register */
unsigned DOUT; /**< 0x0008: Data Output Register */
unsigned DSET; /**< 0x000C: Data Output Set Register */
unsigned DCLR; /**< 0x0010: Data Output Clear Register */
unsigned PDR; /**< 0x0014: Open Drain Regsiter */
unsigned PULDIS; /**< 0x0018: Pullup Disable Register */
unsigned PSL; /**< 0x001C: Pull Up/Down Selection Register */
} gioPORT_t;
/** @def gioREG
* @brief GIO Register Frame Pointer
*
* This pointer is used by the GIO driver to access the gio module registers.
*/
#define gioREG ((gioBASE_t *)0xFFF7BC00U)
/** @def gioPORTA
* @brief GIO Port (A) Register Pointer
*
* Pointer used by the GIO driver to access PORTA
*/
#define gioPORTA ((gioPORT_t *)0xFFF7BC34U)
/** @def gioPORTB
* @brief GIO Port (B) Register Pointer
*
* Pointer used by the GIO driver to access PORTB
*/
#define gioPORTB ((gioPORT_t *)0xFFF7BC54U)
/* GIO Interface Functions */
void gioInit(void);
void gioSetDirection(gioPORT_t *port, unsigned dir);
void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value);
void gioSetPort(gioPORT_t *port, unsigned value);
unsigned gioGetBit(gioPORT_t *port, unsigned bit);
unsigned gioGetPort(gioPORT_t *port);
void gioEnableNotification(unsigned bit);
void gioDisableNotification(unsigned bit);
void gioNotification(int bit);
#endif

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/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#include "FreeRTOS.h"
#include "Task.h"
#include "gio.h"
#include "het.h"
/*
* Task that flashes the LEDS on the USB stick.
*
* This task is also run in Thumb mode to test the ARM/THUMB context switch
*/
#pragma TASK(vLedTask)
#pragma CODE_STATE(vLedTask, 16)
void vLedTask(void *pvParameters)
{
unsigned led = 0;
unsigned count = 0;
unsigned colour = 0;
/* Initalise the IO ports that drive the LEDs */
gioSetDirection(hetPORT, 0xFFFFFFFF);
/* switch all leds off */
gioSetPort(hetPORT, 0x08110034);
for(;;)
{
/* toggle on/off */
led ^= 1;
/* switch TOP row */
gioSetBit(hetPORT, 25, led);
gioSetBit(hetPORT, 18, led);
gioSetBit(hetPORT, 29, led);
/* switch BOTTOM row */
gioSetBit(hetPORT, 17, led ^ 1);
gioSetBit(hetPORT, 31, led ^ 1);
gioSetBit(hetPORT, 0, led ^ 1);
vTaskDelay(500);
if (++count > 5)
{
count = 0;
/* both leds to off */
gioSetBit(hetPORT, 2, 1); gioSetBit(hetPORT, 5, 1); gioSetBit(hetPORT, 20, 1);
gioSetBit(hetPORT, 4, 1); gioSetBit(hetPORT, 27, 1); gioSetBit(hetPORT, 16, 1);
switch(colour)
{
case 0:
gioSetBit(hetPORT, 2, 0); /* red */
gioSetBit(hetPORT, 4, 0);
colour++;
continue;
case 1:
gioSetBit(hetPORT, 5, 0); /* blue */
gioSetBit(hetPORT, 27, 0);
colour++;
continue;
case 2:
gioSetBit(hetPORT, 20, 0); /* green */
gioSetBit(hetPORT, 16, 0);
colour++;
continue;
}
colour = 0;
}
}
}

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/*
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef __HET_H__
#define __HET_H__
#include "gio.h"
/** @struct hetBase
* @brief HET Register Definition
*
* This structure is used to access the HET module egisters.
*/
/** @typedef hetBASE_t
* @brief HET Register Frame Type Definition
*
* This type is used to access the HET Registers.
*/
typedef volatile struct hetBase
{
unsigned GCR; /**< 0x0000: Global control register */
unsigned PFR; /**< 0x0004: Prescale factor register */
unsigned ADDR; /**< 0x0008: Current address register */
unsigned OFF1; /**< 0x000C: Interrupt offset register 1 */
unsigned OFF2; /**< 0x0010: Interrupt offset register 2 */
unsigned INTENAS; /**< 0x0014: Interrupt enable set register */
unsigned INTENAC; /**< 0x0018: Interrupt enable clear register */
unsigned EXC1; /**< 0x001C: Exeption control register 1 */
unsigned EXC2; /**< 0x0020: Exeption control register 2 */
unsigned PRY; /**< 0x0024: Interrupt priority register */
unsigned FLG; /**< 0x0028: Interrupt flag register */
unsigned : 32U; /**< 0x002C: Reserved */
unsigned : 32U; /**< 0x0030: Reserved */
unsigned HRSH; /**< 0x0034: High resoltion share register */
unsigned XOR; /**< 0x0038: XOR share register */
unsigned REQENS; /**< 0x003C: Request enable set register */
unsigned REQENC; /**< 0x0040: Request enable clear register */
unsigned REQDS; /**< 0x0044: Request destination select register */
unsigned : 32U; /**< 0x0048: Reserved */
unsigned DIR; /**< 0x004C: Direction register */
unsigned DIN; /**< 0x0050: Data input register */
unsigned DOUT; /**< 0x0054: Data output register */
unsigned DSET; /**< 0x0058: Data output set register */
unsigned DCLR; /**< 0x005C: Data output clear register */
unsigned PDR; /**< 0x0060: Open drain register */
unsigned PULDIS; /**< 0x0064: Pull disable register */
unsigned PSL; /**< 0x0068: Pull select register */
unsigned : 32U; /**< 0x006C: Reserved */
unsigned : 32U; /**< 0x0070: Reserved */
unsigned PCREG; /**< 0x0074: Parity control register */
unsigned PAR; /**< 0x0078: Parity address register */
unsigned PPR; /**< 0x007C: Parity pin select register */
unsigned SFPRLD; /**< 0x0080: Suppression filter preload register */
unsigned SFENA; /**< 0x0084: Suppression filter enable register */
unsigned : 32U; /**< 0x0088: Reserved */
unsigned LBPSEL; /**< 0x008C: Loop back pair select register */
unsigned LBPDIR; /**< 0x0090: Loop back pair direction register */
} hetBASE_t;
/** @def hetREG
* @brief HET Register Frame Pointer
*
* This pointer is used by the HET driver to access the het module registers.
*/
#define hetREG ((hetBASE_t *)0xFFF7B800U)
/** @def hetPORT
* @brief HET GIO Port Register Pointer
*
* Pointer used by the GIO driver to access I/O PORT of HET
* (use the GIO drivers to access the port pins).
*/
#define hetPORT ((gioPORT_t *)0xFFF7B84CU)
#endif