mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 17:48:33 -04:00
Set the RM48 directory structure to match the FreeRTOS convention.
This commit is contained in:
parent
4410dd363e
commit
6ec4c7cecb
48 changed files with 77 additions and 18121 deletions
281
FreeRTOS/Demo/CORTEX_R4_RM48_CCS5/Library/gio.c
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281
FreeRTOS/Demo/CORTEX_R4_RM48_CCS5/Library/gio.c
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/** @file gio.c
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* @brief GIO Driver Inmplmentation File
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* @date 10.June.2010
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* @version 1.01.000
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*
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*/
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/* (c) Texas Instruments 2009-2010, All rights reserved. */
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#include "gio.h"
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/** @fn void gioInit(void)
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* @brief Initializes the GIO Driver
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*
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* This function initializes the GIO module and set the GIO ports
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* to the inital values.
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*/
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void gioInit(void)
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{
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/** bring GIO module out of reset */
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gioREG->GCR0 = 1;
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gioREG->INTENACLR = 0xFF;
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gioREG->LVLCLR = 0xFF;
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/** @b initalise @b Port @b A */
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/** - Port A output values */
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gioPORTA->DOUT = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - Port A direction */
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gioPORTA->DIR = 1 /* Bit 0 */
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| (1 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - Port A open drain enable */
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gioPORTA->PDR = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - Port A pullup / pulldown selection */
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gioPORTA->PSL = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - Port A pullup / pulldown enable*/
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gioPORTA->PULDIS = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** @b initalise @b Port @b B */
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/** - Port B output values */
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gioPORTB->DOUT = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - Port B direction */
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gioPORTB->DIR = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - Port B open drain enable */
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gioPORTB->PDR = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - Port B pullup / pulldown selection */
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gioPORTB->PSL = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - Port B pullup / pulldown enable*/
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gioPORTB->PULDIS = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** @b initalise @b interrupts */
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/** - interrupt polarity */
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gioREG->POL = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - interrupt level */
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gioREG->LVLSET = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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/** - clear all pending interrupts */
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gioREG->FLG = 0xFF;
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/** - enable interrupts */
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gioREG->INTENASET = 0 /* Bit 0 */
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| (0 << 1) /* Bit 1 */
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| (0 << 2) /* Bit 2 */
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| (0 << 3) /* Bit 3 */
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| (0 << 4) /* Bit 4 */
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| (0 << 5) /* Bit 5 */
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| (0 << 6) /* Bit 6 */
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| (0 << 7); /* Bit 7 */
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}
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/** @fn void gioSetDirection(gioPORT_t *port, unsigned dir)
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* @brief Set Port Direction
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* @param[in] port pointer to GIO port:
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* - gioPORTA: PortA pointer
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* - gioPORTB: PortB pointer
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* @param[in] dir value to write to DIR register
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*
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* Set the direction of GIO pins at runtime.
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*/
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void gioSetDirection(gioPORT_t *port, unsigned dir)
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{
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port->DIR = dir;
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}
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/** @fn void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value)
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* @brief Write Bit
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* @param[in] port pointer to GIO port:
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* - gioPORTA: PortA pointer
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* - gioPORTB: PortB pointer
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* @param[in] bit number 0-7 that specifies the bit to be written to.
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* - 0: LSB
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* - 7: MSB
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* @param[in] value binrary value to write to bit
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*
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* Writes a value to the specified pin of the given GIO port
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*/
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void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value)
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{
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if (value)
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{
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port->DSET = 1 << bit;
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}
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else
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{
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port->DCLR = 1 << bit;
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}
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}
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/** @fn void gioSetPort(gioPORT_t *port, unsigned value)
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* @brief Write Port Value
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* @param[in] port pointer to GIO port:
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* - gioPORTA: PortA pointer
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* - gioPORTB: PortB pointer
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* @param[in] value value to write to port
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*
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* Writes a value to all pin of a given GIO port
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*/
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void gioSetPort(gioPORT_t *port, unsigned value)
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{
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port->DOUT = value;
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}
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/** @fn unsigned gioGetBit(gioPORT_t *port, unsigned bit)
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* @brief Read Bit
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* @param[in] port pointer to GIO port:
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* - gioPORTA: PortA pointer
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* - gioPORTB: PortB pointer
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* @param[in] bit number 0-7 that specifies the bit to be written to.
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* - 0: LSB
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* - 7: MSB
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*
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* Reads a the current value from the specified pin of the given GIO port
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*/
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unsigned gioGetBit(gioPORT_t *port, unsigned bit)
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{
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return (port->DIN >> bit) & 1U;
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}
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/** @fn unsigned gioGetPort(gioPORT_t *port)
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* @brief Read Port Value
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* @param[in] port pointer to GIO port:
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* - gioPORTA: PortA pointer
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* - gioPORTB: PortB pointer
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*
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* Reads a the current value of a given GIO port
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*/
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unsigned gioGetPort(gioPORT_t *port)
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{
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return port->DIN;
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}
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/** @fn void gioEnableNotification(unsigned bit)
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* @brief Enable Interrupt
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* @param[in] bit interrupt pin to enable
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* - 0: LSB
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* - 7: MSB
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*
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* Enables an innterrupt pin of PortA
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*/
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void gioEnableNotification(unsigned bit)
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{
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gioREG->INTENASET = 1 << bit;
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}
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/** @fn void gioDisableNotification(unsigned bit)
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* @brief Disable Interrupt
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* @param[in] bit interrupt pin to enable
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* - 0: LSB
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* - 7: MSB
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*
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* Disables an innterrupt pin of PortA
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*/
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void gioDisableNotification(unsigned bit)
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{
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gioREG->INTENACLR = 1 << bit;
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}
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94
FreeRTOS/Demo/CORTEX_R4_RM48_CCS5/Library/gio.h
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94
FreeRTOS/Demo/CORTEX_R4_RM48_CCS5/Library/gio.h
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@ -0,0 +1,94 @@
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/** @file gio.h
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* @brief GIO Driver Definition File
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* @date 11.August.2009
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* @version 1.01.000
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*
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*/
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/* (c) Texas Instruments 2009-2010, All rights reserved. */
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#ifndef __GIO_H__
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#define __GIO_H__
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/** @struct gioBase
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* @brief GIO Base Register Definition
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*
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* This structure is used to access the GIO module egisters.
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*/
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/** @typedef gioBASE_t
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* @brief GIO Register Frame Type Definition
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*
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* This type is used to access the GIO Registers.
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*/
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typedef volatile struct gioBase
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{
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unsigned GCR0; /**< 0x0000: Global Control Register */
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unsigned PWDN; /**< 0x0004: Power Down Register */
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unsigned INTDET; /**< 0x0008: Interrupt Detect Regsiter*/
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unsigned POL; /**< 0x000C: Interrupt Polarity Register */
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unsigned INTENASET; /**< 0x0010: Interrupt Enable Set Register */
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unsigned INTENACLR; /**< 0x0014: Interrupt Enable Clear Register */
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unsigned LVLSET; /**< 0x0018: Interrupt Priority Set Register */
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unsigned LVLCLR; /**< 0x001C: Interrupt Priority Clear Register */
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unsigned FLG; /**< 0x0020: Interrupt Flag Register */
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unsigned OFFSET0; /**< 0x0024: Interrupt Offset A Register */
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unsigned OFFSET1; /**< 0x0028: Interrupt Offset B Register */
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} gioBASE_t;
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/** @struct gioPort
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* @brief GIO Port Register Definition
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*/
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/** @typedef gioPORT_t
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* @brief GIO Port Register Type Definition
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*
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* This type is used to access the GIO Port Registers.
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*/
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typedef volatile struct gioPort
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{
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unsigned DIR; /**< 0x0000: Data Direction Register */
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unsigned DIN; /**< 0x0004: Data Input Register */
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unsigned DOUT; /**< 0x0008: Data Output Register */
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unsigned DSET; /**< 0x000C: Data Output Set Register */
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unsigned DCLR; /**< 0x0010: Data Output Clear Register */
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unsigned PDR; /**< 0x0014: Open Drain Regsiter */
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unsigned PULDIS; /**< 0x0018: Pullup Disable Register */
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unsigned PSL; /**< 0x001C: Pull Up/Down Selection Register */
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} gioPORT_t;
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/** @def gioREG
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* @brief GIO Register Frame Pointer
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*
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* This pointer is used by the GIO driver to access the gio module registers.
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*/
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#define gioREG ((gioBASE_t *)0xFFF7BC00U)
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/** @def gioPORTA
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* @brief GIO Port (A) Register Pointer
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*
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* Pointer used by the GIO driver to access PORTA
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*/
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#define gioPORTA ((gioPORT_t *)0xFFF7BC34U)
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/** @def gioPORTB
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* @brief GIO Port (B) Register Pointer
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*
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* Pointer used by the GIO driver to access PORTB
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*/
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#define gioPORTB ((gioPORT_t *)0xFFF7BC54U)
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/* GIO Interface Functions */
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void gioInit(void);
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void gioSetDirection(gioPORT_t *port, unsigned dir);
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void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value);
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void gioSetPort(gioPORT_t *port, unsigned value);
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unsigned gioGetBit(gioPORT_t *port, unsigned bit);
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unsigned gioGetPort(gioPORT_t *port);
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void gioEnableNotification(unsigned bit);
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void gioDisableNotification(unsigned bit);
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void gioNotification(int bit);
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#endif
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121
FreeRTOS/Demo/CORTEX_R4_RM48_CCS5/Library/het.c
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121
FreeRTOS/Demo/CORTEX_R4_RM48_CCS5/Library/het.c
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/*
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FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
|
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***************************************************************************
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* *
|
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* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
>>>NOTE<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
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#include "FreeRTOS.h"
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#include "Task.h"
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#include "gio.h"
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#include "het.h"
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/*
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* Task that flashes the LEDS on the USB stick.
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||||
*
|
||||
* This task is also run in Thumb mode to test the ARM/THUMB context switch
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||||
*/
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||||
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#pragma TASK(vLedTask)
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||||
#pragma CODE_STATE(vLedTask, 16)
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||||
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||||
void vLedTask(void *pvParameters)
|
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{
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unsigned led = 0;
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unsigned count = 0;
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unsigned colour = 0;
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||||
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||||
/* Initalise the IO ports that drive the LEDs */
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gioSetDirection(hetPORT, 0xFFFFFFFF);
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/* switch all leds off */
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gioSetPort(hetPORT, 0x08110034);
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||||
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for(;;)
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{
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/* toggle on/off */
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led ^= 1;
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/* switch TOP row */
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gioSetBit(hetPORT, 25, led);
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||||
gioSetBit(hetPORT, 18, led);
|
||||
gioSetBit(hetPORT, 29, led);
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||||
/* switch BOTTOM row */
|
||||
gioSetBit(hetPORT, 17, led ^ 1);
|
||||
gioSetBit(hetPORT, 31, led ^ 1);
|
||||
gioSetBit(hetPORT, 0, led ^ 1);
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vTaskDelay(500);
|
||||
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||||
if (++count > 5)
|
||||
{
|
||||
count = 0;
|
||||
/* both leds to off */
|
||||
gioSetBit(hetPORT, 2, 1); gioSetBit(hetPORT, 5, 1); gioSetBit(hetPORT, 20, 1);
|
||||
gioSetBit(hetPORT, 4, 1); gioSetBit(hetPORT, 27, 1); gioSetBit(hetPORT, 16, 1);
|
||||
switch(colour)
|
||||
{
|
||||
case 0:
|
||||
gioSetBit(hetPORT, 2, 0); /* red */
|
||||
gioSetBit(hetPORT, 4, 0);
|
||||
colour++;
|
||||
continue;
|
||||
case 1:
|
||||
gioSetBit(hetPORT, 5, 0); /* blue */
|
||||
gioSetBit(hetPORT, 27, 0);
|
||||
colour++;
|
||||
continue;
|
||||
case 2:
|
||||
gioSetBit(hetPORT, 20, 0); /* green */
|
||||
gioSetBit(hetPORT, 16, 0);
|
||||
colour++;
|
||||
continue;
|
||||
}
|
||||
colour = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
128
FreeRTOS/Demo/CORTEX_R4_RM48_CCS5/Library/het.h
Normal file
128
FreeRTOS/Demo/CORTEX_R4_RM48_CCS5/Library/het.h
Normal file
|
|
@ -0,0 +1,128 @@
|
|||
/*
|
||||
FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
|
||||
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS tutorial books are available in pdf and paperback. *
|
||||
* Complete, revised, and edited pdf reference manuals are also *
|
||||
* available. *
|
||||
* *
|
||||
* Purchasing FreeRTOS documentation will not only help you, by *
|
||||
* ensuring you get running as quickly as possible and with an *
|
||||
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
||||
* the FreeRTOS project to continue with its mission of providing *
|
||||
* professional grade, cross platform, de facto standard solutions *
|
||||
* for microcontrollers - completely free of charge! *
|
||||
* *
|
||||
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
||||
* *
|
||||
* Thank you for using FreeRTOS, and thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
>>>NOTE<<< The modification to the GPL is included to allow you to
|
||||
distribute a combined work that includes FreeRTOS without being obliged to
|
||||
provide the source code for proprietary components outside of the FreeRTOS
|
||||
kernel. FreeRTOS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __HET_H__
|
||||
#define __HET_H__
|
||||
|
||||
#include "gio.h"
|
||||
|
||||
/** @struct hetBase
|
||||
* @brief HET Register Definition
|
||||
*
|
||||
* This structure is used to access the HET module egisters.
|
||||
*/
|
||||
/** @typedef hetBASE_t
|
||||
* @brief HET Register Frame Type Definition
|
||||
*
|
||||
* This type is used to access the HET Registers.
|
||||
*/
|
||||
typedef volatile struct hetBase
|
||||
{
|
||||
unsigned GCR; /**< 0x0000: Global control register */
|
||||
unsigned PFR; /**< 0x0004: Prescale factor register */
|
||||
unsigned ADDR; /**< 0x0008: Current address register */
|
||||
unsigned OFF1; /**< 0x000C: Interrupt offset register 1 */
|
||||
unsigned OFF2; /**< 0x0010: Interrupt offset register 2 */
|
||||
unsigned INTENAS; /**< 0x0014: Interrupt enable set register */
|
||||
unsigned INTENAC; /**< 0x0018: Interrupt enable clear register */
|
||||
unsigned EXC1; /**< 0x001C: Exeption control register 1 */
|
||||
unsigned EXC2; /**< 0x0020: Exeption control register 2 */
|
||||
unsigned PRY; /**< 0x0024: Interrupt priority register */
|
||||
unsigned FLG; /**< 0x0028: Interrupt flag register */
|
||||
unsigned : 32U; /**< 0x002C: Reserved */
|
||||
unsigned : 32U; /**< 0x0030: Reserved */
|
||||
unsigned HRSH; /**< 0x0034: High resoltion share register */
|
||||
unsigned XOR; /**< 0x0038: XOR share register */
|
||||
unsigned REQENS; /**< 0x003C: Request enable set register */
|
||||
unsigned REQENC; /**< 0x0040: Request enable clear register */
|
||||
unsigned REQDS; /**< 0x0044: Request destination select register */
|
||||
unsigned : 32U; /**< 0x0048: Reserved */
|
||||
unsigned DIR; /**< 0x004C: Direction register */
|
||||
unsigned DIN; /**< 0x0050: Data input register */
|
||||
unsigned DOUT; /**< 0x0054: Data output register */
|
||||
unsigned DSET; /**< 0x0058: Data output set register */
|
||||
unsigned DCLR; /**< 0x005C: Data output clear register */
|
||||
unsigned PDR; /**< 0x0060: Open drain register */
|
||||
unsigned PULDIS; /**< 0x0064: Pull disable register */
|
||||
unsigned PSL; /**< 0x0068: Pull select register */
|
||||
unsigned : 32U; /**< 0x006C: Reserved */
|
||||
unsigned : 32U; /**< 0x0070: Reserved */
|
||||
unsigned PCREG; /**< 0x0074: Parity control register */
|
||||
unsigned PAR; /**< 0x0078: Parity address register */
|
||||
unsigned PPR; /**< 0x007C: Parity pin select register */
|
||||
unsigned SFPRLD; /**< 0x0080: Suppression filter preload register */
|
||||
unsigned SFENA; /**< 0x0084: Suppression filter enable register */
|
||||
unsigned : 32U; /**< 0x0088: Reserved */
|
||||
unsigned LBPSEL; /**< 0x008C: Loop back pair select register */
|
||||
unsigned LBPDIR; /**< 0x0090: Loop back pair direction register */
|
||||
} hetBASE_t;
|
||||
|
||||
|
||||
/** @def hetREG
|
||||
* @brief HET Register Frame Pointer
|
||||
*
|
||||
* This pointer is used by the HET driver to access the het module registers.
|
||||
*/
|
||||
#define hetREG ((hetBASE_t *)0xFFF7B800U)
|
||||
|
||||
|
||||
/** @def hetPORT
|
||||
* @brief HET GIO Port Register Pointer
|
||||
*
|
||||
* Pointer used by the GIO driver to access I/O PORT of HET
|
||||
* (use the GIO drivers to access the port pins).
|
||||
*/
|
||||
#define hetPORT ((gioPORT_t *)0xFFF7B84CU)
|
||||
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue