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Arm-Cortex-R82: Add MPU support (#1347)
* arm-cortex-r82: Add MPU support This commit introduces support for the Memory Protection Unit (MPU) to the ARM Cortex-R82 port. The MPU enhances system security by allowing the definition of memory regions with specific access permissions. The following changes have been made: - Added MPU configuration functions in `port.c` to set up memory regions and their attributes. - Updated `portASM.S` to include assembly routines for MPU and context switching with MPU support. - Created `mpu_wrappers_v2_asm.c` to provide assembly wrappers for MPU operations. - Updated `portmacro.h` to include MPU-related macros and definitions. - Modified `task.h` to include MPU-related task attributes. - Updated `CMakeLists.txt` to include the new MPU source file. - Enhanced the `README.md` with instructions on MPU configuration. Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com> * cortex-r82: Minor code improvements This commit includes minor code improvements to enhance readability and maintainability of the Cortex-R82 port files. Changes include refactoring variable names, optimizing comments, and improving code structure without altering functionality. Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com> * tasks: Disable stack-depth check if MPU wrappers is set This stack-depth check should not be performed for ports where portUSING_MPU_WRAPPERS is set to 1. In this case, pxTopOfStack and pxNewTCB->pxTopOfStack reside in different memory regions: pxTopOfStack is in unprivileged SRAM, while pxNewTCB->pxTopOfStack is in privileged SRAM. This is because pxPortInitialiseStack() returns the address of `ullContext` array rather than the decremented pxTopOfStack, as is done in the non-MPU case. Consequently, this check is not valid in this scenario. Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com> --------- Signed-off-by: Ahmed Ismail <Ahmed.Ismail@arm.com>
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10 changed files with 3130 additions and 504 deletions
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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*
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* SPDX-License-Identifier: MIT
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*
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@ -68,18 +69,21 @@
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#if defined( portARMV8M_MINOR_VERSION ) && ( portARMV8M_MINOR_VERSION >= 1 )
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#define tskMPU_REGION_PRIVILEGED_EXECUTE_NEVER ( 1U << 5U )
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#endif /* portARMV8M_MINOR_VERSION >= 1 */
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#define tskMPU_REGION_NON_SHAREABLE ( 1U << 6U )
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#define tskMPU_REGION_OUTER_SHAREABLE ( 1U << 7U )
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#define tskMPU_REGION_INNER_SHAREABLE ( 1U << 8U )
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/* MPU region permissions stored in MPU settings to
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* authorize access requests. */
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#define tskMPU_READ_PERMISSION ( 1U << 0U )
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#define tskMPU_WRITE_PERMISSION ( 1U << 1U )
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#define tskMPU_READ_PERMISSION ( 1U << 0U )
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#define tskMPU_WRITE_PERMISSION ( 1U << 1U )
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/* The direct to task notification feature used to have only a single notification
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* per task. Now there is an array of notifications per task that is dimensioned by
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* configTASK_NOTIFICATION_ARRAY_ENTRIES. For backward compatibility, any use of the
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* original direct to task notification defaults to using the first index in the
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* array. */
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#define tskDEFAULT_INDEX_TO_NOTIFY ( 0 )
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#define tskDEFAULT_INDEX_TO_NOTIFY ( 0 )
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/**
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* task. h
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