Merge branch 'master' into port/xmos/upstream-support

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Cobus van Eeden 2020-10-29 18:52:25 -07:00 committed by GitHub
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39
.github/CODEOWNERS vendored Normal file
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@ -0,0 +1,39 @@
# Each line is a file pattern followed by one or more owners.
# These owners will be the default owners for everything in
# the repo. Unless a later match takes precedence,
# @global-owner1 and @global-owner2 will be requested for
# review when someone opens a pull request.
* @FreeRTOS/pr-bar-raiser
# Order is important; the last matching pattern takes the most
# precedence. When someone opens a pull request that only
# modifies JS files, only @js-owner and not the global
# owner(s) will be requested for a review.
# *.c FreeRTOS/pr-bar-raiser
# You can also use email addresses if you prefer. They'll be
# used to look up users just like we do for commit author
# emails.
# *.go docs@example.com
# In this example, @doctocat owns any files in the build/logs
# directory at the root of the repository and any of its
# subdirectories.
# /build/logs/ @doctocat
# The `docs/*` pattern will match files like
# `docs/getting-started.md` but not further nested files like
# `docs/build-app/troubleshooting.md`.
# docs/* docs@example.com
# In this example, @octocat owns any file in an apps directory
# anywhere in your repository.
# apps/ @octocat
# In this example, @doctocat owns any file in the `/docs`
# directory in the root of your repository and any of its
# subdirectories.
# /docs/ @doctocat

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@ -1,70 +1,70 @@
# Contribution guidelines # Contribution guidelines
Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or Thank you for your interest in contributing to our project. Whether it's a bug report, new feature, code, or
documentation, we welcome our community to be involved in this project. documentation, we welcome our community to be involved in this project.
Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible. Please read through this document before submitting any issues or pull requests to ensure we are able to help you and all members of the community as effectively as possible.
## Code of conduct ## Code of conduct
This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct). This project has adopted the [Amazon Open Source Code of Conduct](https://aws.github.io/code-of-conduct).
For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact For more information see the [Code of Conduct FAQ](https://aws.github.io/code-of-conduct-faq) or contact
opensource-codeofconduct@amazon.com with any additional questions or comments. opensource-codeofconduct@amazon.com with any additional questions or comments.
## Security issue notifications ## Security issue notifications
If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](http://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue. If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/). Please do **not** create a public github issue.
## Submitting a bugs/feature request ## Submitting a bugs/feature request
Have a bug to report or feature to request? Follow these steps: Have a bug to report or feature to request? Follow these steps:
1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed. 1. Search on the [FreeRTOS Community Support Forums](https://forums.freertos.org/) and [GitHub issue tracker](https://github.com/FreeRTOS/FreeRTOS/issues?utf8=%E2%9C%93&q=is%3Aissue) to be sure this hasn't been already reported or discussed.
2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below. 2. If your search turns up empty, create a new topic in the [forums](https://forums.freertos.org/) and work with the community to help clarify issues or refine the idea. Include as many of the details listed below.
3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features. 3. Once the community has had time to discuss and digest, we welcome you to create an [issue](https://github.com/FreeRTOS/FreeRTOS/issues) to report bugs or suggest features.
When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include: When creating a new topic on the forums or filing an issue, please include as many relevant details as possible. Examples include:
* A clear description of the situation — what you observe, what you expect, and your view on how the two differ. * A clear description of the situation — what you observe, what you expect, and your view on how the two differ.
* A reproducible test case or sequence of steps. * A reproducible test case or sequence of steps.
* The version of our code being used. * The version of our code being used.
* Any modifications you've made relevant to the bug. * Any modifications you've made relevant to the bug.
* Details of your environment or deployment. Highlight anything unusual. * Details of your environment or deployment. Highlight anything unusual.
## Contributing via pull request ## Contributing via pull request
Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that: Contributions via pull requests are much appreciated. Before sending us a pull request, please ensure that:
1. You are working against the latest source on the *master* branch. 1. You are working against the latest source on the *master* branch.
2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already. 2. You check existing open, and recently merged, pull requests to make sure someone else hasn't addressed the problem already.
3. You open an issue to discuss any significant work - we would hate for your time to be wasted. 3. You open an issue to discuss any significant work - we would hate for your time to be wasted.
To send us a pull request, please: To send us a pull request, please:
1. Fork the repository. 1. Fork the repository.
2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change. 2. Modify the source; focus on the specific change you are contributing. If you also reformat all the code, it will be hard for us to focus on your change.
3. Follow the [coding style guide](https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html). 3. Follow the [coding style guide](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
4. Commit to your fork using clear commit messages. 4. Commit to your fork using clear commit messages.
5. Send us a pull request, answering any default questions in the pull request interface. 5. Send us a pull request, answering any default questions in the pull request interface.
NOTE: Please make sure the default option (Allow edits from maintainers) is left checked. NOTE: Please make sure the default option (Allow edits from maintainers) is left checked.
6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation. 6. Pay attention to any automated CI failures reported in the pull request, and stay involved in the conversation.
GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and GitHub provides additional document on [forking a repository](https://help.github.com/articles/fork-a-repo/) and
[creating a pull request](https://help.github.com/articles/creating-a-pull-request/). [creating a pull request](https://help.github.com/articles/creating-a-pull-request/).
## Coding style ## Coding style
* Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html). * Please ensure that your code complies to the [FreeRTOS coding style guidelines](https://www.FreeRTOS.org/FreeRTOS-Coding-Standard-and-Style-Guide.html).
## Getting your pull request merged ## Getting your pull request merged
All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications. All pull requests must be approved by our review team before it can be merged in. We appreciate your patience while pull requests are reviewed. The time it takes to review will depend on complexity and consideration of wider implications.
## Finding contributions to work on ## Finding contributions to work on
Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start. Looking at the existing issues is a great way to find something to contribute on. As our projects, by default, use the default GitHub issue labels (enhancement/bug/duplicate/help wanted/invalid/question/wontfix), tackling open 'help wanted' issues is a great place to start.
## Licensing ## Licensing
The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/master/FreeRTOS/License/license.txt) The FreeRTOS kernel is released under the MIT open source license, the text of which can be found [here](https://github.com/FreeRTOS/FreeRTOS/blob/master/FreeRTOS/License/license.txt)
Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable. Additional license files can be found in the folders containing any supplementary libraries licensed by their respective copyright owners where applicable.
We may ask you to sign a [Contributor License Agreement (CLA)](http://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes. We may ask you to sign a [Contributor License Agreement (CLA)](https://en.wikipedia.org/wiki/Contributor_License_Agreement) for larger changes.

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@ -1,6 +1,8 @@
--- ---
name: Bug report name: Bug report
about: Create a report to help us improve our code. about: Create a report to help us improve FreeRTOS. This should only be used for confirmed
bugs. If you suspect something it is best to first discuss it on the FreeRTOS community
support forums linked below.
title: "[BUG]" title: "[BUG]"
labels: bug labels: bug
assignees: '' assignees: ''
@ -34,3 +36,5 @@ If applicable, add screenshots to help explain your problem.
Add any other context about the problem here. Add any other context about the problem here.
e.g. code snippet to reproduce the issue. e.g. code snippet to reproduce the issue.
e.g. stack trace, memory dump, debugger log, and many etc. e.g. stack trace, memory dump, debugger log, and many etc.
<!-- For general inquiries, please post in [FreeRTOS forum](https://forums.FreeRTOS.org) for community support. -->

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blank_issues_enabled: false
contact_links:
- name: FreeRTOS Community Support Forum
url: https://forums.freertos.org/
about: Please ask and answer questions about FreeRTOS here.

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@ -19,3 +19,5 @@ If applicable, please attach screenshot.
**Browser** **Browser**
- Browser: [e.g. Chrome] - Browser: [e.g. Chrome]
- Version: [e.g. 80.0.3987.132] - Version: [e.g. 80.0.3987.132]
<!-- For general inquiries, please post in [FreeRTOS forum](https://forums.FreeRTOS.org) for community support. -->

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@ -1,12 +0,0 @@
---
name: General inquiry
about: Free form communication.
title: "[Inquiry]"
labels: question
assignees: ''
---
We do encourage you to take a look at [FreeRTOS official site](https://www.freertos.org) for general information and [FreeRTOS forum](https://forums.freertos.org) to access our community.
If still needed, could create a general inquiry report here.

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@ -1,5 +1,5 @@
## Reporting a Vulnerability ## Reporting a Vulnerability
If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security If you discover a potential security issue in this project we ask that you notify AWS/Amazon Security
via our [vulnerability reporting page](http://aws.amazon.com/security/vulnerability-reporting/) or directly via email to aws-security@amazon.com. via our [vulnerability reporting page](https://aws.amazon.com/security/vulnerability-reporting/) or directly via email to aws-security@amazon.com.
Please do **not** create a public github issue. Please do **not** create a public github issue.

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.github/actions/url_verifier.sh vendored Executable file
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#!/bin/bash -
PROJECT=$1
echo "Verifying url links of: ${PROJECT}"
if [ ! -d "$PROJECT" ]
then
echo "Directory passed does not exist"
exit 2
fi
SCRIPT_RET=0
set -o nounset # Treat unset variables as an error
declare -A dict
function test {
while IFS= read -r LINE; do
FILE=$(echo $LINE | cut -f 1 -d ':')
URL=$(echo $LINE | grep -IoE '\b(https?|ftp|file)://[-A-Za-z0-9+&@#/%?=~_|!:,.;]*[-A-Za-z0-9+&@#/%=~_|]')
# remove trailing / if it exists curl diferenciate between links with
# and without / at the end
# URL=`echo "$URL" | sed 's,/$,,'`
dict+=(["$URL"]="$FILE ")
done < <(grep -e 'https\?://' ${PROJECT} -RIa --exclude='*.exe' --exclude-dir=.git | tr '*' ' ')
for UNIQ_URL in ${!dict[@]} # loop urls
do
CURL_RES=$(curl -I ${UNIQ_URL} 2>/dev/null| head -n 1 | cut -f 2 -d ' ')
RES=$?
if [ "${CURL_RES}" == '' -o "${CURL_RES}" != '200' ]
then
echo "URL is: ${UNIQ_URL}"
echo "File names: ${dict[$UNIQ_URL]}"
if [ "${CURL_RES}" == '' ] # curl returned an error
then
CURL_RES=$RES
SCRIPT_RET=1
elif [ "${CURL_RES}" == '403' ]
then
SCRIPT_RET=1
fi
echo Result is: "${CURL_RES}"
echo "================================="
fi
done
if [ "${SCRIPT_RET}" -eq 0 ]
then
exit 0
else
exit 1
fi
}
test

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name: CI Checks
on:
push:
branches: ["**"]
pull_request:
branches: [master]
workflow_dispatch:
jobs:
spell-check:
runs-on: ubuntu-latest
steps:
- name: Checkout Parent Repo
uses: actions/checkout@v2
with:
ref: master
repository: aws/aws-iot-device-sdk-embedded-C
path: main
- name: Clone This Repo
uses: actions/checkout@v2
with:
path: ./kernel
- name: Install spell
run: |
sudo apt-get install spell
sudo apt-get install util-linux
- name: Check spelling
run: |
PATH=$PATH:main/tools/spell
# Make sure that the portable directory is not included in the spellcheck.
sed -i 's/find $DIRNAME/find $DIRNAME -not -path '*portable*'/g' main/tools/spell/find-unknown-comment-words
find-unknown-comment-words --directory kernel/ --lexicon ./kernel/.github/lexicon.txt
if [ "$?" = "0" ]; then
exit 0
else
exit 1
fi
url-check:
runs-on: ubuntu-latest
steps:
- name: Clone This Repo
uses: actions/checkout@v2
with:
path: ./kernel
- name: URL Checker
run: |
bash kernel/.github/actions/url_verifier.sh kernel

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@ -1,17 +1,64 @@
Documentation and download available at http://www.FreeRTOS.org/ Documentation and download available at https://www.FreeRTOS.org/
Changes between FreeRTOS V10.4.0 and FreeRTOS V10.4.1 released September 17 2020
See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
+ Fixed an incorrectly named parameter that prevented the
ulTaskNotifyTakeIndexed macro compiling, and the name space clash in the
test code that prevented this error causing test failures.
Changes between FreeRTOS V10.3.1 and FreeRTOS V10.4.0 released September 10 2020
See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
Major enhancements:
+ Task notifications: Prior to FreeRTOS V10.4.0 each created task had a
single direct to task notification. From FreeRTOS V10.4.0 each task has
an array of notifications. The direct to task notification API has been
extended with API functions postfixed with "Indexed" to enable the API to
operate on a task notification at any array index. See
https://www.freertos.org/RTOS-task-notifications.html for more information.
+ Kernel ports that support memory protection units (MPUs): The ARMv7-M and
ARMv8-M MPU ports now support a privilege access only heap. The ARMv7-M
MPU ports now support devices that have 16 MPU regions, have the ability
to override default memory attributes for privileged code and data
regions, and have the ability to place the FreeRTOS kernel code outside of
the Flash memory. The ARMv8-M MPU ports now support tickless idle mode.
See https://www.freertos.org/FreeRTOS-MPU-memory-protection-unit.html
for more information.
Additional noteworthy updates:
+ Code formatting is now automated to facilitate the increase in
collaborative development in Git. The auto-formated code is not identical
to the original formatting conventions. Most notably spaces are now used
in place of tabs.
+ The prototypes for callback functions (those that start with "Application",
such as vApplicationStackOverflowHook()) are now in the FreeRTOS header
files, removing the need for application writers to add prototypes into
the C files in which they define the functions.
+ New Renesas RXv3 port layer.
+ Updates to the Synopsys ARC code, including support for EM and HS cores,
and updated BSP.
+ Added new POSIX port layer that allows FreeRTOS to run on Linux hosts in
the same way the Windows port layer enables FreeRTOS to run on Windows
hosts.
+ Many other minor optimisations and enhancements. For full details
see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/master
Changes between FreeRTOS V10.3.0 and FreeRTOS V10.3.1 released February 18 2020 Changes between FreeRTOS V10.3.0 and FreeRTOS V10.3.1 released February 18 2020
See http://www.FreeRTOS.org/FreeRTOS-V10.3.x.html See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
+ ./FreeRTOS-Labs directory was removed from this file. The libraries it + ./FreeRTOS-Labs directory was removed from this file. The libraries it
contained are now available as a separate download. contained are now available as a separate download.
+ Replaced the single task notification per task with an array of
notificatinos per task.
Changes between FreeRTOS V10.2.1 and FreeRTOS V10.3.0 released February 7 2020 Changes between FreeRTOS V10.2.1 and FreeRTOS V10.3.0 released February 7 2020
See http://www.FreeRTOS.org/FreeRTOS-V10.3.x.html See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
New and updated kernel ports: New and updated kernel ports:
@ -205,8 +252,8 @@ Changes between FreeRTOS V9.0.1 and FreeRTOS V10.0.0:
New Features and components: New Features and components:
+ Stream Buffers - see http://www.FreeRTOS.org/RTOS-stream-buffer-example.html + Stream Buffers - see https://www.FreeRTOS.org/RTOS-stream-buffer-example.html
+ Message Buffers - see http://www.FreeRTOS.org//RTOS-message-buffer-example.html + Message Buffers - see https://www.FreeRTOS.org//RTOS-message-buffer-example.html
+ Move FreeRTOS+TCP into the main repository, along with the basic Win32 + Move FreeRTOS+TCP into the main repository, along with the basic Win32
TCP demo FreeRTOS_Plus_TCP_Minimal_Windows_Simulator. TCP demo FreeRTOS_Plus_TCP_Minimal_Windows_Simulator.
@ -308,7 +355,7 @@ Changes since FreeRTOS V9.0.0:
Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016: Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:
See http://www.FreeRTOS.org/FreeRTOS-V9.html See https://www.FreeRTOS.org/FreeRTOS-V9.html
RTOS kernel updates: RTOS kernel updates:
@ -317,7 +364,7 @@ Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:
"CreateStatic()" API functions. The stack size parameter in "CreateStatic()" API functions. The stack size parameter in
xTaskCreateStatic() is now uint32_t, which changes the prototype of the xTaskCreateStatic() is now uint32_t, which changes the prototype of the
callback functions. See the following URL: callback functions. See the following URL:
http://www.freertos.org/xTaskCreateStatic.html https://www.FreeRTOS.org/xTaskCreateStatic.html
+ GCC ARM Cortex-A port: Introduced the configUSE_TASK_FPU_SUPPORT + GCC ARM Cortex-A port: Introduced the configUSE_TASK_FPU_SUPPORT
constant. When configUSE_TASK_FPU_SUPPORT is set to 2 every task is constant. When configUSE_TASK_FPU_SUPPORT is set to 2 every task is
automatically given a floating point (FPU) context. automatically given a floating point (FPU) context.
@ -366,7 +413,7 @@ Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:
Changes between FreeRTOS V9.0.0rc1 and FreeRTOS V9.0.0rc2 (release candidate 2) Changes between FreeRTOS V9.0.0rc1 and FreeRTOS V9.0.0rc2 (release candidate 2)
released March 30 2016: released March 30 2016:
NOTE - See http://www.FreeRTOS.org/FreeRTOS-V9.html for details NOTE - See https://www.FreeRTOS.org/FreeRTOS-V9.html for details
+ The functions that create RTOS objects using static memory allocation have + The functions that create RTOS objects using static memory allocation have
been simplified and will not revert to using dynamic allocation if a been simplified and will not revert to using dynamic allocation if a
@ -579,7 +626,7 @@ Changes between V8.1.2 and V8.2.0 released 16th January 2015
Significant RTOS kernel updates: Significant RTOS kernel updates:
+ MAJOR NEW FEATURE! Task notifications. Please see the following URL for + MAJOR NEW FEATURE! Task notifications. Please see the following URL for
details: http://www.FreeRTOS.org/RTOS-task-notifications.html details: https://www.FreeRTOS.org/RTOS-task-notifications.html
+ NEW HEADER FILE REQUIRED! Obsolete definitions have been separated into + NEW HEADER FILE REQUIRED! Obsolete definitions have been separated into
a new header file called FreeRTOS/Source/include/deprecated_definitions.h. a new header file called FreeRTOS/Source/include/deprecated_definitions.h.
This header file must be present to build. Note some of the obsolete This header file must be present to build. Note some of the obsolete
@ -743,21 +790,21 @@ Changes between V8.0.0 and V8.0.1 released 2nd May 2014
Changes between V7.6.0 and V8.0.0 released 19th Feb 2014 Changes between V7.6.0 and V8.0.0 released 19th Feb 2014
http://www.freertos.org/upgrading-to-FreeRTOS-V8.html https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html
FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x, FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x,
although a change to the type used to reference character strings may result although a change to the type used to reference character strings may result
in application code generating a few (easily clearable) compiler warnings in application code generating a few (easily clearable) compiler warnings
after the upgrade, and an updated typedef naming convention means use of the after the upgrade, and an updated typedef naming convention means use of the
old typedef names is now discouraged. old typedef names is now discouraged.
See http://www.freertos.org/upgrading-to-FreeRTOS-V8.html for full See https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html for full
information. information.
New features and functionality: New features and functionality:
+ Event groups - see http://www.freertos.org/FreeRTOS-Event-Groups.html + Event groups - see https://www.FreeRTOS.org/FreeRTOS-Event-Groups.html
+ Centralised deferred interrupt processing - see + Centralised deferred interrupt processing - see
http://www.freertos.org/xTimerPendFunctionCallFromISR.html https://www.FreeRTOS.org/xTimerPendFunctionCallFromISR.html
Other updates: Other updates:
@ -768,7 +815,7 @@ Changes between V7.6.0 and V8.0.0 released 19th Feb 2014
priority of the Running task. priority of the Running task.
+ New low power tickless demonstration project that targets the ST STM32L + New low power tickless demonstration project that targets the ST STM32L
microcontroller - see microcontroller - see
http://www.freertos.org/STM32L-discovery-low-power-tickless-RTOS-demo.html https://www.FreeRTOS.org/STM32L-discovery-low-power-tickless-RTOS-demo.html
+ Add xPortGetMinimumEverFreeHeapSize() to heap_4.c. + Add xPortGetMinimumEverFreeHeapSize() to heap_4.c.
+ Small change to the tickless low power implementation on the SAM4L to + Small change to the tickless low power implementation on the SAM4L to
ensure the alarm value (compare match value) cannot be set to zero when a ensure the alarm value (compare match value) cannot be set to zero when a
@ -918,8 +965,8 @@ Changes between V7.4.2 and V7.5.0 released July 19 2013
New API functions: New API functions:
+ uxTaskGetSystemState() http://www.freertos.org/uxTaskGetSystemState.html + uxTaskGetSystemState() https://www.FreeRTOS.org/uxTaskGetSystemState.html
+ xQueueOverwrite() http://www.freertos.org/xQueueOverwrite.html + xQueueOverwrite() https://www.FreeRTOS.org/xQueueOverwrite.html
+ xQueueOverwriteFromISR() + xQueueOverwriteFromISR()
+ xQueuePeekFromISR() + xQueuePeekFromISR()
@ -932,7 +979,7 @@ Changes between V7.4.2 and V7.5.0 released July 19 2013
+ Microsemi SmartFusion2 + Microsemi SmartFusion2
New FreeRTOSConfig.h settings New FreeRTOSConfig.h settings
http://shop.freertos.org/FreeRTOS_API_and_Configuration_Reference_s/1822.htm https://freertos.org/a00110.html
+ configUSE_TIME_SLICING + configUSE_TIME_SLICING
+ configUSE_NEWLIB_REENTRANT + configUSE_NEWLIB_REENTRANT
@ -969,7 +1016,7 @@ Changes between V7.4.1 and V7.4.2 released May 1 2013
+ Added FreeRTOS+FAT SL source code and demo project. The demo project + Added FreeRTOS+FAT SL source code and demo project. The demo project
runs in the FreeRTOS Windows simulator for easy and hardware independent runs in the FreeRTOS Windows simulator for easy and hardware independent
experimentation and evaluation. See http://www.FreeRTOS.org/fat_sl experimentation and evaluation. See https://www.FreeRTOS.org/fat_sl
Changes between V7.4.0 and V7.4.1 released April 18 2013 Changes between V7.4.0 and V7.4.1 released April 18 2013
@ -998,7 +1045,7 @@ Changes between V7.4.0 and V7.4.1 released April 18 2013
Changes between V7.3.0 and V7.4.0 released February 20 2013 Changes between V7.3.0 and V7.4.0 released February 20 2013
+ New feature: Queue sets. See: + New feature: Queue sets. See:
http://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html https://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html
+ Overhauled the default tickless idle mode implementation provided with the + Overhauled the default tickless idle mode implementation provided with the
ARM Cortex-M3 port layers. ARM Cortex-M3 port layers.
+ Enhanced tickless support in the core kernel code with the introduction of + Enhanced tickless support in the core kernel code with the introduction of
@ -1145,7 +1192,7 @@ Changes between V7.1.0 and V7.1.1 released May 1 2012
+ Introduced the portSETUP_TCB() macro to remove the requirement for the + Introduced the portSETUP_TCB() macro to remove the requirement for the
Windows simulator to use the traceTASK_CREATE() macro, leaving the trace Windows simulator to use the traceTASK_CREATE() macro, leaving the trace
macro available for use by FreeRTOS+Trace (http://www.FreeRTOS.org/trace). macro available for use by FreeRTOS+Trace (https://www.FreeRTOS.org/trace).
+ Added a new trace macro, traceMOVE_TASK_TO_READY_STATE(), to allow future + Added a new trace macro, traceMOVE_TASK_TO_READY_STATE(), to allow future
FreeRTOS+Trace versions to provide even more information to users. FreeRTOS+Trace versions to provide even more information to users.
+ Updated the FreeRTOS MPU port to be correct for changes that were + Updated the FreeRTOS MPU port to be correct for changes that were
@ -1173,7 +1220,7 @@ Changes between V7.1.0 and V7.1.1 released May 1 2012
+ The command interpreter has now been formally released as FreeRTOS+CLI, + The command interpreter has now been formally released as FreeRTOS+CLI,
and been moved out of the main FreeRTOS download, to instead be available and been moved out of the main FreeRTOS download, to instead be available
from the FreeRTOS+ Ecosystem site http://www.FreeRTOS.org/plus. from the FreeRTOS+ Ecosystem site https://www.FreeRTOS.org/plus.
+ flash_timer.c/h has been added to the list of standard demo tasks. This + flash_timer.c/h has been added to the list of standard demo tasks. This
performs the same functionality as the flash.c tasks, but using software performs the same functionality as the flash.c tasks, but using software
timers in place of tasks. timers in place of tasks.
@ -1455,7 +1502,7 @@ Changes between V6.0.3 and V6.0.4 released March 14 2010
+ All the contributed files that were located in the Demo/Unsupported_Demos + All the contributed files that were located in the Demo/Unsupported_Demos
directory have been removed. These files are instead now available in the directory have been removed. These files are instead now available in the
new Community Contributions section of the FreeRTOS website. See new Community Contributions section of the FreeRTOS website. See
http://www.freertos.org/RTOS-contributed-ports.html https://www.FreeRTOS.org/RTOS-contributed-ports.html
+ The project file located in the Demo/CORTEX_STM32F107_GCC_Rowley directory + The project file located in the Demo/CORTEX_STM32F107_GCC_Rowley directory
has been upgraded to use V2.x of the Rowley Crossworks STM32 support has been upgraded to use V2.x of the Rowley Crossworks STM32 support
package. package.
@ -1748,9 +1795,6 @@ Changes between V4.8.0 and V5.0.0 released April 15, 2008
compiler might not issue any type mismatch warnings! compiler might not issue any type mismatch warnings!
See http://www.FreeRTOS.org/upgrading.html for full information.
Other changes: Other changes:
+ Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3 + Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3
@ -2004,7 +2048,7 @@ Changes between V4.0.1 and V4.0.2 released May 28, 2006
it was also called when the tick function was called during the scheduler it was also called when the tick function was called during the scheduler
unlocking process. unlocking process.
+ The EMAC driver in the SAM7X lwIP demo has been made more robust as per + The EMAC driver in the SAM7X lwIP demo has been made more robust as per
the thread: http://sourceforge.net/forum/message.php?msg_id=3714405 the thread: https://sourceforge.net/forum/message.php?msg_id=3714405
+ In the PC ports: Add function prvSetTickFrequencyDefault() to set the + In the PC ports: Add function prvSetTickFrequencyDefault() to set the
DOS tick back to its proper value when the scheduler exits. Thanks DOS tick back to its proper value when the scheduler exits. Thanks
Raynald! Raynald!

View file

@ -1,5 +1,5 @@
[InternetShortcut] [InternetShortcut]
URL=http://www.freertos.org/FreeRTOS-quick-start-guide.html URL=https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html
IDList= IDList=
[{000214A0-0000-0000-C000-000000000046}] [{000214A0-0000-0000-C000-000000000046}]
Prop3=19,2 Prop3=19,2

View file

@ -1,9 +1,9 @@
## Getting started ## Getting started
This repository contains FreeRTOS kernel source/header files and kernel ports only. This repository is referenced as a submodule in [FreeRTOS/FreeRTOS](https://github.com/FreeRTOS/FreeRTOS) repository, which contains pre-configured demo application projects under ```FreeRTOS/Demo``` directory. This repository contains FreeRTOS kernel source/header files and kernel ports only. This repository is referenced as a submodule in [FreeRTOS/FreeRTOS](https://github.com/FreeRTOS/FreeRTOS) repository, which contains pre-configured demo application projects under ```FreeRTOS/Demo``` directory.
The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects. That way you will have the correct FreeRTOS source files included, and the correct include paths configured. Once a demo application is building and executing you can remove the demo application files, and start to add in your own application source files. See the [FreeRTOS Kernel Quick Start Guide](https://www.freertos.org/FreeRTOS-quick-start-guide.html) for detailed instructions and other useful links. The easiest way to use FreeRTOS is to start with one of the pre-configured demo application projects. That way you will have the correct FreeRTOS source files included, and the correct include paths configured. Once a demo application is building and executing you can remove the demo application files, and start to add in your own application source files. See the [FreeRTOS Kernel Quick Start Guide](https://www.FreeRTOS.org/FreeRTOS-quick-start-guide.html) for detailed instructions and other useful links.
Additionally, for FreeRTOS kernel feature information refer to the [Developer Documentation](https://www.freertos.org/features.html), and [API Reference](https://www.freertos.org/a00106.html). Additionally, for FreeRTOS kernel feature information refer to the [Developer Documentation](https://www.FreeRTOS.org/features.html), and [API Reference](https://www.FreeRTOS.org/a00106.html).
### Getting help ### Getting help
If you have any questions or need assistance troubleshooting your FreeRTOS project, we have an active community that can help on the [FreeRTOS Community Support Forum](https://forums.freertos.org). If you have any questions or need assistance troubleshooting your FreeRTOS project, we have an active community that can help on the [FreeRTOS Community Support Forum](https://forums.freertos.org).
@ -29,3 +29,11 @@ is normally only used on very memory limited systems.
See the readme file in the ```./portable``` directory for more information. See the readme file in the ```./portable``` directory for more information.
- The ```./include``` directory contains the real time kernel header files. - The ```./include``` directory contains the real time kernel header files.
### Code Formatting
FreeRTOS files are formatted using the "uncrustify" tool. The configuration file used by uncrustify can be found in the [FreeRTOS/FreeRTOS repository](https://github.com/FreeRTOS/FreeRTOS/blob/master/tools/uncrustify.cfg).
### Spelling
*lexicon.txt* contains words that are not traditionally found in an English dictionary. It is used by the spellchecker to verify the various jargon, variable names, and other odd words used in the FreeRTOS code base. If your pull request fails to pass the spelling and you believe this is a mistake, then add the word to *lexicon.txt*.
Note that only the FreeRTOS Kernel source files are checked for proper spelling, the portable section is ignored.

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#include "FreeRTOS.h" #include "FreeRTOS.h"
@ -30,32 +29,32 @@
#include "croutine.h" #include "croutine.h"
/* Remove the whole file is co-routines are not being used. */ /* Remove the whole file is co-routines are not being used. */
#if( configUSE_CO_ROUTINES != 0 ) #if ( configUSE_CO_ROUTINES != 0 )
/* /*
* Some kernel aware debuggers require data to be viewed to be global, rather * Some kernel aware debuggers require data to be viewed to be global, rather
* than file scope. * than file scope.
*/ */
#ifdef portREMOVE_STATIC_QUALIFIER #ifdef portREMOVE_STATIC_QUALIFIER
#define static #define static
#endif #endif
/* Lists for ready and blocked co-routines. --------------------*/ /* Lists for ready and blocked co-routines. --------------------*/
static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */
static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */ static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */
static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
static List_t * pxDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used. */ static List_t * pxDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used. */
static List_t * pxOverflowDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ static List_t * pxOverflowDelayedCoRoutineList = NULL; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
/* Other file private variables. --------------------------------*/ /* Other file private variables. --------------------------------*/
CRCB_t * pxCurrentCoRoutine = NULL; CRCB_t * pxCurrentCoRoutine = NULL;
static UBaseType_t uxTopCoRoutineReadyPriority = 0; static UBaseType_t uxTopCoRoutineReadyPriority = 0;
static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
/* The initial state of the co-routine when it is created. */ /* The initial state of the co-routine when it is created. */
#define corINITIAL_STATE ( 0 ) #define corINITIAL_STATE ( 0 )
/* /*
* Place the co-routine represented by pxCRCB into the appropriate ready queue * Place the co-routine represented by pxCRCB into the appropriate ready queue
@ -64,20 +63,20 @@ static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
* This macro accesses the co-routine ready lists and therefore must not be * This macro accesses the co-routine ready lists and therefore must not be
* used from within an ISR. * used from within an ISR.
*/ */
#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ #define prvAddCoRoutineToReadyQueue( pxCRCB ) \
{ \ { \
if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \
{ \ { \
uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \
} \ } \
vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \
} }
/* /*
* Utility to ready all the lists used by the scheduler. This is called * Utility to ready all the lists used by the scheduler. This is called
* automatically upon the creation of the first co-routine. * automatically upon the creation of the first co-routine.
*/ */
static void prvInitialiseCoRoutineLists( void ); static void prvInitialiseCoRoutineLists( void );
/* /*
* Co-routines that are readied by an interrupt cannot be placed directly into * Co-routines that are readied by an interrupt cannot be placed directly into
@ -85,7 +84,7 @@ static void prvInitialiseCoRoutineLists( void );
* in the pending ready list in order that they can later be moved to the ready * in the pending ready list in order that they can later be moved to the ready
* list by the co-routine scheduler. * list by the co-routine scheduler.
*/ */
static void prvCheckPendingReadyList( void ); static void prvCheckPendingReadyList( void );
/* /*
* Macro that looks at the list of co-routines that are currently delayed to * Macro that looks at the list of co-routines that are currently delayed to
@ -95,265 +94,268 @@ static void prvCheckPendingReadyList( void );
* meaning once one co-routine has been found whose timer has not expired * meaning once one co-routine has been found whose timer has not expired
* we need not look any further down the list. * we need not look any further down the list.
*/ */
static void prvCheckDelayedList( void ); static void prvCheckDelayedList( void );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ) BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
{ UBaseType_t uxPriority,
BaseType_t xReturn; UBaseType_t uxIndex )
CRCB_t *pxCoRoutine; {
BaseType_t xReturn;
CRCB_t * pxCoRoutine;
/* Allocate the memory that will store the co-routine control block. */ /* Allocate the memory that will store the co-routine control block. */
pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) ); pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) );
if( pxCoRoutine )
{
/* If pxCurrentCoRoutine is NULL then this is the first co-routine to
be created and the co-routine data structures need initialising. */
if( pxCurrentCoRoutine == NULL )
{
pxCurrentCoRoutine = pxCoRoutine;
prvInitialiseCoRoutineLists();
}
/* Check the priority is within limits. */ if( pxCoRoutine )
if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) {
{ /* If pxCurrentCoRoutine is NULL then this is the first co-routine to
uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; * be created and the co-routine data structures need initialising. */
} if( pxCurrentCoRoutine == NULL )
{
pxCurrentCoRoutine = pxCoRoutine;
prvInitialiseCoRoutineLists();
}
/* Fill out the co-routine control block from the function parameters. */ /* Check the priority is within limits. */
pxCoRoutine->uxState = corINITIAL_STATE; if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES )
pxCoRoutine->uxPriority = uxPriority; {
pxCoRoutine->uxIndex = uxIndex; uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1;
pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; }
/* Initialise all the other co-routine control block parameters. */ /* Fill out the co-routine control block from the function parameters. */
vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); pxCoRoutine->uxState = corINITIAL_STATE;
vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); pxCoRoutine->uxPriority = uxPriority;
pxCoRoutine->uxIndex = uxIndex;
pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode;
/* Set the co-routine control block as a link back from the ListItem_t. /* Initialise all the other co-routine control block parameters. */
This is so we can get back to the containing CRCB from a generic item vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) );
in a list. */ vListInitialiseItem( &( pxCoRoutine->xEventListItem ) );
listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );
listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );
/* Event lists are always in priority order. */ /* Set the co-routine control block as a link back from the ListItem_t.
listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) ); * This is so we can get back to the containing CRCB from a generic item
* in a list. */
listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );
listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );
/* Now the co-routine has been initialised it can be added to the ready /* Event lists are always in priority order. */
list at the correct priority. */ listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) );
prvAddCoRoutineToReadyQueue( pxCoRoutine );
xReturn = pdPASS; /* Now the co-routine has been initialised it can be added to the ready
} * list at the correct priority. */
else prvAddCoRoutineToReadyQueue( pxCoRoutine );
{
xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
}
return xReturn; xReturn = pdPASS;
} }
else
{
xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
}
return xReturn;
}
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ) void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
{ List_t * pxEventList )
TickType_t xTimeToWake; {
TickType_t xTimeToWake;
/* Calculate the time to wake - this may overflow but this is /* Calculate the time to wake - this may overflow but this is
not a problem. */ * not a problem. */
xTimeToWake = xCoRoutineTickCount + xTicksToDelay; xTimeToWake = xCoRoutineTickCount + xTicksToDelay;
/* We must remove ourselves from the ready list before adding /* We must remove ourselves from the ready list before adding
ourselves to the blocked list as the same list item is used for * ourselves to the blocked list as the same list item is used for
both lists. */ * both lists. */
( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
/* The list item will be inserted in wake time order. */ /* The list item will be inserted in wake time order. */
listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake );
if( xTimeToWake < xCoRoutineTickCount ) if( xTimeToWake < xCoRoutineTickCount )
{ {
/* Wake time has overflowed. Place this item in the /* Wake time has overflowed. Place this item in the
overflow list. */ * overflow list. */
vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
} }
else else
{ {
/* The wake time has not overflowed, so we can use the /* The wake time has not overflowed, so we can use the
current block list. */ * current block list. */
vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) );
} }
if( pxEventList ) if( pxEventList )
{ {
/* Also add the co-routine to an event list. If this is done then the /* Also add the co-routine to an event list. If this is done then the
function must be called with interrupts disabled. */ * function must be called with interrupts disabled. */
vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) );
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static void prvCheckPendingReadyList( void ) static void prvCheckPendingReadyList( void )
{ {
/* Are there any co-routines waiting to get moved to the ready list? These /* Are there any co-routines waiting to get moved to the ready list? These
are co-routines that have been readied by an ISR. The ISR cannot access * are co-routines that have been readied by an ISR. The ISR cannot access
the ready lists itself. */ * the ready lists itself. */
while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE ) while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE )
{ {
CRCB_t *pxUnblockedCRCB; CRCB_t * pxUnblockedCRCB;
/* The pending ready list can be accessed by an ISR. */ /* The pending ready list can be accessed by an ISR. */
portDISABLE_INTERRUPTS(); portDISABLE_INTERRUPTS();
{ {
pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) ); pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyCoRoutineList ) );
( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
} }
portENABLE_INTERRUPTS(); portENABLE_INTERRUPTS();
( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); ( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) );
prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); prvAddCoRoutineToReadyQueue( pxUnblockedCRCB );
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static void prvCheckDelayedList( void ) static void prvCheckDelayedList( void )
{ {
CRCB_t *pxCRCB; CRCB_t * pxCRCB;
xPassedTicks = xTaskGetTickCount() - xLastTickCount; xPassedTicks = xTaskGetTickCount() - xLastTickCount;
while( xPassedTicks )
{
xCoRoutineTickCount++;
xPassedTicks--;
/* If the tick count has overflowed we need to swap the ready lists. */ while( xPassedTicks )
if( xCoRoutineTickCount == 0 ) {
{ xCoRoutineTickCount++;
List_t * pxTemp; xPassedTicks--;
/* Tick count has overflowed so we need to swap the delay lists. If there are /* If the tick count has overflowed we need to swap the ready lists. */
any items in pxDelayedCoRoutineList here then there is an error! */ if( xCoRoutineTickCount == 0 )
pxTemp = pxDelayedCoRoutineList; {
pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; List_t * pxTemp;
pxOverflowDelayedCoRoutineList = pxTemp;
}
/* See if this tick has made a timeout expire. */ /* Tick count has overflowed so we need to swap the delay lists. If there are
while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE ) * any items in pxDelayedCoRoutineList here then there is an error! */
{ pxTemp = pxDelayedCoRoutineList;
pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ); pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList;
pxOverflowDelayedCoRoutineList = pxTemp;
}
if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) /* See if this tick has made a timeout expire. */
{ while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE )
/* Timeout not yet expired. */ {
break; pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );
}
portDISABLE_INTERRUPTS(); if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) )
{ {
/* The event could have occurred just before this critical /* Timeout not yet expired. */
section. If this is the case then the generic list item will break;
have been moved to the pending ready list and the following }
line is still valid. Also the pvContainer parameter will have
been set to NULL so the following lines are also valid. */
( void ) uxListRemove( &( pxCRCB->xGenericListItem ) );
/* Is the co-routine waiting on an event also? */ portDISABLE_INTERRUPTS();
if( pxCRCB->xEventListItem.pxContainer ) {
{ /* The event could have occurred just before this critical
( void ) uxListRemove( &( pxCRCB->xEventListItem ) ); * section. If this is the case then the generic list item will
} * have been moved to the pending ready list and the following
} * line is still valid. Also the pvContainer parameter will have
portENABLE_INTERRUPTS(); * been set to NULL so the following lines are also valid. */
( void ) uxListRemove( &( pxCRCB->xGenericListItem ) );
prvAddCoRoutineToReadyQueue( pxCRCB ); /* Is the co-routine waiting on an event also? */
} if( pxCRCB->xEventListItem.pxContainer )
} {
( void ) uxListRemove( &( pxCRCB->xEventListItem ) );
}
}
portENABLE_INTERRUPTS();
xLastTickCount = xCoRoutineTickCount; prvAddCoRoutineToReadyQueue( pxCRCB );
} }
}
xLastTickCount = xCoRoutineTickCount;
}
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vCoRoutineSchedule( void ) void vCoRoutineSchedule( void )
{ {
/* Only run a co-routine after prvInitialiseCoRoutineLists() has been /* Only run a co-routine after prvInitialiseCoRoutineLists() has been
called. prvInitialiseCoRoutineLists() is called automatically when a * called. prvInitialiseCoRoutineLists() is called automatically when a
co-routine is created. */ * co-routine is created. */
if( pxDelayedCoRoutineList != NULL ) if( pxDelayedCoRoutineList != NULL )
{ {
/* See if any co-routines readied by events need moving to the ready lists. */ /* See if any co-routines readied by events need moving to the ready lists. */
prvCheckPendingReadyList(); prvCheckPendingReadyList();
/* See if any delayed co-routines have timed out. */ /* See if any delayed co-routines have timed out. */
prvCheckDelayedList(); prvCheckDelayedList();
/* Find the highest priority queue that contains ready co-routines. */ /* Find the highest priority queue that contains ready co-routines. */
while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) )
{ {
if( uxTopCoRoutineReadyPriority == 0 ) if( uxTopCoRoutineReadyPriority == 0 )
{ {
/* No more co-routines to check. */ /* No more co-routines to check. */
return; return;
} }
--uxTopCoRoutineReadyPriority;
}
/* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines --uxTopCoRoutineReadyPriority;
of the same priority get an equal share of the processor time. */ }
listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) );
/* Call the co-routine. */ /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines
( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); * of the same priority get an equal share of the processor time. */
} listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) );
return; /* Call the co-routine. */
} ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex );
}
}
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static void prvInitialiseCoRoutineLists( void ) static void prvInitialiseCoRoutineLists( void )
{ {
UBaseType_t uxPriority; UBaseType_t uxPriority;
for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ )
{ {
vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );
} }
vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 ); vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 );
vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 ); vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 );
vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList ); vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList );
/* Start with pxDelayedCoRoutineList using list1 and the /* Start with pxDelayedCoRoutineList using list1 and the
pxOverflowDelayedCoRoutineList using list2. */ * pxOverflowDelayedCoRoutineList using list2. */
pxDelayedCoRoutineList = &xDelayedCoRoutineList1; pxDelayedCoRoutineList = &xDelayedCoRoutineList1;
pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ) BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList )
{ {
CRCB_t *pxUnblockedCRCB; CRCB_t * pxUnblockedCRCB;
BaseType_t xReturn; BaseType_t xReturn;
/* This function is called from within an interrupt. It can only access /* This function is called from within an interrupt. It can only access
event lists and the pending ready list. This function assumes that a * event lists and the pending ready list. This function assumes that a
check has already been made to ensure pxEventList is not empty. */ * check has already been made to ensure pxEventList is not empty. */
pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) );
vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) ); vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );
if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority )
{ {
xReturn = pdTRUE; xReturn = pdTRUE;
} }
else else
{ {
xReturn = pdFALSE; xReturn = pdFALSE;
} }
return xReturn; return xReturn;
} }
#endif /* configUSE_CO_ROUTINES == 0 */ #endif /* configUSE_CO_ROUTINES == 0 */

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,115 +19,14 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef STACK_MACROS_H
#define STACK_MACROS_H
#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */ #ifndef _MSC_VER /* Visual Studio doesn't support #warning. */
#warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released. #warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released.
#endif #endif
/* #include "stack_macros.h"
* Call the stack overflow hook function if the stack of the task being swapped
* out is currently overflowed, or looks like it might have overflowed in the
* past.
*
* Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
* the current stack state only - comparing the current top of stack value to
* the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
* will also cause the last few stack bytes to be checked to ensure the value
* to which the bytes were set when the task was created have not been
* overwritten. Note this second test does not guarantee that an overflowed
* stack will always be recognised.
*/
/*-----------------------------------------------------------*/
#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
/* Only the current stack state is to be checked. */
#define taskCHECK_FOR_STACK_OVERFLOW() \
{ \
/* Is the currently saved stack pointer within the stack limit? */ \
if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \
{ \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
} \
}
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
/*-----------------------------------------------------------*/
#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
/* Only the current stack state is to be checked. */
#define taskCHECK_FOR_STACK_OVERFLOW() \
{ \
\
/* Is the currently saved stack pointer within the stack limit? */ \
if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \
{ \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
} \
}
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
/*-----------------------------------------------------------*/
#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
#define taskCHECK_FOR_STACK_OVERFLOW() \
{ \
const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \
const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \
\
if( ( pulStack[ 0 ] != ulCheckValue ) || \
( pulStack[ 1 ] != ulCheckValue ) || \
( pulStack[ 2 ] != ulCheckValue ) || \
( pulStack[ 3 ] != ulCheckValue ) ) \
{ \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
} \
}
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
/*-----------------------------------------------------------*/
#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
#define taskCHECK_FOR_STACK_OVERFLOW() \
{ \
int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \
static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
\
\
pcEndOfStack -= sizeof( ucExpectedStackBytes ); \
\
/* Has the extremity of the task stack ever been written over? */ \
if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
{ \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
} \
}
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
/*-----------------------------------------------------------*/
/* Remove stack overflow macro if not being used. */
#ifndef taskCHECK_FOR_STACK_OVERFLOW
#define taskCHECK_FOR_STACK_OVERFLOW()
#endif
#endif /* STACK_MACROS_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/** /**
@ -38,15 +37,17 @@
#define ATOMIC_H #define ATOMIC_H
#ifndef INC_FREERTOS_H #ifndef INC_FREERTOS_H
#error "include FreeRTOS.h must appear in source files before include atomic.h" #error "include FreeRTOS.h must appear in source files before include atomic.h"
#endif #endif
/* Standard includes. */ /* Standard includes. */
#include <stdint.h> #include <stdint.h>
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/* /*
* Port specific definitions -- entering/exiting critical section. * Port specific definitions -- entering/exiting critical section.
@ -58,18 +59,18 @@ extern "C" {
*/ */
#if defined( portSET_INTERRUPT_MASK_FROM_ISR ) #if defined( portSET_INTERRUPT_MASK_FROM_ISR )
/* Nested interrupt scheme is supported in this port. */ /* Nested interrupt scheme is supported in this port. */
#define ATOMIC_ENTER_CRITICAL() \ #define ATOMIC_ENTER_CRITICAL() \
UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR() UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
#define ATOMIC_EXIT_CRITICAL() \ #define ATOMIC_EXIT_CRITICAL() \
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType ) portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
#else #else
/* Nested interrupt scheme is NOT supported in this port. */ /* Nested interrupt scheme is NOT supported in this port. */
#define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL() #define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL()
#define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL() #define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL()
#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */ #endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
@ -81,11 +82,11 @@ extern "C" {
* instead of resulting error, simply define it away. * instead of resulting error, simply define it away.
*/ */
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE #define portFORCE_INLINE
#endif #endif
#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */ #define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */
#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */ #define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */
/*----------------------------- Swap && CAS ------------------------------*/ /*----------------------------- Swap && CAS ------------------------------*/
@ -105,26 +106,26 @@ extern "C" {
* *pulDestination value equals ulComparand. * *pulDestination value equals ulComparand.
*/ */
static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination, static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
uint32_t ulExchange, uint32_t ulExchange,
uint32_t ulComparand ) uint32_t ulComparand )
{ {
uint32_t ulReturnValue; uint32_t ulReturnValue;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
if( *pulDestination == ulComparand ) if( *pulDestination == ulComparand )
{ {
*pulDestination = ulExchange; *pulDestination = ulExchange;
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
} }
else else
{ {
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
} }
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulReturnValue; return ulReturnValue;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -141,18 +142,18 @@ uint32_t ulReturnValue;
* @return The initial value of *ppvDestination. * @return The initial value of *ppvDestination.
*/ */
static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination, static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
void * pvExchange ) void * pvExchange )
{ {
void * pReturnValue; void * pReturnValue;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
pReturnValue = *ppvDestination; pReturnValue = *ppvDestination;
*ppvDestination = pvExchange; *ppvDestination = pvExchange;
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return pReturnValue; return pReturnValue;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -173,22 +174,22 @@ void * pReturnValue;
* *ppvDestination value equals pvComparand. * *ppvDestination value equals pvComparand.
*/ */
static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination, static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
void * pvExchange, void * pvExchange,
void * pvComparand ) void * pvComparand )
{ {
uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
if( *ppvDestination == pvComparand ) if( *ppvDestination == pvComparand )
{ {
*ppvDestination = pvExchange; *ppvDestination = pvExchange;
ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
} }
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulReturnValue; return ulReturnValue;
} }
@ -206,18 +207,18 @@ uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
* @return previous *pulAddend value. * @return previous *pulAddend value.
*/ */
static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend, static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
uint32_t ulCount ) uint32_t ulCount )
{ {
uint32_t ulCurrent; uint32_t ulCurrent;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
ulCurrent = *pulAddend; ulCurrent = *pulAddend;
*pulAddend += ulCount; *pulAddend += ulCount;
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulCurrent; return ulCurrent;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -234,18 +235,18 @@ static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
* @return previous *pulAddend value. * @return previous *pulAddend value.
*/ */
static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend, static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
uint32_t ulCount ) uint32_t ulCount )
{ {
uint32_t ulCurrent; uint32_t ulCurrent;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
ulCurrent = *pulAddend; ulCurrent = *pulAddend;
*pulAddend -= ulCount; *pulAddend -= ulCount;
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulCurrent; return ulCurrent;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -261,16 +262,16 @@ static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAdd
*/ */
static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend ) static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
{ {
uint32_t ulCurrent; uint32_t ulCurrent;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
ulCurrent = *pulAddend; ulCurrent = *pulAddend;
*pulAddend += 1; *pulAddend += 1;
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulCurrent; return ulCurrent;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -286,16 +287,16 @@ uint32_t ulCurrent;
*/ */
static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend ) static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
{ {
uint32_t ulCurrent; uint32_t ulCurrent;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
ulCurrent = *pulAddend; ulCurrent = *pulAddend;
*pulAddend -= 1; *pulAddend -= 1;
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulCurrent; return ulCurrent;
} }
/*----------------------------- Bitwise Logical ------------------------------*/ /*----------------------------- Bitwise Logical ------------------------------*/
@ -312,18 +313,18 @@ uint32_t ulCurrent;
* @return The original value of *pulDestination. * @return The original value of *pulDestination.
*/ */
static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination, static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
uint32_t ulValue ) uint32_t ulValue )
{ {
uint32_t ulCurrent; uint32_t ulCurrent;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
ulCurrent = *pulDestination; ulCurrent = *pulDestination;
*pulDestination |= ulValue; *pulDestination |= ulValue;
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulCurrent; return ulCurrent;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -339,18 +340,18 @@ uint32_t ulCurrent;
* @return The original value of *pulDestination. * @return The original value of *pulDestination.
*/ */
static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination, static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
uint32_t ulValue ) uint32_t ulValue )
{ {
uint32_t ulCurrent; uint32_t ulCurrent;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
ulCurrent = *pulDestination; ulCurrent = *pulDestination;
*pulDestination &= ulValue; *pulDestination &= ulValue;
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulCurrent; return ulCurrent;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -366,18 +367,18 @@ uint32_t ulCurrent;
* @return The original value of *pulDestination. * @return The original value of *pulDestination.
*/ */
static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination, static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
uint32_t ulValue ) uint32_t ulValue )
{ {
uint32_t ulCurrent; uint32_t ulCurrent;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
ulCurrent = *pulDestination; ulCurrent = *pulDestination;
*pulDestination = ~( ulCurrent & ulValue ); *pulDestination = ~( ulCurrent & ulValue );
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulCurrent; return ulCurrent;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -393,22 +394,24 @@ uint32_t ulCurrent;
* @return The original value of *pulDestination. * @return The original value of *pulDestination.
*/ */
static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination, static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
uint32_t ulValue ) uint32_t ulValue )
{ {
uint32_t ulCurrent; uint32_t ulCurrent;
ATOMIC_ENTER_CRITICAL(); ATOMIC_ENTER_CRITICAL();
{ {
ulCurrent = *pulDestination; ulCurrent = *pulDestination;
*pulDestination ^= ulValue; *pulDestination ^= ulValue;
} }
ATOMIC_EXIT_CRITICAL(); ATOMIC_EXIT_CRITICAL();
return ulCurrent; return ulCurrent;
} }
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* ATOMIC_H */ #endif /* ATOMIC_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,51 +19,54 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef CO_ROUTINE_H #ifndef CO_ROUTINE_H
#define CO_ROUTINE_H #define CO_ROUTINE_H
#ifndef INC_FREERTOS_H #ifndef INC_FREERTOS_H
#error "include FreeRTOS.h must appear in source files before include croutine.h" #error "include FreeRTOS.h must appear in source files before include croutine.h"
#endif #endif
#include "list.h" #include "list.h"
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/* Used to hide the implementation of the co-routine control block. The /* Used to hide the implementation of the co-routine control block. The
control block structure however has to be included in the header due to * control block structure however has to be included in the header due to
the macro implementation of the co-routine functionality. */ * the macro implementation of the co-routine functionality. */
typedef void * CoRoutineHandle_t; typedef void * CoRoutineHandle_t;
/* Defines the prototype to which co-routine functions must conform. */ /* Defines the prototype to which co-routine functions must conform. */
typedef void (*crCOROUTINE_CODE)( CoRoutineHandle_t, UBaseType_t ); typedef void (* crCOROUTINE_CODE)( CoRoutineHandle_t,
UBaseType_t );
typedef struct corCoRoutineControlBlock typedef struct corCoRoutineControlBlock
{ {
crCOROUTINE_CODE pxCoRoutineFunction; crCOROUTINE_CODE pxCoRoutineFunction;
ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */
ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */ ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */
UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */
UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
uint16_t uxState; /*< Used internally by the co-routine implementation. */ uint16_t uxState; /*< Used internally by the co-routine implementation. */
} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */ } CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */
/** /**
* croutine. h * croutine. h
*<pre> * <pre>
BaseType_t xCoRoutineCreate( * BaseType_t xCoRoutineCreate(
crCOROUTINE_CODE pxCoRoutineCode, * crCOROUTINE_CODE pxCoRoutineCode,
UBaseType_t uxPriority, * UBaseType_t uxPriority,
UBaseType_t uxIndex * UBaseType_t uxIndex
);</pre> * );
* </pre>
* *
* Create a new co-routine and add it to the list of co-routines that are * Create a new co-routine and add it to the list of co-routines that are
* ready to run. * ready to run.
@ -83,58 +86,61 @@ typedef struct corCoRoutineControlBlock
* list, otherwise an error code defined with ProjDefs.h. * list, otherwise an error code defined with ProjDefs.h.
* *
* Example usage: * Example usage:
<pre> * <pre>
// Co-routine to be created. * // Co-routine to be created.
void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) * void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
{ * {
// Variables in co-routines must be declared static if they must maintain value across a blocking call. * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
// This may not be necessary for const variables. * // This may not be necessary for const variables.
static const char cLedToFlash[ 2 ] = { 5, 6 }; * static const char cLedToFlash[ 2 ] = { 5, 6 };
static const TickType_t uxFlashRates[ 2 ] = { 200, 400 }; * static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
*
// Must start every co-routine with a call to crSTART(); * // Must start every co-routine with a call to crSTART();
crSTART( xHandle ); * crSTART( xHandle );
*
for( ;; ) * for( ;; )
{ * {
// This co-routine just delays for a fixed period, then toggles * // This co-routine just delays for a fixed period, then toggles
// an LED. Two co-routines are created using this function, so * // an LED. Two co-routines are created using this function, so
// the uxIndex parameter is used to tell the co-routine which * // the uxIndex parameter is used to tell the co-routine which
// LED to flash and how int32_t to delay. This assumes xQueue has * // LED to flash and how int32_t to delay. This assumes xQueue has
// already been created. * // already been created.
vParTestToggleLED( cLedToFlash[ uxIndex ] ); * vParTestToggleLED( cLedToFlash[ uxIndex ] );
crDELAY( xHandle, uxFlashRates[ uxIndex ] ); * crDELAY( xHandle, uxFlashRates[ uxIndex ] );
} * }
*
// Must end every co-routine with a call to crEND(); * // Must end every co-routine with a call to crEND();
crEND(); * crEND();
} * }
*
// Function that creates two co-routines. * // Function that creates two co-routines.
void vOtherFunction( void ) * void vOtherFunction( void )
{ * {
uint8_t ucParameterToPass; * uint8_t ucParameterToPass;
TaskHandle_t xHandle; * TaskHandle_t xHandle;
*
// Create two co-routines at priority 0. The first is given index 0 * // Create two co-routines at priority 0. The first is given index 0
// so (from the code above) toggles LED 5 every 200 ticks. The second * // so (from the code above) toggles LED 5 every 200 ticks. The second
// is given index 1 so toggles LED 6 every 400 ticks. * // is given index 1 so toggles LED 6 every 400 ticks.
for( uxIndex = 0; uxIndex < 2; uxIndex++ ) * for( uxIndex = 0; uxIndex < 2; uxIndex++ )
{ * {
xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex ); * xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
} * }
} * }
</pre> * </pre>
* \defgroup xCoRoutineCreate xCoRoutineCreate * \defgroup xCoRoutineCreate xCoRoutineCreate
* \ingroup Tasks * \ingroup Tasks
*/ */
BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ); BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode,
UBaseType_t uxPriority,
UBaseType_t uxIndex );
/** /**
* croutine. h * croutine. h
*<pre> * <pre>
void vCoRoutineSchedule( void );</pre> * void vCoRoutineSchedule( void );
* </pre>
* *
* Run a co-routine. * Run a co-routine.
* *
@ -148,25 +154,25 @@ BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPri
* hook). * hook).
* *
* Example usage: * Example usage:
<pre> * <pre>
// This idle task hook will schedule a co-routine each time it is called. * // This idle task hook will schedule a co-routine each time it is called.
// The rest of the idle task will execute between co-routine calls. * // The rest of the idle task will execute between co-routine calls.
void vApplicationIdleHook( void ) * void vApplicationIdleHook( void )
{ * {
vCoRoutineSchedule(); * vCoRoutineSchedule();
} * }
*
// Alternatively, if you do not require any other part of the idle task to * // Alternatively, if you do not require any other part of the idle task to
// execute, the idle task hook can call vCoRoutineSchedule() within an * // execute, the idle task hook can call vCoRoutineSchedule() within an
// infinite loop. * // infinite loop.
void vApplicationIdleHook( void ) * void vApplicationIdleHook( void )
{ * {
for( ;; ) * for( ;; )
{ * {
vCoRoutineSchedule(); * vCoRoutineSchedule();
} * }
} * }
</pre> * </pre>
* \defgroup vCoRoutineSchedule vCoRoutineSchedule * \defgroup vCoRoutineSchedule vCoRoutineSchedule
* \ingroup Tasks * \ingroup Tasks
*/ */
@ -175,76 +181,87 @@ void vCoRoutineSchedule( void );
/** /**
* croutine. h * croutine. h
* <pre> * <pre>
crSTART( CoRoutineHandle_t xHandle );</pre> * crSTART( CoRoutineHandle_t xHandle );
* </pre>
* *
* This macro MUST always be called at the start of a co-routine function. * This macro MUST always be called at the start of a co-routine function.
* *
* Example usage: * Example usage:
<pre> * <pre>
// Co-routine to be created. * // Co-routine to be created.
void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
{ * {
// Variables in co-routines must be declared static if they must maintain value across a blocking call. * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
static int32_t ulAVariable; * static int32_t ulAVariable;
*
// Must start every co-routine with a call to crSTART(); * // Must start every co-routine with a call to crSTART();
crSTART( xHandle ); * crSTART( xHandle );
*
for( ;; ) * for( ;; )
{ * {
// Co-routine functionality goes here. * // Co-routine functionality goes here.
} * }
*
// Must end every co-routine with a call to crEND(); * // Must end every co-routine with a call to crEND();
crEND(); * crEND();
}</pre> * }
* </pre>
* \defgroup crSTART crSTART * \defgroup crSTART crSTART
* \ingroup Tasks * \ingroup Tasks
*/ */
#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0: #define crSTART( pxCRCB ) \
switch( ( ( CRCB_t * ) ( pxCRCB ) )->uxState ) { \
case 0:
/** /**
* croutine. h * croutine. h
* <pre> * <pre>
crEND();</pre> * crEND();
* </pre>
* *
* This macro MUST always be called at the end of a co-routine function. * This macro MUST always be called at the end of a co-routine function.
* *
* Example usage: * Example usage:
<pre> * <pre>
// Co-routine to be created. * // Co-routine to be created.
void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
{ * {
// Variables in co-routines must be declared static if they must maintain value across a blocking call. * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
static int32_t ulAVariable; * static int32_t ulAVariable;
*
// Must start every co-routine with a call to crSTART(); * // Must start every co-routine with a call to crSTART();
crSTART( xHandle ); * crSTART( xHandle );
*
for( ;; ) * for( ;; )
{ * {
// Co-routine functionality goes here. * // Co-routine functionality goes here.
} * }
*
// Must end every co-routine with a call to crEND(); * // Must end every co-routine with a call to crEND();
crEND(); * crEND();
}</pre> * }
* </pre>
* \defgroup crSTART crSTART * \defgroup crSTART crSTART
* \ingroup Tasks * \ingroup Tasks
*/ */
#define crEND() } #define crEND() }
/* /*
* These macros are intended for internal use by the co-routine implementation * These macros are intended for internal use by the co-routine implementation
* only. The macros should not be used directly by application writers. * only. The macros should not be used directly by application writers.
*/ */
#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): #define crSET_STATE0( xHandle ) \
#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): ( ( CRCB_t * ) ( xHandle ) )->uxState = ( __LINE__ * 2 ); return; \
case ( __LINE__ * 2 ):
#define crSET_STATE1( xHandle ) \
( ( CRCB_t * ) ( xHandle ) )->uxState = ( ( __LINE__ * 2 ) + 1 ); return; \
case ( ( __LINE__ * 2 ) + 1 ):
/** /**
* croutine. h * croutine. h
*<pre> * <pre>
crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );</pre> * crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
* </pre>
* *
* Delay a co-routine for a fixed period of time. * Delay a co-routine for a fixed period of time.
* *
@ -261,48 +278,50 @@ void vCoRoutineSchedule( void );
* can be used to convert ticks to milliseconds. * can be used to convert ticks to milliseconds.
* *
* Example usage: * Example usage:
<pre> * <pre>
// Co-routine to be created. * // Co-routine to be created.
void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) * void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
{ * {
// Variables in co-routines must be declared static if they must maintain value across a blocking call. * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
// This may not be necessary for const variables. * // This may not be necessary for const variables.
// We are to delay for 200ms. * // We are to delay for 200ms.
static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS; * static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
*
// Must start every co-routine with a call to crSTART(); * // Must start every co-routine with a call to crSTART();
crSTART( xHandle ); * crSTART( xHandle );
*
for( ;; ) * for( ;; )
{ * {
// Delay for 200ms. * // Delay for 200ms.
crDELAY( xHandle, xDelayTime ); * crDELAY( xHandle, xDelayTime );
*
// Do something here. * // Do something here.
} * }
*
// Must end every co-routine with a call to crEND(); * // Must end every co-routine with a call to crEND();
crEND(); * crEND();
}</pre> * }
* </pre>
* \defgroup crDELAY crDELAY * \defgroup crDELAY crDELAY
* \ingroup Tasks * \ingroup Tasks
*/ */
#define crDELAY( xHandle, xTicksToDelay ) \ #define crDELAY( xHandle, xTicksToDelay ) \
if( ( xTicksToDelay ) > 0 ) \ if( ( xTicksToDelay ) > 0 ) \
{ \ { \
vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \ vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \
} \ } \
crSET_STATE0( ( xHandle ) ); crSET_STATE0( ( xHandle ) );
/** /**
* <pre> * <pre>
crQUEUE_SEND( * crQUEUE_SEND(
CoRoutineHandle_t xHandle, * CoRoutineHandle_t xHandle,
QueueHandle_t pxQueue, * QueueHandle_t pxQueue,
void *pvItemToQueue, * void *pvItemToQueue,
TickType_t xTicksToWait, * TickType_t xTicksToWait,
BaseType_t *pxResult * BaseType_t *pxResult
)</pre> * )
* </pre>
* *
* The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
* equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
@ -342,66 +361,68 @@ void vCoRoutineSchedule( void );
* error defined within ProjDefs.h. * error defined within ProjDefs.h.
* *
* Example usage: * Example usage:
<pre> * <pre>
// Co-routine function that blocks for a fixed period then posts a number onto * // Co-routine function that blocks for a fixed period then posts a number onto
// a queue. * // a queue.
static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) * static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
{ * {
// Variables in co-routines must be declared static if they must maintain value across a blocking call. * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
static BaseType_t xNumberToPost = 0; * static BaseType_t xNumberToPost = 0;
static BaseType_t xResult; * static BaseType_t xResult;
*
// Co-routines must begin with a call to crSTART(). * // Co-routines must begin with a call to crSTART().
crSTART( xHandle ); * crSTART( xHandle );
*
for( ;; ) * for( ;; )
{ * {
// This assumes the queue has already been created. * // This assumes the queue has already been created.
crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult ); * crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
*
if( xResult != pdPASS ) * if( xResult != pdPASS )
{ * {
// The message was not posted! * // The message was not posted!
} * }
*
// Increment the number to be posted onto the queue. * // Increment the number to be posted onto the queue.
xNumberToPost++; * xNumberToPost++;
*
// Delay for 100 ticks. * // Delay for 100 ticks.
crDELAY( xHandle, 100 ); * crDELAY( xHandle, 100 );
} * }
*
// Co-routines must end with a call to crEND(). * // Co-routines must end with a call to crEND().
crEND(); * crEND();
}</pre> * }
* </pre>
* \defgroup crQUEUE_SEND crQUEUE_SEND * \defgroup crQUEUE_SEND crQUEUE_SEND
* \ingroup Tasks * \ingroup Tasks
*/ */
#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ #define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \
{ \ { \
*( pxResult ) = xQueueCRSend( ( pxQueue) , ( pvItemToQueue) , ( xTicksToWait ) ); \ *( pxResult ) = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), ( xTicksToWait ) ); \
if( *( pxResult ) == errQUEUE_BLOCKED ) \ if( *( pxResult ) == errQUEUE_BLOCKED ) \
{ \ { \
crSET_STATE0( ( xHandle ) ); \ crSET_STATE0( ( xHandle ) ); \
*pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \ *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \
} \ } \
if( *pxResult == errQUEUE_YIELD ) \ if( *pxResult == errQUEUE_YIELD ) \
{ \ { \
crSET_STATE1( ( xHandle ) ); \ crSET_STATE1( ( xHandle ) ); \
*pxResult = pdPASS; \ *pxResult = pdPASS; \
} \ } \
} }
/** /**
* croutine. h * croutine. h
* <pre> * <pre>
crQUEUE_RECEIVE( * crQUEUE_RECEIVE(
CoRoutineHandle_t xHandle, * CoRoutineHandle_t xHandle,
QueueHandle_t pxQueue, * QueueHandle_t pxQueue,
void *pvBuffer, * void *pvBuffer,
TickType_t xTicksToWait, * TickType_t xTicksToWait,
BaseType_t *pxResult * BaseType_t *pxResult
)</pre> * )
* </pre>
* *
* The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
* equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
@ -440,58 +461,60 @@ void vCoRoutineSchedule( void );
* an error code as defined within ProjDefs.h. * an error code as defined within ProjDefs.h.
* *
* Example usage: * Example usage:
<pre> * <pre>
// A co-routine receives the number of an LED to flash from a queue. It * // A co-routine receives the number of an LED to flash from a queue. It
// blocks on the queue until the number is received. * // blocks on the queue until the number is received.
static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) * static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
{ * {
// Variables in co-routines must be declared static if they must maintain value across a blocking call. * // Variables in co-routines must be declared static if they must maintain value across a blocking call.
static BaseType_t xResult; * static BaseType_t xResult;
static UBaseType_t uxLEDToFlash; * static UBaseType_t uxLEDToFlash;
*
// All co-routines must start with a call to crSTART(). * // All co-routines must start with a call to crSTART().
crSTART( xHandle ); * crSTART( xHandle );
*
for( ;; ) * for( ;; )
{ * {
// Wait for data to become available on the queue. * // Wait for data to become available on the queue.
crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult ); * crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
*
if( xResult == pdPASS ) * if( xResult == pdPASS )
{ * {
// We received the LED to flash - flash it! * // We received the LED to flash - flash it!
vParTestToggleLED( uxLEDToFlash ); * vParTestToggleLED( uxLEDToFlash );
} * }
} * }
*
crEND(); * crEND();
}</pre> * }
* </pre>
* \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE
* \ingroup Tasks * \ingroup Tasks
*/ */
#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ #define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \
{ \ { \
*( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), ( xTicksToWait ) ); \ *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), ( xTicksToWait ) ); \
if( *( pxResult ) == errQUEUE_BLOCKED ) \ if( *( pxResult ) == errQUEUE_BLOCKED ) \
{ \ { \
crSET_STATE0( ( xHandle ) ); \ crSET_STATE0( ( xHandle ) ); \
*( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), 0 ); \ *( pxResult ) = xQueueCRReceive( ( pxQueue ), ( pvBuffer ), 0 ); \
} \ } \
if( *( pxResult ) == errQUEUE_YIELD ) \ if( *( pxResult ) == errQUEUE_YIELD ) \
{ \ { \
crSET_STATE1( ( xHandle ) ); \ crSET_STATE1( ( xHandle ) ); \
*( pxResult ) = pdPASS; \ *( pxResult ) = pdPASS; \
} \ } \
} }
/** /**
* croutine. h * croutine. h
* <pre> * <pre>
crQUEUE_SEND_FROM_ISR( * crQUEUE_SEND_FROM_ISR(
QueueHandle_t pxQueue, * QueueHandle_t pxQueue,
void *pvItemToQueue, * void *pvItemToQueue,
BaseType_t xCoRoutinePreviouslyWoken * BaseType_t xCoRoutinePreviouslyWoken
)</pre> * )
* </pre>
* *
* The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
* co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
@ -526,69 +549,72 @@ void vCoRoutineSchedule( void );
* the ISR. * the ISR.
* *
* Example usage: * Example usage:
<pre> * <pre>
// A co-routine that blocks on a queue waiting for characters to be received. * // A co-routine that blocks on a queue waiting for characters to be received.
static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) * static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
{ * {
char cRxedChar; * char cRxedChar;
BaseType_t xResult; * BaseType_t xResult;
*
// All co-routines must start with a call to crSTART(). * // All co-routines must start with a call to crSTART().
crSTART( xHandle ); * crSTART( xHandle );
*
for( ;; ) * for( ;; )
{ * {
// Wait for data to become available on the queue. This assumes the * // Wait for data to become available on the queue. This assumes the
// queue xCommsRxQueue has already been created! * // queue xCommsRxQueue has already been created!
crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult ); * crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
*
// Was a character received? * // Was a character received?
if( xResult == pdPASS ) * if( xResult == pdPASS )
{ * {
// Process the character here. * // Process the character here.
} * }
} * }
*
// All co-routines must end with a call to crEND(). * // All co-routines must end with a call to crEND().
crEND(); * crEND();
} * }
*
// An ISR that uses a queue to send characters received on a serial port to * // An ISR that uses a queue to send characters received on a serial port to
// a co-routine. * // a co-routine.
void vUART_ISR( void ) * void vUART_ISR( void )
{ * {
char cRxedChar; * char cRxedChar;
BaseType_t xCRWokenByPost = pdFALSE; * BaseType_t xCRWokenByPost = pdFALSE;
*
// We loop around reading characters until there are none left in the UART. * // We loop around reading characters until there are none left in the UART.
while( UART_RX_REG_NOT_EMPTY() ) * while( UART_RX_REG_NOT_EMPTY() )
{ * {
// Obtain the character from the UART. * // Obtain the character from the UART.
cRxedChar = UART_RX_REG; * cRxedChar = UART_RX_REG;
*
// Post the character onto a queue. xCRWokenByPost will be pdFALSE * // Post the character onto a queue. xCRWokenByPost will be pdFALSE
// the first time around the loop. If the post causes a co-routine * // the first time around the loop. If the post causes a co-routine
// to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE. * // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
// In this manner we can ensure that if more than one co-routine is * // In this manner we can ensure that if more than one co-routine is
// blocked on the queue only one is woken by this ISR no matter how * // blocked on the queue only one is woken by this ISR no matter how
// many characters are posted to the queue. * // many characters are posted to the queue.
xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost ); * xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
} * }
}</pre> * }
* </pre>
* \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR
* \ingroup Tasks * \ingroup Tasks
*/ */
#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) ) #define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) \
xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
/** /**
* croutine. h * croutine. h
* <pre> * <pre>
crQUEUE_SEND_FROM_ISR( * crQUEUE_SEND_FROM_ISR(
QueueHandle_t pxQueue, * QueueHandle_t pxQueue,
void *pvBuffer, * void *pvBuffer,
BaseType_t * pxCoRoutineWoken * BaseType_t * pxCoRoutineWoken
)</pre> * )
* </pre>
* *
* The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
* co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
@ -623,75 +649,77 @@ void vCoRoutineSchedule( void );
* pdFALSE. * pdFALSE.
* *
* Example usage: * Example usage:
<pre> * <pre>
// A co-routine that posts a character to a queue then blocks for a fixed * // A co-routine that posts a character to a queue then blocks for a fixed
// period. The character is incremented each time. * // period. The character is incremented each time.
static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) * static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
{ * {
// cChar holds its value while this co-routine is blocked and must therefore * // cChar holds its value while this co-routine is blocked and must therefore
// be declared static. * // be declared static.
static char cCharToTx = 'a'; * static char cCharToTx = 'a';
BaseType_t xResult; * BaseType_t xResult;
*
// All co-routines must start with a call to crSTART(). * // All co-routines must start with a call to crSTART().
crSTART( xHandle ); * crSTART( xHandle );
*
for( ;; ) * for( ;; )
{ * {
// Send the next character to the queue. * // Send the next character to the queue.
crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult ); * crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
*
if( xResult == pdPASS ) * if( xResult == pdPASS )
{ * {
// The character was successfully posted to the queue. * // The character was successfully posted to the queue.
} * }
else * else
{ * {
// Could not post the character to the queue. * // Could not post the character to the queue.
} * }
*
// Enable the UART Tx interrupt to cause an interrupt in this * // Enable the UART Tx interrupt to cause an interrupt in this
// hypothetical UART. The interrupt will obtain the character * // hypothetical UART. The interrupt will obtain the character
// from the queue and send it. * // from the queue and send it.
ENABLE_RX_INTERRUPT(); * ENABLE_RX_INTERRUPT();
*
// Increment to the next character then block for a fixed period. * // Increment to the next character then block for a fixed period.
// cCharToTx will maintain its value across the delay as it is * // cCharToTx will maintain its value across the delay as it is
// declared static. * // declared static.
cCharToTx++; * cCharToTx++;
if( cCharToTx > 'x' ) * if( cCharToTx > 'x' )
{ * {
cCharToTx = 'a'; * cCharToTx = 'a';
} * }
crDELAY( 100 ); * crDELAY( 100 );
} * }
*
// All co-routines must end with a call to crEND(). * // All co-routines must end with a call to crEND().
crEND(); * crEND();
} * }
*
// An ISR that uses a queue to receive characters to send on a UART. * // An ISR that uses a queue to receive characters to send on a UART.
void vUART_ISR( void ) * void vUART_ISR( void )
{ * {
char cCharToTx; * char cCharToTx;
BaseType_t xCRWokenByPost = pdFALSE; * BaseType_t xCRWokenByPost = pdFALSE;
*
while( UART_TX_REG_EMPTY() ) * while( UART_TX_REG_EMPTY() )
{ * {
// Are there any characters in the queue waiting to be sent? * // Are there any characters in the queue waiting to be sent?
// xCRWokenByPost will automatically be set to pdTRUE if a co-routine * // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
// is woken by the post - ensuring that only a single co-routine is * // is woken by the post - ensuring that only a single co-routine is
// woken no matter how many times we go around this loop. * // woken no matter how many times we go around this loop.
if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) ) * if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
{ * {
SEND_CHARACTER( cCharToTx ); * SEND_CHARACTER( cCharToTx );
} * }
} * }
}</pre> * }
* </pre>
* \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR
* \ingroup Tasks * \ingroup Tasks
*/ */
#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) ) #define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) \
xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
/* /*
* This function is intended for internal use by the co-routine macros only. * This function is intended for internal use by the co-routine macros only.
@ -702,7 +730,8 @@ void vCoRoutineSchedule( void );
* Removes the current co-routine from its ready list and places it in the * Removes the current co-routine from its ready list and places it in the
* appropriate delayed list. * appropriate delayed list.
*/ */
void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ); void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay,
List_t * pxEventList );
/* /*
* This function is intended for internal use by the queue implementation only. * This function is intended for internal use by the queue implementation only.
@ -711,10 +740,12 @@ void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList )
* Removes the highest priority co-routine from the event list and places it in * Removes the highest priority co-routine from the event list and places it in
* the pending ready list. * the pending ready list.
*/ */
BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ); BaseType_t xCoRoutineRemoveFromEventList( const List_t * pxEventList );
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* CO_ROUTINE_H */ #endif /* CO_ROUTINE_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef DEPRECATED_DEFINITIONS_H #ifndef DEPRECATED_DEFINITIONS_H
@ -30,158 +29,158 @@
/* Each FreeRTOS port has a unique portmacro.h header file. Originally a /* Each FreeRTOS port has a unique portmacro.h header file. Originally a
pre-processor definition was used to ensure the pre-processor found the correct * pre-processor definition was used to ensure the pre-processor found the correct
portmacro.h file for the port being used. That scheme was deprecated in favour * portmacro.h file for the port being used. That scheme was deprecated in favour
of setting the compiler's include path such that it found the correct * of setting the compiler's include path such that it found the correct
portmacro.h file - removing the need for the constant and allowing the * portmacro.h file - removing the need for the constant and allowing the
portmacro.h file to be located anywhere in relation to the port being used. The * portmacro.h file to be located anywhere in relation to the port being used. The
definitions below remain in the code for backward compatibility only. New * definitions below remain in the code for backward compatibility only. New
projects should not use them. */ * projects should not use them. */
#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT #ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
#include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h" #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
typedef void ( __interrupt __far *pxISR )(); typedef void ( __interrupt __far * pxISR )();
#endif #endif
#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT #ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
#include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h" #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
typedef void ( __interrupt __far *pxISR )(); typedef void ( __interrupt __far * pxISR )();
#endif #endif
#ifdef GCC_MEGA_AVR #ifdef GCC_MEGA_AVR
#include "../portable/GCC/ATMega323/portmacro.h" #include "../portable/GCC/ATMega323/portmacro.h"
#endif #endif
#ifdef IAR_MEGA_AVR #ifdef IAR_MEGA_AVR
#include "../portable/IAR/ATMega323/portmacro.h" #include "../portable/IAR/ATMega323/portmacro.h"
#endif #endif
#ifdef MPLAB_PIC24_PORT #ifdef MPLAB_PIC24_PORT
#include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
#endif #endif
#ifdef MPLAB_DSPIC_PORT #ifdef MPLAB_DSPIC_PORT
#include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
#endif #endif
#ifdef MPLAB_PIC18F_PORT #ifdef MPLAB_PIC18F_PORT
#include "../../Source/portable/MPLAB/PIC18F/portmacro.h" #include "../../Source/portable/MPLAB/PIC18F/portmacro.h"
#endif #endif
#ifdef MPLAB_PIC32MX_PORT #ifdef MPLAB_PIC32MX_PORT
#include "../../Source/portable/MPLAB/PIC32MX/portmacro.h" #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h"
#endif #endif
#ifdef _FEDPICC #ifdef _FEDPICC
#include "libFreeRTOS/Include/portmacro.h" #include "libFreeRTOS/Include/portmacro.h"
#endif #endif
#ifdef SDCC_CYGNAL #ifdef SDCC_CYGNAL
#include "../../Source/portable/SDCC/Cygnal/portmacro.h" #include "../../Source/portable/SDCC/Cygnal/portmacro.h"
#endif #endif
#ifdef GCC_ARM7 #ifdef GCC_ARM7
#include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
#endif #endif
#ifdef GCC_ARM7_ECLIPSE #ifdef GCC_ARM7_ECLIPSE
#include "portmacro.h" #include "portmacro.h"
#endif #endif
#ifdef ROWLEY_LPC23xx #ifdef ROWLEY_LPC23xx
#include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h" #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
#endif #endif
#ifdef IAR_MSP430 #ifdef IAR_MSP430
#include "..\..\Source\portable\IAR\MSP430\portmacro.h" #include "..\..\Source\portable\IAR\MSP430\portmacro.h"
#endif #endif
#ifdef GCC_MSP430 #ifdef GCC_MSP430
#include "../../Source/portable/GCC/MSP430F449/portmacro.h" #include "../../Source/portable/GCC/MSP430F449/portmacro.h"
#endif #endif
#ifdef ROWLEY_MSP430 #ifdef ROWLEY_MSP430
#include "../../Source/portable/Rowley/MSP430F449/portmacro.h" #include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
#endif #endif
#ifdef ARM7_LPC21xx_KEIL_RVDS #ifdef ARM7_LPC21xx_KEIL_RVDS
#include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h" #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
#endif #endif
#ifdef SAM7_GCC #ifdef SAM7_GCC
#include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
#endif #endif
#ifdef SAM7_IAR #ifdef SAM7_IAR
#include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
#endif #endif
#ifdef SAM9XE_IAR #ifdef SAM9XE_IAR
#include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h" #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
#endif #endif
#ifdef LPC2000_IAR #ifdef LPC2000_IAR
#include "..\..\Source\portable\IAR\LPC2000\portmacro.h" #include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
#endif #endif
#ifdef STR71X_IAR #ifdef STR71X_IAR
#include "..\..\Source\portable\IAR\STR71x\portmacro.h" #include "..\..\Source\portable\IAR\STR71x\portmacro.h"
#endif #endif
#ifdef STR75X_IAR #ifdef STR75X_IAR
#include "..\..\Source\portable\IAR\STR75x\portmacro.h" #include "..\..\Source\portable\IAR\STR75x\portmacro.h"
#endif #endif
#ifdef STR75X_GCC #ifdef STR75X_GCC
#include "..\..\Source\portable\GCC\STR75x\portmacro.h" #include "..\..\Source\portable\GCC\STR75x\portmacro.h"
#endif #endif
#ifdef STR91X_IAR #ifdef STR91X_IAR
#include "..\..\Source\portable\IAR\STR91x\portmacro.h" #include "..\..\Source\portable\IAR\STR91x\portmacro.h"
#endif #endif
#ifdef GCC_H8S #ifdef GCC_H8S
#include "../../Source/portable/GCC/H8S2329/portmacro.h" #include "../../Source/portable/GCC/H8S2329/portmacro.h"
#endif #endif
#ifdef GCC_AT91FR40008 #ifdef GCC_AT91FR40008
#include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
#endif #endif
#ifdef RVDS_ARMCM3_LM3S102 #ifdef RVDS_ARMCM3_LM3S102
#include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
#endif #endif
#ifdef GCC_ARMCM3_LM3S102 #ifdef GCC_ARMCM3_LM3S102
#include "../../Source/portable/GCC/ARM_CM3/portmacro.h" #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
#endif #endif
#ifdef GCC_ARMCM3 #ifdef GCC_ARMCM3
#include "../../Source/portable/GCC/ARM_CM3/portmacro.h" #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
#endif #endif
#ifdef IAR_ARM_CM3 #ifdef IAR_ARM_CM3
#include "../../Source/portable/IAR/ARM_CM3/portmacro.h" #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
#endif #endif
#ifdef IAR_ARMCM3_LM #ifdef IAR_ARMCM3_LM
#include "../../Source/portable/IAR/ARM_CM3/portmacro.h" #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
#endif #endif
#ifdef HCS12_CODE_WARRIOR #ifdef HCS12_CODE_WARRIOR
#include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
#endif #endif
#ifdef MICROBLAZE_GCC #ifdef MICROBLAZE_GCC
#include "../../Source/portable/GCC/MicroBlaze/portmacro.h" #include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
#endif #endif
#ifdef TERN_EE #ifdef TERN_EE
#include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
#endif #endif
#ifdef GCC_HCS12 #ifdef GCC_HCS12
#include "../../Source/portable/GCC/HCS12/portmacro.h" #include "../../Source/portable/GCC/HCS12/portmacro.h"
#endif #endif
#ifdef GCC_MCF5235 #ifdef GCC_MCF5235
@ -189,91 +188,92 @@ projects should not use them. */
#endif #endif
#ifdef COLDFIRE_V2_GCC #ifdef COLDFIRE_V2_GCC
#include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h" #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
#endif #endif
#ifdef COLDFIRE_V2_CODEWARRIOR #ifdef COLDFIRE_V2_CODEWARRIOR
#include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h" #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
#endif #endif
#ifdef GCC_PPC405 #ifdef GCC_PPC405
#include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h" #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
#endif #endif
#ifdef GCC_PPC440 #ifdef GCC_PPC440
#include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h" #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
#endif #endif
#ifdef _16FX_SOFTUNE #ifdef _16FX_SOFTUNE
#include "..\..\Source\portable\Softune\MB96340\portmacro.h" #include "..\..\Source\portable\Softune\MB96340\portmacro.h"
#endif #endif
#ifdef BCC_INDUSTRIAL_PC_PORT #ifdef BCC_INDUSTRIAL_PC_PORT
/* A short file name has to be used in place of the normal
FreeRTOSConfig.h when using the Borland compiler. */ /* A short file name has to be used in place of the normal
#include "frconfig.h" * FreeRTOSConfig.h when using the Borland compiler. */
#include "..\portable\BCC\16BitDOS\PC\prtmacro.h" #include "frconfig.h"
typedef void ( __interrupt __far *pxISR )(); #include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
typedef void ( __interrupt __far * pxISR )();
#endif #endif
#ifdef BCC_FLASH_LITE_186_PORT #ifdef BCC_FLASH_LITE_186_PORT
/* A short file name has to be used in place of the normal
FreeRTOSConfig.h when using the Borland compiler. */ /* A short file name has to be used in place of the normal
#include "frconfig.h" * FreeRTOSConfig.h when using the Borland compiler. */
#include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" #include "frconfig.h"
typedef void ( __interrupt __far *pxISR )(); #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
typedef void ( __interrupt __far * pxISR )();
#endif #endif
#ifdef __GNUC__ #ifdef __GNUC__
#ifdef __AVR32_AVR32A__ #ifdef __AVR32_AVR32A__
#include "portmacro.h" #include "portmacro.h"
#endif #endif
#endif #endif
#ifdef __ICCAVR32__ #ifdef __ICCAVR32__
#ifdef __CORE__ #ifdef __CORE__
#if __CORE__ == __AVR32A__ #if __CORE__ == __AVR32A__
#include "portmacro.h" #include "portmacro.h"
#endif #endif
#endif #endif
#endif #endif
#ifdef __91467D #ifdef __91467D
#include "portmacro.h" #include "portmacro.h"
#endif #endif
#ifdef __96340 #ifdef __96340
#include "portmacro.h" #include "portmacro.h"
#endif #endif
#ifdef __IAR_V850ES_Fx3__ #ifdef __IAR_V850ES_Fx3__
#include "../../Source/portable/IAR/V850ES/portmacro.h" #include "../../Source/portable/IAR/V850ES/portmacro.h"
#endif #endif
#ifdef __IAR_V850ES_Jx3__ #ifdef __IAR_V850ES_Jx3__
#include "../../Source/portable/IAR/V850ES/portmacro.h" #include "../../Source/portable/IAR/V850ES/portmacro.h"
#endif #endif
#ifdef __IAR_V850ES_Jx3_L__ #ifdef __IAR_V850ES_Jx3_L__
#include "../../Source/portable/IAR/V850ES/portmacro.h" #include "../../Source/portable/IAR/V850ES/portmacro.h"
#endif #endif
#ifdef __IAR_V850ES_Jx2__ #ifdef __IAR_V850ES_Jx2__
#include "../../Source/portable/IAR/V850ES/portmacro.h" #include "../../Source/portable/IAR/V850ES/portmacro.h"
#endif #endif
#ifdef __IAR_V850ES_Hx2__ #ifdef __IAR_V850ES_Hx2__
#include "../../Source/portable/IAR/V850ES/portmacro.h" #include "../../Source/portable/IAR/V850ES/portmacro.h"
#endif #endif
#ifdef __IAR_78K0R_Kx3__ #ifdef __IAR_78K0R_Kx3__
#include "../../Source/portable/IAR/78K0R/portmacro.h" #include "../../Source/portable/IAR/78K0R/portmacro.h"
#endif #endif
#ifdef __IAR_78K0R_Kx3L__ #ifdef __IAR_78K0R_Kx3L__
#include "../../Source/portable/IAR/78K0R/portmacro.h" #include "../../Source/portable/IAR/78K0R/portmacro.h"
#endif #endif
#endif /* DEPRECATED_DEFINITIONS_H */ #endif /* DEPRECATED_DEFINITIONS_H */

File diff suppressed because it is too large Load diff

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/* /*
@ -53,13 +52,14 @@
* \ingroup FreeRTOSIntro * \ingroup FreeRTOSIntro
*/ */
#ifndef INC_FREERTOS_H
#error FreeRTOS.h must be included before list.h
#endif
#ifndef LIST_H #ifndef LIST_H
#define LIST_H #define LIST_H
#ifndef INC_FREERTOS_H
#error "FreeRTOS.h must be included before list.h"
#endif
/* /*
* The list structure members are modified from within interrupts, and therefore * The list structure members are modified from within interrupts, and therefore
* by rights should be declared volatile. However, they are only modified in a * by rights should be declared volatile. However, they are only modified in a
@ -89,47 +89,49 @@
* "#define configLIST_VOLATILE volatile" * "#define configLIST_VOLATILE volatile"
*/ */
#ifndef configLIST_VOLATILE #ifndef configLIST_VOLATILE
#define configLIST_VOLATILE #define configLIST_VOLATILE
#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */ #endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/* Macros that can be used to place known values within the list structures, /* Macros that can be used to place known values within the list structures,
then check that the known values do not get corrupted during the execution of * then check that the known values do not get corrupted during the execution of
the application. These may catch the list data structures being overwritten in * the application. These may catch the list data structures being overwritten in
memory. They will not catch data errors caused by incorrect configuration or * memory. They will not catch data errors caused by incorrect configuration or
use of FreeRTOS.*/ * use of FreeRTOS.*/
#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) #if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 )
/* Define the macros to do nothing. */ /* Define the macros to do nothing. */
#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE
#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE
#define listFIRST_LIST_INTEGRITY_CHECK_VALUE #define listFIRST_LIST_INTEGRITY_CHECK_VALUE
#define listSECOND_LIST_INTEGRITY_CHECK_VALUE #define listSECOND_LIST_INTEGRITY_CHECK_VALUE
#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem )
#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList )
#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList )
#define listTEST_LIST_ITEM_INTEGRITY( pxItem ) #define listTEST_LIST_ITEM_INTEGRITY( pxItem )
#define listTEST_LIST_INTEGRITY( pxList ) #define listTEST_LIST_INTEGRITY( pxList )
#else #else /* if ( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) */
/* Define macros that add new members into the list structures. */ /* Define macros that add new members into the list structures. */
#define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1; #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1;
#define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2; #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2;
#define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1; #define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1;
#define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2; #define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2;
/* Define macros that set the new structure members to known values. */ /* Define macros that set the new structure members to known values. */
#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE
#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE
/* Define macros that will assert if one of the structure members does not /* Define macros that will assert if one of the structure members does not
contain its expected value. */ * contain its expected value. */
#define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
#define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) #define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) )
#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */ #endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */
@ -139,22 +141,22 @@ use of FreeRTOS.*/
struct xLIST; struct xLIST;
struct xLIST_ITEM struct xLIST_ITEM
{ {
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */
struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */ struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */ struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */
void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */
struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */ struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */
listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
}; };
typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */ typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */
struct xMINI_LIST_ITEM struct xMINI_LIST_ITEM
{ {
listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
configLIST_VOLATILE TickType_t xItemValue; configLIST_VOLATILE TickType_t xItemValue;
struct xLIST_ITEM * configLIST_VOLATILE pxNext; struct xLIST_ITEM * configLIST_VOLATILE pxNext;
struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; struct xLIST_ITEM * configLIST_VOLATILE pxPrevious;
}; };
typedef struct xMINI_LIST_ITEM MiniListItem_t; typedef struct xMINI_LIST_ITEM MiniListItem_t;
@ -163,11 +165,11 @@ typedef struct xMINI_LIST_ITEM MiniListItem_t;
*/ */
typedef struct xLIST typedef struct xLIST
{ {
listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
volatile UBaseType_t uxNumberOfItems; volatile UBaseType_t uxNumberOfItems;
ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */ ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */
MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
} List_t; } List_t;
/* /*
@ -177,7 +179,7 @@ typedef struct xLIST
* \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) ) #define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) )
/* /*
* Access macro to get the owner of a list item. The owner of a list item * Access macro to get the owner of a list item. The owner of a list item
@ -186,7 +188,7 @@ typedef struct xLIST
* \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER * \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner ) #define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner )
/* /*
* Access macro to set the value of the list item. In most cases the value is * Access macro to set the value of the list item. In most cases the value is
@ -195,7 +197,7 @@ typedef struct xLIST
* \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) ) #define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) )
/* /*
* Access macro to retrieve the value of the list item. The value can * Access macro to retrieve the value of the list item. The value can
@ -205,7 +207,7 @@ typedef struct xLIST
* \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) #define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue )
/* /*
* Access macro to retrieve the value of the list item at the head of a given * Access macro to retrieve the value of the list item at the head of a given
@ -214,7 +216,7 @@ typedef struct xLIST
* \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) #define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue )
/* /*
* Return the list item at the head of the list. * Return the list item at the head of the list.
@ -222,7 +224,7 @@ typedef struct xLIST
* \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext ) #define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext )
/* /*
* Return the next list item. * Return the next list item.
@ -230,7 +232,7 @@ typedef struct xLIST
* \page listGET_NEXT listGET_NEXT * \page listGET_NEXT listGET_NEXT
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext ) #define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext )
/* /*
* Return the list item that marks the end of the list * Return the list item that marks the end of the list
@ -238,7 +240,7 @@ typedef struct xLIST
* \page listGET_END_MARKER listGET_END_MARKER * \page listGET_END_MARKER listGET_END_MARKER
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) ) #define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) )
/* /*
* Access macro to determine if a list contains any items. The macro will * Access macro to determine if a list contains any items. The macro will
@ -247,12 +249,12 @@ typedef struct xLIST
* \page listLIST_IS_EMPTY listLIST_IS_EMPTY * \page listLIST_IS_EMPTY listLIST_IS_EMPTY
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listLIST_IS_EMPTY( pxList ) ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE ) #define listLIST_IS_EMPTY( pxList ) ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE )
/* /*
* Access macro to return the number of items in the list. * Access macro to return the number of items in the list.
*/ */
#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) #define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems )
/* /*
* Access function to obtain the owner of the next entry in a list. * Access function to obtain the owner of the next entry in a list.
@ -274,18 +276,18 @@ typedef struct xLIST
* \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ #define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \
{ \ { \
List_t * const pxConstList = ( pxList ); \ List_t * const pxConstList = ( pxList ); \
/* Increment the index to the next item and return the item, ensuring */ \ /* Increment the index to the next item and return the item, ensuring */ \
/* we don't return the marker used at the end of the list. */ \ /* we don't return the marker used at the end of the list. */ \
( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \ if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \
{ \ { \
( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
} \ } \
( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \
} }
/* /*
@ -304,7 +306,7 @@ List_t * const pxConstList = ( pxList ); \
* \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY
* \ingroup LinkedList * \ingroup LinkedList
*/ */
#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner ) #define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( ( &( ( pxList )->xListEnd ) )->pxNext->pvOwner )
/* /*
* Check to see if a list item is within a list. The list item maintains a * Check to see if a list item is within a list. The list item maintains a
@ -315,7 +317,7 @@ List_t * const pxConstList = ( pxList ); \
* @param pxListItem The list item we want to know if is in the list. * @param pxListItem The list item we want to know if is in the list.
* @return pdTRUE if the list item is in the list, otherwise pdFALSE. * @return pdTRUE if the list item is in the list, otherwise pdFALSE.
*/ */
#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) ) #define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) )
/* /*
* Return the list a list item is contained within (referenced from). * Return the list a list item is contained within (referenced from).
@ -323,14 +325,14 @@ List_t * const pxConstList = ( pxList ); \
* @param pxListItem The list item being queried. * @param pxListItem The list item being queried.
* @return A pointer to the List_t object that references the pxListItem * @return A pointer to the List_t object that references the pxListItem
*/ */
#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer ) #define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer )
/* /*
* This provides a crude means of knowing if a list has been initialised, as * This provides a crude means of knowing if a list has been initialised, as
* pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise() * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise()
* function. * function.
*/ */
#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY ) #define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY )
/* /*
* Must be called before a list is used! This initialises all the members * Must be called before a list is used! This initialises all the members
@ -366,7 +368,8 @@ void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION;
* \page vListInsert vListInsert * \page vListInsert vListInsert
* \ingroup LinkedList * \ingroup LinkedList
*/ */
void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; void vListInsert( List_t * const pxList,
ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
/* /*
* Insert a list item into a list. The item will be inserted in a position * Insert a list item into a list. The item will be inserted in a position
@ -387,7 +390,8 @@ void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIV
* \page vListInsertEnd vListInsertEnd * \page vListInsertEnd vListInsertEnd
* \ingroup LinkedList * \ingroup LinkedList
*/ */
void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; void vListInsertEnd( List_t * const pxList,
ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION;
/* /*
* Remove an item from a list. The list item has a pointer to the list that * Remove an item from a list. The list item has a pointer to the list that
@ -404,9 +408,10 @@ void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) P
*/ */
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION; UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION;
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif
#endif #endif
/* *INDENT-ON* */
#endif /* ifndef LIST_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
@ -63,15 +62,17 @@
#define FREERTOS_MESSAGE_BUFFER_H #define FREERTOS_MESSAGE_BUFFER_H
#ifndef INC_FREERTOS_H #ifndef INC_FREERTOS_H
#error "include FreeRTOS.h must appear in source files before include message_buffer.h" #error "include FreeRTOS.h must appear in source files before include message_buffer.h"
#endif #endif
/* Message buffers are built onto of stream buffers. */ /* Message buffers are built onto of stream buffers. */
#include "stream_buffer.h" #include "stream_buffer.h"
/* *INDENT-OFF* */
#if defined( __cplusplus ) #if defined( __cplusplus )
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/** /**
* Type by which message buffers are referenced. For example, a call to * Type by which message buffers are referenced. For example, a call to
@ -86,9 +87,9 @@ typedef void * MessageBufferHandle_t;
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes ); * MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
</pre> * </pre>
* *
* Creates a new message buffer using dynamically allocated memory. See * Creates a new message buffer using dynamically allocated memory. See
* xMessageBufferCreateStatic() for a version that uses statically allocated * xMessageBufferCreateStatic() for a version that uses statically allocated
@ -112,43 +113,44 @@ MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
* buffer. * buffer.
* *
* Example use: * Example use:
<pre> * <pre>
*
void vAFunction( void ) * void vAFunction( void )
{ * {
MessageBufferHandle_t xMessageBuffer; * MessageBufferHandle_t xMessageBuffer;
const size_t xMessageBufferSizeBytes = 100; * const size_t xMessageBufferSizeBytes = 100;
*
// Create a message buffer that can hold 100 bytes. The memory used to hold * // Create a message buffer that can hold 100 bytes. The memory used to hold
// both the message buffer structure and the messages themselves is allocated * // both the message buffer structure and the messages themselves is allocated
// dynamically. Each message added to the buffer consumes an additional 4 * // dynamically. Each message added to the buffer consumes an additional 4
// bytes which are used to hold the lengh of the message. * // bytes which are used to hold the lengh of the message.
xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes ); * xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
*
if( xMessageBuffer == NULL ) * if( xMessageBuffer == NULL )
{ * {
// There was not enough heap memory space available to create the * // There was not enough heap memory space available to create the
// message buffer. * // message buffer.
} * }
else * else
{ * {
// The message buffer was created successfully and can now be used. * // The message buffer was created successfully and can now be used.
} * }
*
</pre> * </pre>
* \defgroup xMessageBufferCreate xMessageBufferCreate * \defgroup xMessageBufferCreate xMessageBufferCreate
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferCreate( xBufferSizeBytes ) ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE ) #define xMessageBufferCreate( xBufferSizeBytes ) \
( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes, * MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
uint8_t *pucMessageBufferStorageArea, * uint8_t *pucMessageBufferStorageArea,
StaticMessageBuffer_t *pxStaticMessageBuffer ); * StaticMessageBuffer_t *pxStaticMessageBuffer );
</pre> * </pre>
* Creates a new message buffer using statically allocated memory. See * Creates a new message buffer using statically allocated memory. See
* xMessageBufferCreate() for a version that uses dynamically allocated memory. * xMessageBufferCreate() for a version that uses dynamically allocated memory.
* *
@ -173,49 +175,50 @@ MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
* pxStaticmessageBuffer are NULL then NULL is returned. * pxStaticmessageBuffer are NULL then NULL is returned.
* *
* Example use: * Example use:
<pre> * <pre>
*
// Used to dimension the array used to hold the messages. The available space * // Used to dimension the array used to hold the messages. The available space
// will actually be one less than this, so 999. * // will actually be one less than this, so 999.
#define STORAGE_SIZE_BYTES 1000 #define STORAGE_SIZE_BYTES 1000
*
// Defines the memory that will actually hold the messages within the message * // Defines the memory that will actually hold the messages within the message
// buffer. * // buffer.
static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ]; * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
*
// The variable used to hold the message buffer structure. * // The variable used to hold the message buffer structure.
StaticMessageBuffer_t xMessageBufferStruct; * StaticMessageBuffer_t xMessageBufferStruct;
*
void MyFunction( void ) * void MyFunction( void )
{ * {
MessageBufferHandle_t xMessageBuffer; * MessageBufferHandle_t xMessageBuffer;
*
xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ), * xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
ucBufferStorage, * ucBufferStorage,
&xMessageBufferStruct ); * &xMessageBufferStruct );
*
// As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer * // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
// parameters were NULL, xMessageBuffer will not be NULL, and can be used to * // parameters were NULL, xMessageBuffer will not be NULL, and can be used to
// reference the created message buffer in other message buffer API calls. * // reference the created message buffer in other message buffer API calls.
*
// Other code that uses the message buffer can go here. * // Other code that uses the message buffer can go here.
} * }
*
</pre> * </pre>
* \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer ) #define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) \
( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer, * size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
const void *pvTxData, * const void *pvTxData,
size_t xDataLengthBytes, * size_t xDataLengthBytes,
TickType_t xTicksToWait ); * TickType_t xTicksToWait );
<pre> * </pre>
* *
* Sends a discrete message to the message buffer. The message can be any * Sends a discrete message to the message buffer. The message can be any
* length that fits within the buffer's free space, and is copied into the * length that fits within the buffer's free space, and is copied into the
@ -272,49 +275,50 @@ size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
* time out then xDataLengthBytes is returned. * time out then xDataLengthBytes is returned.
* *
* Example use: * Example use:
<pre> * <pre>
void vAFunction( MessageBufferHandle_t xMessageBuffer ) * void vAFunction( MessageBufferHandle_t xMessageBuffer )
{ * {
size_t xBytesSent; * size_t xBytesSent;
uint8_t ucArrayToSend[] = { 0, 1, 2, 3 }; * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
char *pcStringToSend = "String to send"; * char *pcStringToSend = "String to send";
const TickType_t x100ms = pdMS_TO_TICKS( 100 ); * const TickType_t x100ms = pdMS_TO_TICKS( 100 );
*
// Send an array to the message buffer, blocking for a maximum of 100ms to * // Send an array to the message buffer, blocking for a maximum of 100ms to
// wait for enough space to be available in the message buffer. * // wait for enough space to be available in the message buffer.
xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms ); * xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
*
if( xBytesSent != sizeof( ucArrayToSend ) ) * if( xBytesSent != sizeof( ucArrayToSend ) )
{ * {
// The call to xMessageBufferSend() times out before there was enough * // The call to xMessageBufferSend() times out before there was enough
// space in the buffer for the data to be written. * // space in the buffer for the data to be written.
} * }
*
// Send the string to the message buffer. Return immediately if there is * // Send the string to the message buffer. Return immediately if there is
// not enough space in the buffer. * // not enough space in the buffer.
xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 ); * xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
*
if( xBytesSent != strlen( pcStringToSend ) ) * if( xBytesSent != strlen( pcStringToSend ) )
{ * {
// The string could not be added to the message buffer because there was * // The string could not be added to the message buffer because there was
// not enough free space in the buffer. * // not enough free space in the buffer.
} * }
} * }
</pre> * </pre>
* \defgroup xMessageBufferSend xMessageBufferSend * \defgroup xMessageBufferSend xMessageBufferSend
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) #define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) \
xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer, * size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
const void *pvTxData, * const void *pvTxData,
size_t xDataLengthBytes, * size_t xDataLengthBytes,
BaseType_t *pxHigherPriorityTaskWoken ); * BaseType_t *pxHigherPriorityTaskWoken );
<pre> * </pre>
* *
* Interrupt safe version of the API function that sends a discrete message to * Interrupt safe version of the API function that sends a discrete message to
* the message buffer. The message can be any length that fits within the * the message buffer. The message can be any length that fits within the
@ -372,53 +376,54 @@ size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
* then 0 is returned, otherwise xDataLengthBytes is returned. * then 0 is returned, otherwise xDataLengthBytes is returned.
* *
* Example use: * Example use:
<pre> * <pre>
// A message buffer that has already been created. * // A message buffer that has already been created.
MessageBufferHandle_t xMessageBuffer; * MessageBufferHandle_t xMessageBuffer;
*
void vAnInterruptServiceRoutine( void ) * void vAnInterruptServiceRoutine( void )
{ * {
size_t xBytesSent; * size_t xBytesSent;
char *pcStringToSend = "String to send"; * char *pcStringToSend = "String to send";
BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
*
// Attempt to send the string to the message buffer. * // Attempt to send the string to the message buffer.
xBytesSent = xMessageBufferSendFromISR( xMessageBuffer, * xBytesSent = xMessageBufferSendFromISR( xMessageBuffer,
( void * ) pcStringToSend, * ( void * ) pcStringToSend,
strlen( pcStringToSend ), * strlen( pcStringToSend ),
&xHigherPriorityTaskWoken ); * &xHigherPriorityTaskWoken );
*
if( xBytesSent != strlen( pcStringToSend ) ) * if( xBytesSent != strlen( pcStringToSend ) )
{ * {
// The string could not be added to the message buffer because there was * // The string could not be added to the message buffer because there was
// not enough free space in the buffer. * // not enough free space in the buffer.
} * }
*
// If xHigherPriorityTaskWoken was set to pdTRUE inside * // If xHigherPriorityTaskWoken was set to pdTRUE inside
// xMessageBufferSendFromISR() then a task that has a priority above the * // xMessageBufferSendFromISR() then a task that has a priority above the
// priority of the currently executing task was unblocked and a context * // priority of the currently executing task was unblocked and a context
// switch should be performed to ensure the ISR returns to the unblocked * // switch should be performed to ensure the ISR returns to the unblocked
// task. In most FreeRTOS ports this is done by simply passing * // task. In most FreeRTOS ports this is done by simply passing
// xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the * // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
// variables value, and perform the context switch if necessary. Check the * // variables value, and perform the context switch if necessary. Check the
// documentation for the port in use for port specific instructions. * // documentation for the port in use for port specific instructions.
portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); * portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
} * }
</pre> * </pre>
* \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) #define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) \
xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer, * size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
void *pvRxData, * void *pvRxData,
size_t xBufferLengthBytes, * size_t xBufferLengthBytes,
TickType_t xTicksToWait ); * TickType_t xTicksToWait );
</pre> * </pre>
* *
* Receives a discrete message from a message buffer. Messages can be of * Receives a discrete message from a message buffer. Messages can be of
* variable length and are copied out of the buffer. * variable length and are copied out of the buffer.
@ -471,43 +476,44 @@ size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
* zero is returned. * zero is returned.
* *
* Example use: * Example use:
<pre> * <pre>
void vAFunction( MessageBuffer_t xMessageBuffer ) * void vAFunction( MessageBuffer_t xMessageBuffer )
{ * {
uint8_t ucRxData[ 20 ]; * uint8_t ucRxData[ 20 ];
size_t xReceivedBytes; * size_t xReceivedBytes;
const TickType_t xBlockTime = pdMS_TO_TICKS( 20 ); * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
*
// Receive the next message from the message buffer. Wait in the Blocked * // Receive the next message from the message buffer. Wait in the Blocked
// state (so not using any CPU processing time) for a maximum of 100ms for * // state (so not using any CPU processing time) for a maximum of 100ms for
// a message to become available. * // a message to become available.
xReceivedBytes = xMessageBufferReceive( xMessageBuffer, * xReceivedBytes = xMessageBufferReceive( xMessageBuffer,
( void * ) ucRxData, * ( void * ) ucRxData,
sizeof( ucRxData ), * sizeof( ucRxData ),
xBlockTime ); * xBlockTime );
*
if( xReceivedBytes > 0 ) * if( xReceivedBytes > 0 )
{ * {
// A ucRxData contains a message that is xReceivedBytes long. Process * // A ucRxData contains a message that is xReceivedBytes long. Process
// the message here.... * // the message here....
} * }
} * }
</pre> * </pre>
* \defgroup xMessageBufferReceive xMessageBufferReceive * \defgroup xMessageBufferReceive xMessageBufferReceive
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) #define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) \
xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer, * size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
void *pvRxData, * void *pvRxData,
size_t xBufferLengthBytes, * size_t xBufferLengthBytes,
BaseType_t *pxHigherPriorityTaskWoken ); * BaseType_t *pxHigherPriorityTaskWoken );
</pre> * </pre>
* *
* An interrupt safe version of the API function that receives a discrete * An interrupt safe version of the API function that receives a discrete
* message from a message buffer. Messages can be of variable length and are * message from a message buffer. Messages can be of variable length and are
@ -561,50 +567,51 @@ size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
* any. * any.
* *
* Example use: * Example use:
<pre> * <pre>
// A message buffer that has already been created. * // A message buffer that has already been created.
MessageBuffer_t xMessageBuffer; * MessageBuffer_t xMessageBuffer;
*
void vAnInterruptServiceRoutine( void ) * void vAnInterruptServiceRoutine( void )
{ * {
uint8_t ucRxData[ 20 ]; * uint8_t ucRxData[ 20 ];
size_t xReceivedBytes; * size_t xReceivedBytes;
BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
*
// Receive the next message from the message buffer. * // Receive the next message from the message buffer.
xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer, * xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer,
( void * ) ucRxData, * ( void * ) ucRxData,
sizeof( ucRxData ), * sizeof( ucRxData ),
&xHigherPriorityTaskWoken ); * &xHigherPriorityTaskWoken );
*
if( xReceivedBytes > 0 ) * if( xReceivedBytes > 0 )
{ * {
// A ucRxData contains a message that is xReceivedBytes long. Process * // A ucRxData contains a message that is xReceivedBytes long. Process
// the message here.... * // the message here....
} * }
*
// If xHigherPriorityTaskWoken was set to pdTRUE inside * // If xHigherPriorityTaskWoken was set to pdTRUE inside
// xMessageBufferReceiveFromISR() then a task that has a priority above the * // xMessageBufferReceiveFromISR() then a task that has a priority above the
// priority of the currently executing task was unblocked and a context * // priority of the currently executing task was unblocked and a context
// switch should be performed to ensure the ISR returns to the unblocked * // switch should be performed to ensure the ISR returns to the unblocked
// task. In most FreeRTOS ports this is done by simply passing * // task. In most FreeRTOS ports this is done by simply passing
// xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the * // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
// variables value, and perform the context switch if necessary. Check the * // variables value, and perform the context switch if necessary. Check the
// documentation for the port in use for port specific instructions. * // documentation for the port in use for port specific instructions.
portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); * portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
} * }
</pre> * </pre>
* \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) #define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) \
xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer ); * void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
</pre> * </pre>
* *
* Deletes a message buffer that was previously created using a call to * Deletes a message buffer that was previously created using a call to
* xMessageBufferCreate() or xMessageBufferCreateStatic(). If the message * xMessageBufferCreate() or xMessageBufferCreateStatic(). If the message
@ -617,13 +624,14 @@ void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
* @param xMessageBuffer The handle of the message buffer to be deleted. * @param xMessageBuffer The handle of the message buffer to be deleted.
* *
*/ */
#define vMessageBufferDelete( xMessageBuffer ) vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer ) #define vMessageBufferDelete( xMessageBuffer ) \
vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
/** /**
* message_buffer.h * message_buffer.h
<pre> * <pre>
BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) ); * BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
</pre> * </pre>
* *
* Tests to see if a message buffer is full. A message buffer is full if it * Tests to see if a message buffer is full. A message buffer is full if it
* cannot accept any more messages, of any size, until space is made available * cannot accept any more messages, of any size, until space is made available
@ -634,13 +642,14 @@ BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
* @return If the message buffer referenced by xMessageBuffer is full then * @return If the message buffer referenced by xMessageBuffer is full then
* pdTRUE is returned. Otherwise pdFALSE is returned. * pdTRUE is returned. Otherwise pdFALSE is returned.
*/ */
#define xMessageBufferIsFull( xMessageBuffer ) xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer ) #define xMessageBufferIsFull( xMessageBuffer ) \
xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
/** /**
* message_buffer.h * message_buffer.h
<pre> * <pre>
BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) ); * BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
</pre> * </pre>
* *
* Tests to see if a message buffer is empty (does not contain any messages). * Tests to see if a message buffer is empty (does not contain any messages).
* *
@ -650,13 +659,14 @@ BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
* pdTRUE is returned. Otherwise pdFALSE is returned. * pdTRUE is returned. Otherwise pdFALSE is returned.
* *
*/ */
#define xMessageBufferIsEmpty( xMessageBuffer ) xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer ) #define xMessageBufferIsEmpty( xMessageBuffer ) \
xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
/** /**
* message_buffer.h * message_buffer.h
<pre> * <pre>
BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer ); * BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
</pre> * </pre>
* *
* Resets a message buffer to its initial empty state, discarding any message it * Resets a message buffer to its initial empty state, discarding any message it
* contained. * contained.
@ -673,14 +683,15 @@ BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
* \defgroup xMessageBufferReset xMessageBufferReset * \defgroup xMessageBufferReset xMessageBufferReset
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferReset( xMessageBuffer ) xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer ) #define xMessageBufferReset( xMessageBuffer ) \
xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
/** /**
* message_buffer.h * message_buffer.h
<pre> * <pre>
size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) ); * size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
</pre> * </pre>
* Returns the number of bytes of free space in the message buffer. * Returns the number of bytes of free space in the message buffer.
* *
* @param xMessageBuffer The handle of the message buffer being queried. * @param xMessageBuffer The handle of the message buffer being queried.
@ -695,14 +706,16 @@ size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
* \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferSpaceAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) #define xMessageBufferSpaceAvailable( xMessageBuffer ) \
#define xMessageBufferSpacesAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */ xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
#define xMessageBufferSpacesAvailable( xMessageBuffer ) \
xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
/** /**
* message_buffer.h * message_buffer.h
<pre> * <pre>
size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) ); * size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
</pre> * </pre>
* Returns the length (in bytes) of the next message in a message buffer. * Returns the length (in bytes) of the next message in a message buffer.
* Useful if xMessageBufferReceive() returned 0 because the size of the buffer * Useful if xMessageBufferReceive() returned 0 because the size of the buffer
* passed into xMessageBufferReceive() was too small to hold the next message. * passed into xMessageBufferReceive() was too small to hold the next message.
@ -715,14 +728,15 @@ size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
* \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
* \ingroup MessageBufferManagement * \ingroup MessageBufferManagement
*/ */
#define xMessageBufferNextLengthBytes( xMessageBuffer ) xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION; #define xMessageBufferNextLengthBytes( xMessageBuffer ) \
xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); * BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
</pre> * </pre>
* *
* For advanced users only. * For advanced users only.
* *
@ -754,14 +768,15 @@ BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuff
* \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken ) #define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); * BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
</pre> * </pre>
* *
* For advanced users only. * For advanced users only.
* *
@ -794,10 +809,13 @@ BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamB
* \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken ) #define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) \
xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
/* *INDENT-OFF* */
#if defined( __cplusplus ) #if defined( __cplusplus )
} /* extern "C" */ } /* extern "C" */
#endif #endif
/* *INDENT-ON* */
#endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */ #endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/* /*
@ -38,19 +37,38 @@
#define MPU_PROTOTYPES_H #define MPU_PROTOTYPES_H
/* MPU versions of tasks.h API functions. */ /* MPU versions of tasks.h API functions. */
BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode,
TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL; const char * const pcName,
BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL; const uint16_t usStackDepth,
BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL; void * const pvParameters,
void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) FREERTOS_SYSTEM_CALL; UBaseType_t uxPriority,
TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode,
const char * const pcName,
const uint32_t ulStackDepth,
void * const pvParameters,
UBaseType_t uxPriority,
StackType_t * const puxStackBuffer,
StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition,
TaskHandle_t * pxCreatedTask ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition,
TaskHandle_t * pxCreatedTask ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask,
const MemoryRegion_t * const pxRegions ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL; void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL; void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskDelayUntil( TickType_t * const pxPreviousWakeTime,
const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) FREERTOS_SYSTEM_CALL; void MPU_vTaskGetInfo( TaskHandle_t xTask,
void MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL; TaskStatus_t * pxTaskStatus,
BaseType_t xGetFreeStackSpace,
eTaskState eState ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskPrioritySet( TaskHandle_t xTask,
UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL; void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL; void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL; void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL;
@ -59,90 +77,169 @@ BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL; TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL; char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) FREERTOS_SYSTEM_CALL; TaskHandle_t MPU_xTaskGetHandle( const char * pcNameToQuery ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL; void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask,
TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) FREERTOS_SYSTEM_CALL; void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet,
void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) FREERTOS_SYSTEM_CALL; BaseType_t xIndex,
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) FREERTOS_SYSTEM_CALL; void * pvValue ) FREERTOS_SYSTEM_CALL;
void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery,
BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask,
void * pvParameter ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL; TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray,
const UBaseType_t uxArraySize,
uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL; uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL; void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) FREERTOS_SYSTEM_CALL; void MPU_vTaskGetRunTimeStats( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify,
BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; UBaseType_t uxIndexToNotify,
uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; uint32_t ulValue,
BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL; eNotifyAction eAction,
uint32_t MPU_ulTaskNotifyValueClear( TaskHandle_t xTask, uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL; uint32_t * pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskGenericNotifyWait( UBaseType_t uxIndexToWaitOn,
uint32_t ulBitsToClearOnEntry,
uint32_t ulBitsToClearOnExit,
uint32_t * pulNotificationValue,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
uint32_t MPU_ulTaskGenericNotifyTake( UBaseType_t uxIndexToWaitOn,
BaseType_t xClearCountOnExit,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskGenericNotifyStateClear( TaskHandle_t xTask,
UBaseType_t uxIndexToClear ) FREERTOS_SYSTEM_CALL;
uint32_t MPU_ulTaskGenericNotifyValueClear( TaskHandle_t xTask,
UBaseType_t uxIndexToClear,
uint32_t ulBitsToClear ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL; TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL; void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut,
TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL; void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
/* MPU versions of queue.h API functions. */ /* MPU versions of queue.h API functions. */
BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue,
BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; const void * const pvItemToQueue,
BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; TickType_t xTicksToWait,
BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue,
void * const pvBuffer,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue,
void * const pvBuffer,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL; QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL; QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType,
QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL; StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL; QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount,
const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount,
const UBaseType_t uxInitialCount,
StaticQueue_t * pxStaticQueue ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL; TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) FREERTOS_SYSTEM_CALL; void MPU_vQueueAddToRegistry( QueueHandle_t xQueue,
const char * pcName ) FREERTOS_SYSTEM_CALL;
void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL; QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength,
QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL; const UBaseType_t uxItemSize,
const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength,
const UBaseType_t uxItemSize,
uint8_t * pucQueueStorage,
StaticQueue_t * pxStaticQueue,
const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL; QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore,
BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL; QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore,
BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL; QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL; QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet,
const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue,
BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue,
UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL; uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
/* MPU versions of timers.h API functions. */ /* MPU versions of timers.h API functions. */
TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL; TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName,
TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) FREERTOS_SYSTEM_CALL; const TickType_t xTimerPeriodInTicks,
const UBaseType_t uxAutoReload,
void * const pvTimerID,
TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName,
const TickType_t xTimerPeriodInTicks,
const UBaseType_t uxAutoReload,
void * const pvTimerID,
TimerCallbackFunction_t pxCallbackFunction,
StaticTimer_t * pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) FREERTOS_SYSTEM_CALL; void MPU_vTimerSetTimerID( TimerHandle_t xTimer,
void * pvNewID ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL; TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
void * pvParameter1,
uint32_t ulParameter2,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL; void MPU_vTimerSetReloadMode( TimerHandle_t xTimer,
const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxTimerGetReloadMode( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL; TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer,
const BaseType_t xCommandID,
const TickType_t xOptionalValue,
BaseType_t * const pxHigherPriorityTaskWoken,
const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
/* MPU versions of event_group.h API functions. */ /* MPU versions of event_group.h API functions. */
EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL; EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL; EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t * pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup,
EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL; const EventBits_t uxBitsToWaitFor,
EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL; const BaseType_t xClearOnExit,
EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; const BaseType_t xWaitForAllBits,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup,
const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup,
const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup,
const EventBits_t uxBitsToSet,
const EventBits_t uxBitsToWaitFor,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL; void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
UBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup ) FREERTOS_SYSTEM_CALL; UBaseType_t MPU_uxEventGroupGetNumber( void * xEventGroup ) FREERTOS_SYSTEM_CALL;
/* MPU versions of message/stream_buffer.h API functions. */ /* MPU versions of message/stream_buffer.h API functions. */
size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL; const void * pvTxData,
size_t xDataLengthBytes,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
void * pvRxData,
size_t xBufferLengthBytes,
TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
@ -150,11 +247,17 @@ BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERT
BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL; size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL; BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL; size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL; StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes,
size_t xTriggerLevelBytes,
BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
size_t xTriggerLevelBytes,
BaseType_t xIsMessageBuffer,
uint8_t * const pucStreamBufferStorageArea,
StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
#endif /* MPU_PROTOTYPES_H */ #endif /* MPU_PROTOTYPES_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,171 +19,169 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef MPU_WRAPPERS_H #ifndef MPU_WRAPPERS_H
#define MPU_WRAPPERS_H #define MPU_WRAPPERS_H
/* This file redefines API functions to be called through a wrapper macro, but /* This file redefines API functions to be called through a wrapper macro, but
only for ports that are using the MPU. */ * only for ports that are using the MPU. */
#ifdef portUSING_MPU_WRAPPERS #ifdef portUSING_MPU_WRAPPERS
/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
included from queue.c or task.c to prevent it from having an effect within * included from queue.c or task.c to prevent it from having an effect within
those files. */ * those files. */
#ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
/* /*
* Map standard (non MPU) API functions to equivalents that start * Map standard (non MPU) API functions to equivalents that start
* "MPU_". This will cause the application code to call the MPU_ * "MPU_". This will cause the application code to call the MPU_
* version, which wraps the non-MPU version with privilege promoting * version, which wraps the non-MPU version with privilege promoting
* then demoting code, so the kernel code always runs will full * then demoting code, so the kernel code always runs will full
* privileges. * privileges.
*/ */
/* Map standard tasks.h API functions to the MPU equivalents. */ /* Map standard tasks.h API functions to the MPU equivalents. */
#define xTaskCreate MPU_xTaskCreate #define xTaskCreate MPU_xTaskCreate
#define xTaskCreateStatic MPU_xTaskCreateStatic #define xTaskCreateStatic MPU_xTaskCreateStatic
#define xTaskCreateRestricted MPU_xTaskCreateRestricted #define xTaskCreateRestricted MPU_xTaskCreateRestricted
#define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions #define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions
#define vTaskDelete MPU_vTaskDelete #define vTaskDelete MPU_vTaskDelete
#define vTaskDelay MPU_vTaskDelay #define vTaskDelay MPU_vTaskDelay
#define vTaskDelayUntil MPU_vTaskDelayUntil #define xTaskDelayUntil MPU_xTaskDelayUntil
#define xTaskAbortDelay MPU_xTaskAbortDelay #define xTaskAbortDelay MPU_xTaskAbortDelay
#define uxTaskPriorityGet MPU_uxTaskPriorityGet #define uxTaskPriorityGet MPU_uxTaskPriorityGet
#define eTaskGetState MPU_eTaskGetState #define eTaskGetState MPU_eTaskGetState
#define vTaskGetInfo MPU_vTaskGetInfo #define vTaskGetInfo MPU_vTaskGetInfo
#define vTaskPrioritySet MPU_vTaskPrioritySet #define vTaskPrioritySet MPU_vTaskPrioritySet
#define vTaskSuspend MPU_vTaskSuspend #define vTaskSuspend MPU_vTaskSuspend
#define vTaskResume MPU_vTaskResume #define vTaskResume MPU_vTaskResume
#define vTaskSuspendAll MPU_vTaskSuspendAll #define vTaskSuspendAll MPU_vTaskSuspendAll
#define xTaskResumeAll MPU_xTaskResumeAll #define xTaskResumeAll MPU_xTaskResumeAll
#define xTaskGetTickCount MPU_xTaskGetTickCount #define xTaskGetTickCount MPU_xTaskGetTickCount
#define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks #define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks
#define pcTaskGetName MPU_pcTaskGetName #define pcTaskGetName MPU_pcTaskGetName
#define xTaskGetHandle MPU_xTaskGetHandle #define xTaskGetHandle MPU_xTaskGetHandle
#define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark #define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark
#define uxTaskGetStackHighWaterMark2 MPU_uxTaskGetStackHighWaterMark2 #define uxTaskGetStackHighWaterMark2 MPU_uxTaskGetStackHighWaterMark2
#define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag #define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag
#define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag #define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag
#define vTaskSetThreadLocalStoragePointer MPU_vTaskSetThreadLocalStoragePointer #define vTaskSetThreadLocalStoragePointer MPU_vTaskSetThreadLocalStoragePointer
#define pvTaskGetThreadLocalStoragePointer MPU_pvTaskGetThreadLocalStoragePointer #define pvTaskGetThreadLocalStoragePointer MPU_pvTaskGetThreadLocalStoragePointer
#define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook #define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook
#define xTaskGetIdleTaskHandle MPU_xTaskGetIdleTaskHandle #define xTaskGetIdleTaskHandle MPU_xTaskGetIdleTaskHandle
#define uxTaskGetSystemState MPU_uxTaskGetSystemState #define uxTaskGetSystemState MPU_uxTaskGetSystemState
#define vTaskList MPU_vTaskList #define vTaskList MPU_vTaskList
#define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats #define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats
#define ulTaskGetIdleRunTimeCounter MPU_ulTaskGetIdleRunTimeCounter #define ulTaskGetIdleRunTimeCounter MPU_ulTaskGetIdleRunTimeCounter
#define xTaskGenericNotify MPU_xTaskGenericNotify #define xTaskGenericNotify MPU_xTaskGenericNotify
#define xTaskNotifyWait MPU_xTaskNotifyWait #define xTaskGenericNotifyWait MPU_xTaskGenericNotifyWait
#define ulTaskNotifyTake MPU_ulTaskNotifyTake #define ulTaskGenericNotifyTake MPU_ulTaskGenericNotifyTake
#define xTaskNotifyStateClear MPU_xTaskNotifyStateClear #define xTaskGenericNotifyStateClear MPU_xTaskGenericNotifyStateClear
#define ulTaskNotifyValueClear MPU_ulTaskNotifyValueClear #define ulTaskGenericNotifyValueClear MPU_ulTaskGenericNotifyValueClear
#define xTaskCatchUpTicks MPU_xTaskCatchUpTicks #define xTaskCatchUpTicks MPU_xTaskCatchUpTicks
#define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle #define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle
#define vTaskSetTimeOutState MPU_vTaskSetTimeOutState #define vTaskSetTimeOutState MPU_vTaskSetTimeOutState
#define xTaskCheckForTimeOut MPU_xTaskCheckForTimeOut #define xTaskCheckForTimeOut MPU_xTaskCheckForTimeOut
#define xTaskGetSchedulerState MPU_xTaskGetSchedulerState #define xTaskGetSchedulerState MPU_xTaskGetSchedulerState
/* Map standard queue.h API functions to the MPU equivalents. */ /* Map standard queue.h API functions to the MPU equivalents. */
#define xQueueGenericSend MPU_xQueueGenericSend #define xQueueGenericSend MPU_xQueueGenericSend
#define xQueueReceive MPU_xQueueReceive #define xQueueReceive MPU_xQueueReceive
#define xQueuePeek MPU_xQueuePeek #define xQueuePeek MPU_xQueuePeek
#define xQueueSemaphoreTake MPU_xQueueSemaphoreTake #define xQueueSemaphoreTake MPU_xQueueSemaphoreTake
#define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting #define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting
#define uxQueueSpacesAvailable MPU_uxQueueSpacesAvailable #define uxQueueSpacesAvailable MPU_uxQueueSpacesAvailable
#define vQueueDelete MPU_vQueueDelete #define vQueueDelete MPU_vQueueDelete
#define xQueueCreateMutex MPU_xQueueCreateMutex #define xQueueCreateMutex MPU_xQueueCreateMutex
#define xQueueCreateMutexStatic MPU_xQueueCreateMutexStatic #define xQueueCreateMutexStatic MPU_xQueueCreateMutexStatic
#define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore #define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore
#define xQueueCreateCountingSemaphoreStatic MPU_xQueueCreateCountingSemaphoreStatic #define xQueueCreateCountingSemaphoreStatic MPU_xQueueCreateCountingSemaphoreStatic
#define xQueueGetMutexHolder MPU_xQueueGetMutexHolder #define xQueueGetMutexHolder MPU_xQueueGetMutexHolder
#define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive #define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive
#define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive #define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive
#define xQueueGenericCreate MPU_xQueueGenericCreate #define xQueueGenericCreate MPU_xQueueGenericCreate
#define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic #define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic
#define xQueueCreateSet MPU_xQueueCreateSet #define xQueueCreateSet MPU_xQueueCreateSet
#define xQueueAddToSet MPU_xQueueAddToSet #define xQueueAddToSet MPU_xQueueAddToSet
#define xQueueRemoveFromSet MPU_xQueueRemoveFromSet #define xQueueRemoveFromSet MPU_xQueueRemoveFromSet
#define xQueueSelectFromSet MPU_xQueueSelectFromSet #define xQueueSelectFromSet MPU_xQueueSelectFromSet
#define xQueueGenericReset MPU_xQueueGenericReset #define xQueueGenericReset MPU_xQueueGenericReset
#if( configQUEUE_REGISTRY_SIZE > 0 ) #if ( configQUEUE_REGISTRY_SIZE > 0 )
#define vQueueAddToRegistry MPU_vQueueAddToRegistry #define vQueueAddToRegistry MPU_vQueueAddToRegistry
#define vQueueUnregisterQueue MPU_vQueueUnregisterQueue #define vQueueUnregisterQueue MPU_vQueueUnregisterQueue
#define pcQueueGetName MPU_pcQueueGetName #define pcQueueGetName MPU_pcQueueGetName
#endif #endif
/* Map standard timer.h API functions to the MPU equivalents. */ /* Map standard timer.h API functions to the MPU equivalents. */
#define xTimerCreate MPU_xTimerCreate #define xTimerCreate MPU_xTimerCreate
#define xTimerCreateStatic MPU_xTimerCreateStatic #define xTimerCreateStatic MPU_xTimerCreateStatic
#define pvTimerGetTimerID MPU_pvTimerGetTimerID #define pvTimerGetTimerID MPU_pvTimerGetTimerID
#define vTimerSetTimerID MPU_vTimerSetTimerID #define vTimerSetTimerID MPU_vTimerSetTimerID
#define xTimerIsTimerActive MPU_xTimerIsTimerActive #define xTimerIsTimerActive MPU_xTimerIsTimerActive
#define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle #define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle
#define xTimerPendFunctionCall MPU_xTimerPendFunctionCall #define xTimerPendFunctionCall MPU_xTimerPendFunctionCall
#define pcTimerGetName MPU_pcTimerGetName #define pcTimerGetName MPU_pcTimerGetName
#define vTimerSetReloadMode MPU_vTimerSetReloadMode #define vTimerSetReloadMode MPU_vTimerSetReloadMode
#define uxTimerGetReloadMode MPU_uxTimerGetReloadMode #define uxTimerGetReloadMode MPU_uxTimerGetReloadMode
#define xTimerGetPeriod MPU_xTimerGetPeriod #define xTimerGetPeriod MPU_xTimerGetPeriod
#define xTimerGetExpiryTime MPU_xTimerGetExpiryTime #define xTimerGetExpiryTime MPU_xTimerGetExpiryTime
#define xTimerGenericCommand MPU_xTimerGenericCommand #define xTimerGenericCommand MPU_xTimerGenericCommand
/* Map standard event_group.h API functions to the MPU equivalents. */ /* Map standard event_group.h API functions to the MPU equivalents. */
#define xEventGroupCreate MPU_xEventGroupCreate #define xEventGroupCreate MPU_xEventGroupCreate
#define xEventGroupCreateStatic MPU_xEventGroupCreateStatic #define xEventGroupCreateStatic MPU_xEventGroupCreateStatic
#define xEventGroupWaitBits MPU_xEventGroupWaitBits #define xEventGroupWaitBits MPU_xEventGroupWaitBits
#define xEventGroupClearBits MPU_xEventGroupClearBits #define xEventGroupClearBits MPU_xEventGroupClearBits
#define xEventGroupSetBits MPU_xEventGroupSetBits #define xEventGroupSetBits MPU_xEventGroupSetBits
#define xEventGroupSync MPU_xEventGroupSync #define xEventGroupSync MPU_xEventGroupSync
#define vEventGroupDelete MPU_vEventGroupDelete #define vEventGroupDelete MPU_vEventGroupDelete
/* Map standard message/stream_buffer.h API functions to the MPU /* Map standard message/stream_buffer.h API functions to the MPU
equivalents. */ * equivalents. */
#define xStreamBufferSend MPU_xStreamBufferSend #define xStreamBufferSend MPU_xStreamBufferSend
#define xStreamBufferReceive MPU_xStreamBufferReceive #define xStreamBufferReceive MPU_xStreamBufferReceive
#define xStreamBufferNextMessageLengthBytes MPU_xStreamBufferNextMessageLengthBytes #define xStreamBufferNextMessageLengthBytes MPU_xStreamBufferNextMessageLengthBytes
#define vStreamBufferDelete MPU_vStreamBufferDelete #define vStreamBufferDelete MPU_vStreamBufferDelete
#define xStreamBufferIsFull MPU_xStreamBufferIsFull #define xStreamBufferIsFull MPU_xStreamBufferIsFull
#define xStreamBufferIsEmpty MPU_xStreamBufferIsEmpty #define xStreamBufferIsEmpty MPU_xStreamBufferIsEmpty
#define xStreamBufferReset MPU_xStreamBufferReset #define xStreamBufferReset MPU_xStreamBufferReset
#define xStreamBufferSpacesAvailable MPU_xStreamBufferSpacesAvailable #define xStreamBufferSpacesAvailable MPU_xStreamBufferSpacesAvailable
#define xStreamBufferBytesAvailable MPU_xStreamBufferBytesAvailable #define xStreamBufferBytesAvailable MPU_xStreamBufferBytesAvailable
#define xStreamBufferSetTriggerLevel MPU_xStreamBufferSetTriggerLevel #define xStreamBufferSetTriggerLevel MPU_xStreamBufferSetTriggerLevel
#define xStreamBufferGenericCreate MPU_xStreamBufferGenericCreate #define xStreamBufferGenericCreate MPU_xStreamBufferGenericCreate
#define xStreamBufferGenericCreateStatic MPU_xStreamBufferGenericCreateStatic #define xStreamBufferGenericCreateStatic MPU_xStreamBufferGenericCreateStatic
/* Remove the privileged function macro, but keep the PRIVILEGED_DATA /* Remove the privileged function macro, but keep the PRIVILEGED_DATA
macro so applications can place data in privileged access sections * macro so applications can place data in privileged access sections
(useful when using statically allocated objects). */ * (useful when using statically allocated objects). */
#define PRIVILEGED_FUNCTION #define PRIVILEGED_FUNCTION
#define PRIVILEGED_DATA __attribute__((section("privileged_data"))) #define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) )
#define FREERTOS_SYSTEM_CALL #define FREERTOS_SYSTEM_CALL
#else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
/* Ensure API functions go in the privileged execution section. */ /* Ensure API functions go in the privileged execution section. */
#define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions"))) #define PRIVILEGED_FUNCTION __attribute__( ( section( "privileged_functions" ) ) )
#define PRIVILEGED_DATA __attribute__((section("privileged_data"))) #define PRIVILEGED_DATA __attribute__( ( section( "privileged_data" ) ) )
#define FREERTOS_SYSTEM_CALL __attribute__((section( "freertos_system_calls"))) #define FREERTOS_SYSTEM_CALL __attribute__( ( section( "freertos_system_calls" ) ) )
#endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
#else /* portUSING_MPU_WRAPPERS */ #else /* portUSING_MPU_WRAPPERS */
#define PRIVILEGED_FUNCTION #define PRIVILEGED_FUNCTION
#define PRIVILEGED_DATA #define PRIVILEGED_DATA
#define FREERTOS_SYSTEM_CALL #define FREERTOS_SYSTEM_CALL
#define portUSING_MPU_WRAPPERS 0 #define portUSING_MPU_WRAPPERS 0
#endif /* portUSING_MPU_WRAPPERS */ #endif /* portUSING_MPU_WRAPPERS */
#endif /* MPU_WRAPPERS_H */ #endif /* MPU_WRAPPERS_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,82 +19,83 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Portable layer API. Each function must be defined for each port. * Portable layer API. Each function must be defined for each port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
#ifndef PORTABLE_H #ifndef PORTABLE_H
#define PORTABLE_H #define PORTABLE_H
/* Each FreeRTOS port has a unique portmacro.h header file. Originally a /* Each FreeRTOS port has a unique portmacro.h header file. Originally a
pre-processor definition was used to ensure the pre-processor found the correct * pre-processor definition was used to ensure the pre-processor found the correct
portmacro.h file for the port being used. That scheme was deprecated in favour * portmacro.h file for the port being used. That scheme was deprecated in favour
of setting the compiler's include path such that it found the correct * of setting the compiler's include path such that it found the correct
portmacro.h file - removing the need for the constant and allowing the * portmacro.h file - removing the need for the constant and allowing the
portmacro.h file to be located anywhere in relation to the port being used. * portmacro.h file to be located anywhere in relation to the port being used.
Purely for reasons of backward compatibility the old method is still valid, but * Purely for reasons of backward compatibility the old method is still valid, but
to make it clear that new projects should not use it, support for the port * to make it clear that new projects should not use it, support for the port
specific constants has been moved into the deprecated_definitions.h header * specific constants has been moved into the deprecated_definitions.h header
file. */ * file. */
#include "deprecated_definitions.h" #include "deprecated_definitions.h"
/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h /* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
did not result in a portmacro.h header file being included - and it should be * did not result in a portmacro.h header file being included - and it should be
included here. In this case the path to the correct portmacro.h header file * included here. In this case the path to the correct portmacro.h header file
must be set in the compiler's include path. */ * must be set in the compiler's include path. */
#ifndef portENTER_CRITICAL #ifndef portENTER_CRITICAL
#include "portmacro.h" #include "portmacro.h"
#endif #endif
#if portBYTE_ALIGNMENT == 32 #if portBYTE_ALIGNMENT == 32
#define portBYTE_ALIGNMENT_MASK ( 0x001f ) #define portBYTE_ALIGNMENT_MASK ( 0x001f )
#endif #endif
#if portBYTE_ALIGNMENT == 16 #if portBYTE_ALIGNMENT == 16
#define portBYTE_ALIGNMENT_MASK ( 0x000f ) #define portBYTE_ALIGNMENT_MASK ( 0x000f )
#endif #endif
#if portBYTE_ALIGNMENT == 8 #if portBYTE_ALIGNMENT == 8
#define portBYTE_ALIGNMENT_MASK ( 0x0007 ) #define portBYTE_ALIGNMENT_MASK ( 0x0007 )
#endif #endif
#if portBYTE_ALIGNMENT == 4 #if portBYTE_ALIGNMENT == 4
#define portBYTE_ALIGNMENT_MASK ( 0x0003 ) #define portBYTE_ALIGNMENT_MASK ( 0x0003 )
#endif #endif
#if portBYTE_ALIGNMENT == 2 #if portBYTE_ALIGNMENT == 2
#define portBYTE_ALIGNMENT_MASK ( 0x0001 ) #define portBYTE_ALIGNMENT_MASK ( 0x0001 )
#endif #endif
#if portBYTE_ALIGNMENT == 1 #if portBYTE_ALIGNMENT == 1
#define portBYTE_ALIGNMENT_MASK ( 0x0000 ) #define portBYTE_ALIGNMENT_MASK ( 0x0000 )
#endif #endif
#ifndef portBYTE_ALIGNMENT_MASK #ifndef portBYTE_ALIGNMENT_MASK
#error "Invalid portBYTE_ALIGNMENT definition" #error "Invalid portBYTE_ALIGNMENT definition"
#endif #endif
#ifndef portNUM_CONFIGURABLE_REGIONS #ifndef portNUM_CONFIGURABLE_REGIONS
#define portNUM_CONFIGURABLE_REGIONS 1 #define portNUM_CONFIGURABLE_REGIONS 1
#endif #endif
#ifndef portHAS_STACK_OVERFLOW_CHECKING #ifndef portHAS_STACK_OVERFLOW_CHECKING
#define portHAS_STACK_OVERFLOW_CHECKING 0 #define portHAS_STACK_OVERFLOW_CHECKING 0
#endif #endif
#ifndef portARCH_NAME #ifndef portARCH_NAME
#define portARCH_NAME NULL #define portARCH_NAME NULL
#endif #endif
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
#include "mpu_wrappers.h" #include "mpu_wrappers.h"
@ -104,38 +105,50 @@ extern "C" {
* the order that the port expects to find them. * the order that the port expects to find them.
* *
*/ */
#if( portUSING_MPU_WRAPPERS == 1 ) #if ( portUSING_MPU_WRAPPERS == 1 )
#if( portHAS_STACK_OVERFLOW_CHECKING == 1 ) #if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION; StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
#else StackType_t * pxEndOfStack,
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION; TaskFunction_t pxCode,
#endif void * pvParameters,
#else BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
#if( portHAS_STACK_OVERFLOW_CHECKING == 1 ) #else
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION; StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
#else TaskFunction_t pxCode,
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION; void * pvParameters,
#endif BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
#endif #endif
#else /* if ( portUSING_MPU_WRAPPERS == 1 ) */
#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
StackType_t * pxEndOfStack,
TaskFunction_t pxCode,
void * pvParameters ) PRIVILEGED_FUNCTION;
#else
StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters ) PRIVILEGED_FUNCTION;
#endif
#endif /* if ( portUSING_MPU_WRAPPERS == 1 ) */
/* Used by heap_5.c to define the start address and size of each memory region /* Used by heap_5.c to define the start address and size of each memory region
that together comprise the total FreeRTOS heap space. */ * that together comprise the total FreeRTOS heap space. */
typedef struct HeapRegion typedef struct HeapRegion
{ {
uint8_t *pucStartAddress; uint8_t * pucStartAddress;
size_t xSizeInBytes; size_t xSizeInBytes;
} HeapRegion_t; } HeapRegion_t;
/* Used to pass information about the heap out of vPortGetHeapStats(). */ /* Used to pass information about the heap out of vPortGetHeapStats(). */
typedef struct xHeapStats typedef struct xHeapStats
{ {
size_t xAvailableHeapSpaceInBytes; /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */ size_t xAvailableHeapSpaceInBytes; /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
size_t xSizeOfLargestFreeBlockInBytes; /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */ size_t xSizeOfLargestFreeBlockInBytes; /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */ size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
size_t xNumberOfFreeBlocks; /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */ size_t xNumberOfFreeBlocks; /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
size_t xMinimumEverFreeBytesRemaining; /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */ size_t xMinimumEverFreeBytesRemaining; /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
size_t xNumberOfSuccessfulAllocations; /* The number of calls to pvPortMalloc() that have returned a valid memory block. */ size_t xNumberOfSuccessfulAllocations; /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
size_t xNumberOfSuccessfulFrees; /* The number of calls to vPortFree() that has successfully freed a block of memory. */ size_t xNumberOfSuccessfulFrees; /* The number of calls to vPortFree() that has successfully freed a block of memory. */
} HeapStats_t; } HeapStats_t;
/* /*
@ -155,13 +168,13 @@ void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEG
* Returns a HeapStats_t structure filled with information about the current * Returns a HeapStats_t structure filled with information about the current
* heap state. * heap state.
*/ */
void vPortGetHeapStats( HeapStats_t *pxHeapStats ); void vPortGetHeapStats( HeapStats_t * pxHeapStats );
/* /*
* Map to the memory management routines required for the port. * Map to the memory management routines required for the port.
*/ */
void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION; void * pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
void vPortFree( void *pv ) PRIVILEGED_FUNCTION; void vPortFree( void * pv ) PRIVILEGED_FUNCTION;
void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION; void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION; size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION; size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
@ -186,14 +199,18 @@ void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
* Fills the xMPUSettings structure with the memory region information * Fills the xMPUSettings structure with the memory region information
* contained in xRegions. * contained in xRegions.
*/ */
#if( portUSING_MPU_WRAPPERS == 1 ) #if ( portUSING_MPU_WRAPPERS == 1 )
struct xMEMORY_REGION; struct xMEMORY_REGION;
void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION; void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
const struct xMEMORY_REGION * const xRegions,
StackType_t * pxBottomOfStack,
uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
#endif #endif
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTABLE_H */ #endif /* PORTABLE_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef PROJDEFS_H #ifndef PROJDEFS_H
@ -32,93 +31,90 @@
* Defines the prototype to which task functions must conform. Defined in this * Defines the prototype to which task functions must conform. Defined in this
* file to ensure the type is known before portable.h is included. * file to ensure the type is known before portable.h is included.
*/ */
typedef void (*TaskFunction_t)( void * ); typedef void (* TaskFunction_t)( void * );
/* Converts a time in milliseconds to a time in ticks. This macro can be /* Converts a time in milliseconds to a time in ticks. This macro can be
overridden by a macro of the same name defined in FreeRTOSConfig.h in case the * overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
definition here is not suitable for your application. */ * definition here is not suitable for your application. */
#ifndef pdMS_TO_TICKS #ifndef pdMS_TO_TICKS
#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) ) #define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000U ) )
#endif #endif
#define pdFALSE ( ( BaseType_t ) 0 ) #define pdFALSE ( ( BaseType_t ) 0 )
#define pdTRUE ( ( BaseType_t ) 1 ) #define pdTRUE ( ( BaseType_t ) 1 )
#define pdPASS ( pdTRUE ) #define pdPASS ( pdTRUE )
#define pdFAIL ( pdFALSE ) #define pdFAIL ( pdFALSE )
#define errQUEUE_EMPTY ( ( BaseType_t ) 0 ) #define errQUEUE_EMPTY ( ( BaseType_t ) 0 )
#define errQUEUE_FULL ( ( BaseType_t ) 0 ) #define errQUEUE_FULL ( ( BaseType_t ) 0 )
/* FreeRTOS error definitions. */ /* FreeRTOS error definitions. */
#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) #define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 )
#define errQUEUE_BLOCKED ( -4 ) #define errQUEUE_BLOCKED ( -4 )
#define errQUEUE_YIELD ( -5 ) #define errQUEUE_YIELD ( -5 )
/* Macros used for basic data corruption checks. */ /* Macros used for basic data corruption checks. */
#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES #ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
#define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0 #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0
#endif #endif
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
#define pdINTEGRITY_CHECK_VALUE 0x5a5a #define pdINTEGRITY_CHECK_VALUE 0x5a5a
#else #else
#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL #define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
#endif #endif
/* The following errno values are used by FreeRTOS+ components, not FreeRTOS /* The following errno values are used by FreeRTOS+ components, not FreeRTOS
itself. */ * itself. */
#define pdFREERTOS_ERRNO_NONE 0 /* No errors */ #define pdFREERTOS_ERRNO_NONE 0 /* No errors */
#define pdFREERTOS_ERRNO_ENOENT 2 /* No such file or directory */ #define pdFREERTOS_ERRNO_ENOENT 2 /* No such file or directory */
#define pdFREERTOS_ERRNO_EINTR 4 /* Interrupted system call */ #define pdFREERTOS_ERRNO_EINTR 4 /* Interrupted system call */
#define pdFREERTOS_ERRNO_EIO 5 /* I/O error */ #define pdFREERTOS_ERRNO_EIO 5 /* I/O error */
#define pdFREERTOS_ERRNO_ENXIO 6 /* No such device or address */ #define pdFREERTOS_ERRNO_ENXIO 6 /* No such device or address */
#define pdFREERTOS_ERRNO_EBADF 9 /* Bad file number */ #define pdFREERTOS_ERRNO_EBADF 9 /* Bad file number */
#define pdFREERTOS_ERRNO_EAGAIN 11 /* No more processes */ #define pdFREERTOS_ERRNO_EAGAIN 11 /* No more processes */
#define pdFREERTOS_ERRNO_EWOULDBLOCK 11 /* Operation would block */ #define pdFREERTOS_ERRNO_EWOULDBLOCK 11 /* Operation would block */
#define pdFREERTOS_ERRNO_ENOMEM 12 /* Not enough memory */ #define pdFREERTOS_ERRNO_ENOMEM 12 /* Not enough memory */
#define pdFREERTOS_ERRNO_EACCES 13 /* Permission denied */ #define pdFREERTOS_ERRNO_EACCES 13 /* Permission denied */
#define pdFREERTOS_ERRNO_EFAULT 14 /* Bad address */ #define pdFREERTOS_ERRNO_EFAULT 14 /* Bad address */
#define pdFREERTOS_ERRNO_EBUSY 16 /* Mount device busy */ #define pdFREERTOS_ERRNO_EBUSY 16 /* Mount device busy */
#define pdFREERTOS_ERRNO_EEXIST 17 /* File exists */ #define pdFREERTOS_ERRNO_EEXIST 17 /* File exists */
#define pdFREERTOS_ERRNO_EXDEV 18 /* Cross-device link */ #define pdFREERTOS_ERRNO_EXDEV 18 /* Cross-device link */
#define pdFREERTOS_ERRNO_ENODEV 19 /* No such device */ #define pdFREERTOS_ERRNO_ENODEV 19 /* No such device */
#define pdFREERTOS_ERRNO_ENOTDIR 20 /* Not a directory */ #define pdFREERTOS_ERRNO_ENOTDIR 20 /* Not a directory */
#define pdFREERTOS_ERRNO_EISDIR 21 /* Is a directory */ #define pdFREERTOS_ERRNO_EISDIR 21 /* Is a directory */
#define pdFREERTOS_ERRNO_EINVAL 22 /* Invalid argument */ #define pdFREERTOS_ERRNO_EINVAL 22 /* Invalid argument */
#define pdFREERTOS_ERRNO_ENOSPC 28 /* No space left on device */ #define pdFREERTOS_ERRNO_ENOSPC 28 /* No space left on device */
#define pdFREERTOS_ERRNO_ESPIPE 29 /* Illegal seek */ #define pdFREERTOS_ERRNO_ESPIPE 29 /* Illegal seek */
#define pdFREERTOS_ERRNO_EROFS 30 /* Read only file system */ #define pdFREERTOS_ERRNO_EROFS 30 /* Read only file system */
#define pdFREERTOS_ERRNO_EUNATCH 42 /* Protocol driver not attached */ #define pdFREERTOS_ERRNO_EUNATCH 42 /* Protocol driver not attached */
#define pdFREERTOS_ERRNO_EBADE 50 /* Invalid exchange */ #define pdFREERTOS_ERRNO_EBADE 50 /* Invalid exchange */
#define pdFREERTOS_ERRNO_EFTYPE 79 /* Inappropriate file type or format */ #define pdFREERTOS_ERRNO_EFTYPE 79 /* Inappropriate file type or format */
#define pdFREERTOS_ERRNO_ENMFILE 89 /* No more files */ #define pdFREERTOS_ERRNO_ENMFILE 89 /* No more files */
#define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */ #define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */
#define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */ #define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */
#define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ #define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
#define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */ #define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */
#define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */ #define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */
#define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */ #define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */
#define pdFREERTOS_ERRNO_ETIMEDOUT 116 /* Connection timed out */ #define pdFREERTOS_ERRNO_ETIMEDOUT 116 /* Connection timed out */
#define pdFREERTOS_ERRNO_EINPROGRESS 119 /* Connection already in progress */ #define pdFREERTOS_ERRNO_EINPROGRESS 119 /* Connection already in progress */
#define pdFREERTOS_ERRNO_EALREADY 120 /* Socket already connected */ #define pdFREERTOS_ERRNO_EALREADY 120 /* Socket already connected */
#define pdFREERTOS_ERRNO_EADDRNOTAVAIL 125 /* Address not available */ #define pdFREERTOS_ERRNO_EADDRNOTAVAIL 125 /* Address not available */
#define pdFREERTOS_ERRNO_EISCONN 127 /* Socket is already connected */ #define pdFREERTOS_ERRNO_EISCONN 127 /* Socket is already connected */
#define pdFREERTOS_ERRNO_ENOTCONN 128 /* Socket is not connected */ #define pdFREERTOS_ERRNO_ENOTCONN 128 /* Socket is not connected */
#define pdFREERTOS_ERRNO_ENOMEDIUM 135 /* No medium inserted */ #define pdFREERTOS_ERRNO_ENOMEDIUM 135 /* No medium inserted */
#define pdFREERTOS_ERRNO_EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */ #define pdFREERTOS_ERRNO_EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */
#define pdFREERTOS_ERRNO_ECANCELED 140 /* Operation canceled. */ #define pdFREERTOS_ERRNO_ECANCELED 140 /* Operation canceled. */
/* The following endian values are used by FreeRTOS+ components, not FreeRTOS /* The following endian values are used by FreeRTOS+ components, not FreeRTOS
itself. */ * itself. */
#define pdFREERTOS_LITTLE_ENDIAN 0 #define pdFREERTOS_LITTLE_ENDIAN 0
#define pdFREERTOS_BIG_ENDIAN 1 #define pdFREERTOS_BIG_ENDIAN 1
/* Re-defining endian values for generic naming. */ /* Re-defining endian values for generic naming. */
#define pdLITTLE_ENDIAN pdFREERTOS_LITTLE_ENDIAN #define pdLITTLE_ENDIAN pdFREERTOS_LITTLE_ENDIAN
#define pdBIG_ENDIAN pdFREERTOS_BIG_ENDIAN #define pdBIG_ENDIAN pdFREERTOS_BIG_ENDIAN
#endif /* PROJDEFS_H */ #endif /* PROJDEFS_H */

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef STACK_MACROS_H #ifndef STACK_MACROS_H
@ -44,86 +43,85 @@
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) ) #if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
/* Only the current stack state is to be checked. */ /* Only the current stack state is to be checked. */
#define taskCHECK_FOR_STACK_OVERFLOW() \ #define taskCHECK_FOR_STACK_OVERFLOW() \
{ \ { \
/* Is the currently saved stack pointer within the stack limit? */ \ /* Is the currently saved stack pointer within the stack limit? */ \
if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \ if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \
{ \ { \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
} \ } \
} }
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) ) #if ( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
/* Only the current stack state is to be checked. */ /* Only the current stack state is to be checked. */
#define taskCHECK_FOR_STACK_OVERFLOW() \ #define taskCHECK_FOR_STACK_OVERFLOW() \
{ \ { \
\ \
/* Is the currently saved stack pointer within the stack limit? */ \ /* Is the currently saved stack pointer within the stack limit? */ \
if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \ if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \
{ \ { \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
} \ } \
} }
#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) #if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
#define taskCHECK_FOR_STACK_OVERFLOW() \ #define taskCHECK_FOR_STACK_OVERFLOW() \
{ \ { \
const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \
const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \
\ \
if( ( pulStack[ 0 ] != ulCheckValue ) || \ if( ( pulStack[ 0 ] != ulCheckValue ) || \
( pulStack[ 1 ] != ulCheckValue ) || \ ( pulStack[ 1 ] != ulCheckValue ) || \
( pulStack[ 2 ] != ulCheckValue ) || \ ( pulStack[ 2 ] != ulCheckValue ) || \
( pulStack[ 3 ] != ulCheckValue ) ) \ ( pulStack[ 3 ] != ulCheckValue ) ) \
{ \ { \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
} \ } \
} }
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) #if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
#define taskCHECK_FOR_STACK_OVERFLOW() \ #define taskCHECK_FOR_STACK_OVERFLOW() \
{ \ { \
int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ int8_t * pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \
static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
\ \
\ \
pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ pcEndOfStack -= sizeof( ucExpectedStackBytes ); \
\ \
/* Has the extremity of the task stack ever been written over? */ \ /* Has the extremity of the task stack ever been written over? */ \
if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
{ \ { \
vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
} \ } \
} }
#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Remove stack overflow macro if not being used. */ /* Remove stack overflow macro if not being used. */
#ifndef taskCHECK_FOR_STACK_OVERFLOW #ifndef taskCHECK_FOR_STACK_OVERFLOW
#define taskCHECK_FOR_STACK_OVERFLOW() #define taskCHECK_FOR_STACK_OVERFLOW()
#endif #endif
#endif /* STACK_MACROS_H */ #endif /* STACK_MACROS_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,10 +19,9 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/* /*
@ -52,12 +51,14 @@
#define STREAM_BUFFER_H #define STREAM_BUFFER_H
#ifndef INC_FREERTOS_H #ifndef INC_FREERTOS_H
#error "include FreeRTOS.h must appear in source files before include stream_buffer.h" #error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
#endif #endif
/* *INDENT-OFF* */
#if defined( __cplusplus ) #if defined( __cplusplus )
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/** /**
* Type by which stream buffers are referenced. For example, a call to * Type by which stream buffers are referenced. For example, a call to
@ -72,9 +73,9 @@ typedef struct StreamBufferDef_t * StreamBufferHandle_t;
/** /**
* message_buffer.h * message_buffer.h
* *
<pre> * <pre>
StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes ); * StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
</pre> * </pre>
* *
* Creates a new stream buffer using dynamically allocated memory. See * Creates a new stream buffer using dynamically allocated memory. See
* xStreamBufferCreateStatic() for a version that uses statically allocated * xStreamBufferCreateStatic() for a version that uses statically allocated
@ -108,43 +109,43 @@ StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTrigg
* buffer. * buffer.
* *
* Example use: * Example use:
<pre> * <pre>
*
void vAFunction( void ) * void vAFunction( void )
{ * {
StreamBufferHandle_t xStreamBuffer; * StreamBufferHandle_t xStreamBuffer;
const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10; * const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
*
// Create a stream buffer that can hold 100 bytes. The memory used to hold * // Create a stream buffer that can hold 100 bytes. The memory used to hold
// both the stream buffer structure and the data in the stream buffer is * // both the stream buffer structure and the data in the stream buffer is
// allocated dynamically. * // allocated dynamically.
xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel ); * xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
*
if( xStreamBuffer == NULL ) * if( xStreamBuffer == NULL )
{ * {
// There was not enough heap memory space available to create the * // There was not enough heap memory space available to create the
// stream buffer. * // stream buffer.
} * }
else * else
{ * {
// The stream buffer was created successfully and can now be used. * // The stream buffer was created successfully and can now be used.
} * }
} * }
</pre> * </pre>
* \defgroup xStreamBufferCreate xStreamBufferCreate * \defgroup xStreamBufferCreate xStreamBufferCreate
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE ) #define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes, * StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
size_t xTriggerLevelBytes, * size_t xTriggerLevelBytes,
uint8_t *pucStreamBufferStorageArea, * uint8_t *pucStreamBufferStorageArea,
StaticStreamBuffer_t *pxStaticStreamBuffer ); * StaticStreamBuffer_t *pxStaticStreamBuffer );
</pre> * </pre>
* Creates a new stream buffer using statically allocated memory. See * Creates a new stream buffer using statically allocated memory. See
* xStreamBufferCreate() for a version that uses dynamically allocated memory. * xStreamBufferCreate() for a version that uses dynamically allocated memory.
* *
@ -181,51 +182,52 @@ StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
* pxStaticstreamBuffer are NULL then NULL is returned. * pxStaticstreamBuffer are NULL then NULL is returned.
* *
* Example use: * Example use:
<pre> * <pre>
*
// Used to dimension the array used to hold the streams. The available space * // Used to dimension the array used to hold the streams. The available space
// will actually be one less than this, so 999. * // will actually be one less than this, so 999.
#define STORAGE_SIZE_BYTES 1000 #define STORAGE_SIZE_BYTES 1000
*
// Defines the memory that will actually hold the streams within the stream * // Defines the memory that will actually hold the streams within the stream
// buffer. * // buffer.
static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ]; * static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
*
// The variable used to hold the stream buffer structure. * // The variable used to hold the stream buffer structure.
StaticStreamBuffer_t xStreamBufferStruct; * StaticStreamBuffer_t xStreamBufferStruct;
*
void MyFunction( void ) * void MyFunction( void )
{ * {
StreamBufferHandle_t xStreamBuffer; * StreamBufferHandle_t xStreamBuffer;
const size_t xTriggerLevel = 1; * const size_t xTriggerLevel = 1;
*
xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ), * xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),
xTriggerLevel, * xTriggerLevel,
ucBufferStorage, * ucBufferStorage,
&xStreamBufferStruct ); * &xStreamBufferStruct );
*
// As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer * // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
// parameters were NULL, xStreamBuffer will not be NULL, and can be used to * // parameters were NULL, xStreamBuffer will not be NULL, and can be used to
// reference the created stream buffer in other stream buffer API calls. * // reference the created stream buffer in other stream buffer API calls.
*
// Other code that uses the stream buffer can go here. * // Other code that uses the stream buffer can go here.
} * }
*
</pre> * </pre>
* \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer ) #define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) \
xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, * size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
const void *pvTxData, * const void *pvTxData,
size_t xDataLengthBytes, * size_t xDataLengthBytes,
TickType_t xTicksToWait ); * TickType_t xTicksToWait );
</pre> * </pre>
* *
* Sends bytes to a stream buffer. The bytes are copied into the stream buffer. * Sends bytes to a stream buffer. The bytes are copied into the stream buffer.
* *
@ -275,54 +277,54 @@ size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
* write as many bytes as possible. * write as many bytes as possible.
* *
* Example use: * Example use:
<pre> * <pre>
void vAFunction( StreamBufferHandle_t xStreamBuffer ) * void vAFunction( StreamBufferHandle_t xStreamBuffer )
{ * {
size_t xBytesSent; * size_t xBytesSent;
uint8_t ucArrayToSend[] = { 0, 1, 2, 3 }; * uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
char *pcStringToSend = "String to send"; * char *pcStringToSend = "String to send";
const TickType_t x100ms = pdMS_TO_TICKS( 100 ); * const TickType_t x100ms = pdMS_TO_TICKS( 100 );
*
// Send an array to the stream buffer, blocking for a maximum of 100ms to * // Send an array to the stream buffer, blocking for a maximum of 100ms to
// wait for enough space to be available in the stream buffer. * // wait for enough space to be available in the stream buffer.
xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms ); * xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
*
if( xBytesSent != sizeof( ucArrayToSend ) ) * if( xBytesSent != sizeof( ucArrayToSend ) )
{ * {
// The call to xStreamBufferSend() times out before there was enough * // The call to xStreamBufferSend() times out before there was enough
// space in the buffer for the data to be written, but it did * // space in the buffer for the data to be written, but it did
// successfully write xBytesSent bytes. * // successfully write xBytesSent bytes.
} * }
*
// Send the string to the stream buffer. Return immediately if there is not * // Send the string to the stream buffer. Return immediately if there is not
// enough space in the buffer. * // enough space in the buffer.
xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 ); * xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
*
if( xBytesSent != strlen( pcStringToSend ) ) * if( xBytesSent != strlen( pcStringToSend ) )
{ * {
// The entire string could not be added to the stream buffer because * // The entire string could not be added to the stream buffer because
// there was not enough free space in the buffer, but xBytesSent bytes * // there was not enough free space in the buffer, but xBytesSent bytes
// were sent. Could try again to send the remaining bytes. * // were sent. Could try again to send the remaining bytes.
} * }
} * }
</pre> * </pre>
* \defgroup xStreamBufferSend xStreamBufferSend * \defgroup xStreamBufferSend xStreamBufferSend
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
const void *pvTxData, const void * pvTxData,
size_t xDataLengthBytes, size_t xDataLengthBytes,
TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, * size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
const void *pvTxData, * const void *pvTxData,
size_t xDataLengthBytes, * size_t xDataLengthBytes,
BaseType_t *pxHigherPriorityTaskWoken ); * BaseType_t *pxHigherPriorityTaskWoken );
</pre> * </pre>
* *
* Interrupt safe version of the API function that sends a stream of bytes to * Interrupt safe version of the API function that sends a stream of bytes to
* the stream buffer. * the stream buffer.
@ -374,56 +376,56 @@ size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
* space for all the bytes to be written. * space for all the bytes to be written.
* *
* Example use: * Example use:
<pre> * <pre>
// A stream buffer that has already been created. * // A stream buffer that has already been created.
StreamBufferHandle_t xStreamBuffer; * StreamBufferHandle_t xStreamBuffer;
*
void vAnInterruptServiceRoutine( void ) * void vAnInterruptServiceRoutine( void )
{ * {
size_t xBytesSent; * size_t xBytesSent;
char *pcStringToSend = "String to send"; * char *pcStringToSend = "String to send";
BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
*
// Attempt to send the string to the stream buffer. * // Attempt to send the string to the stream buffer.
xBytesSent = xStreamBufferSendFromISR( xStreamBuffer, * xBytesSent = xStreamBufferSendFromISR( xStreamBuffer,
( void * ) pcStringToSend, * ( void * ) pcStringToSend,
strlen( pcStringToSend ), * strlen( pcStringToSend ),
&xHigherPriorityTaskWoken ); * &xHigherPriorityTaskWoken );
*
if( xBytesSent != strlen( pcStringToSend ) ) * if( xBytesSent != strlen( pcStringToSend ) )
{ * {
// There was not enough free space in the stream buffer for the entire * // There was not enough free space in the stream buffer for the entire
// string to be written, ut xBytesSent bytes were written. * // string to be written, ut xBytesSent bytes were written.
} * }
*
// If xHigherPriorityTaskWoken was set to pdTRUE inside * // If xHigherPriorityTaskWoken was set to pdTRUE inside
// xStreamBufferSendFromISR() then a task that has a priority above the * // xStreamBufferSendFromISR() then a task that has a priority above the
// priority of the currently executing task was unblocked and a context * // priority of the currently executing task was unblocked and a context
// switch should be performed to ensure the ISR returns to the unblocked * // switch should be performed to ensure the ISR returns to the unblocked
// task. In most FreeRTOS ports this is done by simply passing * // task. In most FreeRTOS ports this is done by simply passing
// xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the * // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
// variables value, and perform the context switch if necessary. Check the * // variables value, and perform the context switch if necessary. Check the
// documentation for the port in use for port specific instructions. * // documentation for the port in use for port specific instructions.
taskYIELD_FROM_ISR( xHigherPriorityTaskWoken ); * taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
} * }
</pre> * </pre>
* \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
const void *pvTxData, const void * pvTxData,
size_t xDataLengthBytes, size_t xDataLengthBytes,
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, * size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
void *pvRxData, * void *pvRxData,
size_t xBufferLengthBytes, * size_t xBufferLengthBytes,
TickType_t xTicksToWait ); * TickType_t xTicksToWait );
</pre> * </pre>
* *
* Receives bytes from a stream buffer. * Receives bytes from a stream buffer.
* *
@ -473,46 +475,46 @@ size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
* out before xBufferLengthBytes were available. * out before xBufferLengthBytes were available.
* *
* Example use: * Example use:
<pre> * <pre>
void vAFunction( StreamBuffer_t xStreamBuffer ) * void vAFunction( StreamBuffer_t xStreamBuffer )
{ * {
uint8_t ucRxData[ 20 ]; * uint8_t ucRxData[ 20 ];
size_t xReceivedBytes; * size_t xReceivedBytes;
const TickType_t xBlockTime = pdMS_TO_TICKS( 20 ); * const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
*
// Receive up to another sizeof( ucRxData ) bytes from the stream buffer. * // Receive up to another sizeof( ucRxData ) bytes from the stream buffer.
// Wait in the Blocked state (so not using any CPU processing time) for a * // Wait in the Blocked state (so not using any CPU processing time) for a
// maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be * // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be
// available. * // available.
xReceivedBytes = xStreamBufferReceive( xStreamBuffer, * xReceivedBytes = xStreamBufferReceive( xStreamBuffer,
( void * ) ucRxData, * ( void * ) ucRxData,
sizeof( ucRxData ), * sizeof( ucRxData ),
xBlockTime ); * xBlockTime );
*
if( xReceivedBytes > 0 ) * if( xReceivedBytes > 0 )
{ * {
// A ucRxData contains another xRecievedBytes bytes of data, which can * // A ucRxData contains another xRecievedBytes bytes of data, which can
// be processed here.... * // be processed here....
} * }
} * }
</pre> * </pre>
* \defgroup xStreamBufferReceive xStreamBufferReceive * \defgroup xStreamBufferReceive xStreamBufferReceive
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
void *pvRxData, void * pvRxData,
size_t xBufferLengthBytes, size_t xBufferLengthBytes,
TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, * size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
void *pvRxData, * void *pvRxData,
size_t xBufferLengthBytes, * size_t xBufferLengthBytes,
BaseType_t *pxHigherPriorityTaskWoken ); * BaseType_t *pxHigherPriorityTaskWoken );
</pre> * </pre>
* *
* An interrupt safe version of the API function that receives bytes from a * An interrupt safe version of the API function that receives bytes from a
* stream buffer. * stream buffer.
@ -549,53 +551,53 @@ size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
* @return The number of bytes read from the stream buffer, if any. * @return The number of bytes read from the stream buffer, if any.
* *
* Example use: * Example use:
<pre> * <pre>
// A stream buffer that has already been created. * // A stream buffer that has already been created.
StreamBuffer_t xStreamBuffer; * StreamBuffer_t xStreamBuffer;
*
void vAnInterruptServiceRoutine( void ) * void vAnInterruptServiceRoutine( void )
{ * {
uint8_t ucRxData[ 20 ]; * uint8_t ucRxData[ 20 ];
size_t xReceivedBytes; * size_t xReceivedBytes;
BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. * BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
*
// Receive the next stream from the stream buffer. * // Receive the next stream from the stream buffer.
xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer, * xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer,
( void * ) ucRxData, * ( void * ) ucRxData,
sizeof( ucRxData ), * sizeof( ucRxData ),
&xHigherPriorityTaskWoken ); * &xHigherPriorityTaskWoken );
*
if( xReceivedBytes > 0 ) * if( xReceivedBytes > 0 )
{ * {
// ucRxData contains xReceivedBytes read from the stream buffer. * // ucRxData contains xReceivedBytes read from the stream buffer.
// Process the stream here.... * // Process the stream here....
} * }
*
// If xHigherPriorityTaskWoken was set to pdTRUE inside * // If xHigherPriorityTaskWoken was set to pdTRUE inside
// xStreamBufferReceiveFromISR() then a task that has a priority above the * // xStreamBufferReceiveFromISR() then a task that has a priority above the
// priority of the currently executing task was unblocked and a context * // priority of the currently executing task was unblocked and a context
// switch should be performed to ensure the ISR returns to the unblocked * // switch should be performed to ensure the ISR returns to the unblocked
// task. In most FreeRTOS ports this is done by simply passing * // task. In most FreeRTOS ports this is done by simply passing
// xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the * // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
// variables value, and perform the context switch if necessary. Check the * // variables value, and perform the context switch if necessary. Check the
// documentation for the port in use for port specific instructions. * // documentation for the port in use for port specific instructions.
taskYIELD_FROM_ISR( xHigherPriorityTaskWoken ); * taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
} * }
</pre> * </pre>
* \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
void *pvRxData, void * pvRxData,
size_t xBufferLengthBytes, size_t xBufferLengthBytes,
BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ); * void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );
</pre> * </pre>
* *
* Deletes a stream buffer that was previously created using a call to * Deletes a stream buffer that was previously created using a call to
* xStreamBufferCreate() or xStreamBufferCreateStatic(). If the stream * xStreamBufferCreate() or xStreamBufferCreateStatic(). If the stream
@ -615,9 +617,9 @@ void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTI
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ); * BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );
</pre> * </pre>
* *
* Queries a stream buffer to see if it is full. A stream buffer is full if it * Queries a stream buffer to see if it is full. A stream buffer is full if it
* does not have any free space, and therefore cannot accept any more data. * does not have any free space, and therefore cannot accept any more data.
@ -635,9 +637,9 @@ BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ); * BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );
</pre> * </pre>
* *
* Queries a stream buffer to see if it is empty. A stream buffer is empty if * Queries a stream buffer to see if it is empty. A stream buffer is empty if
* it does not contain any data. * it does not contain any data.
@ -655,9 +657,9 @@ BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ); * BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );
</pre> * </pre>
* *
* Resets a stream buffer to its initial, empty, state. Any data that was in * Resets a stream buffer to its initial, empty, state. Any data that was in
* the stream buffer is discarded. A stream buffer can only be reset if there * the stream buffer is discarded. A stream buffer can only be reset if there
@ -678,9 +680,9 @@ BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_F
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ); * size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );
</pre> * </pre>
* *
* Queries a stream buffer to see how much free space it contains, which is * Queries a stream buffer to see how much free space it contains, which is
* equal to the amount of data that can be sent to the stream buffer before it * equal to the amount of data that can be sent to the stream buffer before it
@ -699,9 +701,9 @@ size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVIL
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ); * size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );
</pre> * </pre>
* *
* Queries a stream buffer to see how much data it contains, which is equal to * Queries a stream buffer to see how much data it contains, which is equal to
* the number of bytes that can be read from the stream buffer before the stream * the number of bytes that can be read from the stream buffer before the stream
@ -720,9 +722,9 @@ size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILE
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ); * BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );
</pre> * </pre>
* *
* A stream buffer's trigger level is the number of bytes that must be in the * A stream buffer's trigger level is the number of bytes that must be in the
* stream buffer before a task that is blocked on the stream buffer to * stream buffer before a task that is blocked on the stream buffer to
@ -752,14 +754,15 @@ BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, siz
* \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) PRIVILEGED_FUNCTION; BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer,
size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); * BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
</pre> * </pre>
* *
* For advanced users only. * For advanced users only.
* *
@ -791,14 +794,15 @@ BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer
* \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
/** /**
* stream_buffer.h * stream_buffer.h
* *
<pre> * <pre>
BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); * BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
</pre> * </pre>
* *
* For advanced users only. * For advanced users only.
* *
@ -831,29 +835,33 @@ BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuf
* \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR
* \ingroup StreamBufferManagement * \ingroup StreamBufferManagement
*/ */
BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer,
BaseType_t * pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
/* Functions below here are not part of the public API. */ /* Functions below here are not part of the public API. */
StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
size_t xTriggerLevelBytes, size_t xTriggerLevelBytes,
BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION; BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
size_t xTriggerLevelBytes, size_t xTriggerLevelBytes,
BaseType_t xIsMessageBuffer, BaseType_t xIsMessageBuffer,
uint8_t * const pucStreamBufferStorageArea, uint8_t * const pucStreamBufferStorageArea,
StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION; StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
#if( configUSE_TRACE_FACILITY == 1 ) #if ( configUSE_TRACE_FACILITY == 1 )
void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION; void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer,
UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
#endif #endif
/* *INDENT-OFF* */
#if defined( __cplusplus ) #if defined( __cplusplus )
} }
#endif #endif
/* *INDENT-ON* */
#endif /* !defined( STREAM_BUFFER_H ) */ #endif /* !defined( STREAM_BUFFER_H ) */

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258
list.c
View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,180 +19,192 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#include <stdlib.h> #include <stdlib.h>
/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
* all the API functions to use the MPU wrappers. That should only be done when
* task.h is included from an application file. */
#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
#include "FreeRTOS.h" #include "FreeRTOS.h"
#include "list.h" #include "list.h"
/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
* because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be
* defined for the header files above, but not in this file, in order to
* generate the correct privileged Vs unprivileged linkage and placement. */
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* PUBLIC LIST API documented in list.h * PUBLIC LIST API documented in list.h
*----------------------------------------------------------*/ *----------------------------------------------------------*/
void vListInitialise( List_t * const pxList ) void vListInitialise( List_t * const pxList )
{ {
/* The list structure contains a list item which is used to mark the /* The list structure contains a list item which is used to mark the
end of the list. To initialise the list the list end is inserted * end of the list. To initialise the list the list end is inserted
as the only list entry. */ * as the only list entry. */
pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
/* The list end value is the highest possible value in the list to /* The list end value is the highest possible value in the list to
ensure it remains at the end of the list. */ * ensure it remains at the end of the list. */
pxList->xListEnd.xItemValue = portMAX_DELAY; pxList->xListEnd.xItemValue = portMAX_DELAY;
/* The list end next and previous pointers point to itself so we know /* The list end next and previous pointers point to itself so we know
when the list is empty. */ * when the list is empty. */
pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
pxList->uxNumberOfItems = ( UBaseType_t ) 0U; pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
/* Write known values into the list if /* Write known values into the list if
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ); listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ); listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vListInitialiseItem( ListItem_t * const pxItem ) void vListInitialiseItem( ListItem_t * const pxItem )
{ {
/* Make sure the list item is not recorded as being on a list. */ /* Make sure the list item is not recorded as being on a list. */
pxItem->pxContainer = NULL; pxItem->pxContainer = NULL;
/* Write known values into the list item if /* Write known values into the list item if
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) void vListInsertEnd( List_t * const pxList,
ListItem_t * const pxNewListItem )
{ {
ListItem_t * const pxIndex = pxList->pxIndex; ListItem_t * const pxIndex = pxList->pxIndex;
/* Only effective when configASSERT() is also defined, these tests may catch /* Only effective when configASSERT() is also defined, these tests may catch
the list data structures being overwritten in memory. They will not catch * the list data structures being overwritten in memory. They will not catch
data errors caused by incorrect configuration or use of FreeRTOS. */ * data errors caused by incorrect configuration or use of FreeRTOS. */
listTEST_LIST_INTEGRITY( pxList ); listTEST_LIST_INTEGRITY( pxList );
listTEST_LIST_ITEM_INTEGRITY( pxNewListItem ); listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
/* Insert a new list item into pxList, but rather than sort the list, /* Insert a new list item into pxList, but rather than sort the list,
makes the new list item the last item to be removed by a call to * makes the new list item the last item to be removed by a call to
listGET_OWNER_OF_NEXT_ENTRY(). */ * listGET_OWNER_OF_NEXT_ENTRY(). */
pxNewListItem->pxNext = pxIndex; pxNewListItem->pxNext = pxIndex;
pxNewListItem->pxPrevious = pxIndex->pxPrevious; pxNewListItem->pxPrevious = pxIndex->pxPrevious;
/* Only used during decision coverage testing. */ /* Only used during decision coverage testing. */
mtCOVERAGE_TEST_DELAY(); mtCOVERAGE_TEST_DELAY();
pxIndex->pxPrevious->pxNext = pxNewListItem; pxIndex->pxPrevious->pxNext = pxNewListItem;
pxIndex->pxPrevious = pxNewListItem; pxIndex->pxPrevious = pxNewListItem;
/* Remember which list the item is in. */ /* Remember which list the item is in. */
pxNewListItem->pxContainer = pxList; pxNewListItem->pxContainer = pxList;
( pxList->uxNumberOfItems )++; ( pxList->uxNumberOfItems )++;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) void vListInsert( List_t * const pxList,
ListItem_t * const pxNewListItem )
{ {
ListItem_t *pxIterator; ListItem_t * pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue; const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
/* Only effective when configASSERT() is also defined, these tests may catch /* Only effective when configASSERT() is also defined, these tests may catch
the list data structures being overwritten in memory. They will not catch * the list data structures being overwritten in memory. They will not catch
data errors caused by incorrect configuration or use of FreeRTOS. */ * data errors caused by incorrect configuration or use of FreeRTOS. */
listTEST_LIST_INTEGRITY( pxList ); listTEST_LIST_INTEGRITY( pxList );
listTEST_LIST_ITEM_INTEGRITY( pxNewListItem ); listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
/* Insert the new list item into the list, sorted in xItemValue order. /* Insert the new list item into the list, sorted in xItemValue order.
*
* If the list already contains a list item with the same item value then the
* new list item should be placed after it. This ensures that TCBs which are
* stored in ready lists (all of which have the same xItemValue value) get a
* share of the CPU. However, if the xItemValue is the same as the back marker
* the iteration loop below will not end. Therefore the value is checked
* first, and the algorithm slightly modified if necessary. */
if( xValueOfInsertion == portMAX_DELAY )
{
pxIterator = pxList->xListEnd.pxPrevious;
}
else
{
/* *** NOTE ***********************************************************
* If you find your application is crashing here then likely causes are
* listed below. In addition see https://www.FreeRTOS.org/FAQHelp.html for
* more tips, and ensure configASSERT() is defined!
* https://www.FreeRTOS.org/a00110.html#configASSERT
*
* 1) Stack overflow -
* see https://www.FreeRTOS.org/Stacks-and-stack-overflow-checking.html
* 2) Incorrect interrupt priority assignment, especially on Cortex-M
* parts where numerically high priority values denote low actual
* interrupt priorities, which can seem counter intuitive. See
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html and the definition
* of configMAX_SYSCALL_INTERRUPT_PRIORITY on
* https://www.FreeRTOS.org/a00110.html
* 3) Calling an API function from within a critical section or when
* the scheduler is suspended, or calling an API function that does
* not end in "FromISR" from an interrupt.
* 4) Using a queue or semaphore before it has been initialised or
* before the scheduler has been started (are interrupts firing
* before vTaskStartScheduler() has been called?).
**********************************************************************/
If the list already contains a list item with the same item value then the for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
new list item should be placed after it. This ensures that TCBs which are {
stored in ready lists (all of which have the same xItemValue value) get a /* There is nothing to do here, just iterating to the wanted
share of the CPU. However, if the xItemValue is the same as the back marker * insertion position. */
the iteration loop below will not end. Therefore the value is checked }
first, and the algorithm slightly modified if necessary. */ }
if( xValueOfInsertion == portMAX_DELAY )
{
pxIterator = pxList->xListEnd.pxPrevious;
}
else
{
/* *** NOTE ***********************************************************
If you find your application is crashing here then likely causes are
listed below. In addition see https://www.freertos.org/FAQHelp.html for
more tips, and ensure configASSERT() is defined!
https://www.freertos.org/a00110.html#configASSERT
1) Stack overflow - pxNewListItem->pxNext = pxIterator->pxNext;
see https://www.freertos.org/Stacks-and-stack-overflow-checking.html pxNewListItem->pxNext->pxPrevious = pxNewListItem;
2) Incorrect interrupt priority assignment, especially on Cortex-M pxNewListItem->pxPrevious = pxIterator;
parts where numerically high priority values denote low actual pxIterator->pxNext = pxNewListItem;
interrupt priorities, which can seem counter intuitive. See
https://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
of configMAX_SYSCALL_INTERRUPT_PRIORITY on
https://www.freertos.org/a00110.html
3) Calling an API function from within a critical section or when
the scheduler is suspended, or calling an API function that does
not end in "FromISR" from an interrupt.
4) Using a queue or semaphore before it has been initialised or
before the scheduler has been started (are interrupts firing
before vTaskStartScheduler() has been called?).
**********************************************************************/
for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */ /* Remember which list the item is in. This allows fast removal of the
{ * item later. */
/* There is nothing to do here, just iterating to the wanted pxNewListItem->pxContainer = pxList;
insertion position. */
}
}
pxNewListItem->pxNext = pxIterator->pxNext; ( pxList->uxNumberOfItems )++;
pxNewListItem->pxNext->pxPrevious = pxNewListItem;
pxNewListItem->pxPrevious = pxIterator;
pxIterator->pxNext = pxNewListItem;
/* Remember which list the item is in. This allows fast removal of the
item later. */
pxNewListItem->pxContainer = pxList;
( pxList->uxNumberOfItems )++;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{ {
/* The list item knows which list it is in. Obtain the list from the list /* The list item knows which list it is in. Obtain the list from the list
item. */ * item. */
List_t * const pxList = pxItemToRemove->pxContainer; List_t * const pxList = pxItemToRemove->pxContainer;
pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
/* Only used during decision coverage testing. */ /* Only used during decision coverage testing. */
mtCOVERAGE_TEST_DELAY(); mtCOVERAGE_TEST_DELAY();
/* Make sure the index is left pointing to a valid item. */ /* Make sure the index is left pointing to a valid item. */
if( pxList->pxIndex == pxItemToRemove ) if( pxList->pxIndex == pxItemToRemove )
{ {
pxList->pxIndex = pxItemToRemove->pxPrevious; pxList->pxIndex = pxItemToRemove->pxPrevious;
} }
else else
{ {
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
pxItemToRemove->pxContainer = NULL; pxItemToRemove->pxContainer = NULL;
( pxList->uxNumberOfItems )--; ( pxList->uxNumberOfItems )--;
return pxList->uxNumberOfItems; return pxList->uxNumberOfItems;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

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@ -1,5 +1,5 @@
#/* #/*
# * FreeRTOS Kernel V10.3.1 # * FreeRTOS Kernel V10.4.1
# * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
# * # *
# * Permission is hereby granted, free of charge, to any person obtaining a copy of # * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
# * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. # * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# * # *
# * http://www.FreeRTOS.org # * https://www.FreeRTOS.org
# * http://aws.amazon.com/freertos # * https://github.com/FreeRTOS
# * # *
# * 1 tab == 4 spaces! # * 1 tab == 4 spaces!
# */ # */

File diff suppressed because it is too large Load diff

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -39,415 +39,415 @@
* header files. */ * header files. */
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
#if( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
#endif #endif
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r3, [r2] \n" /* Read pxCurrentTCB. */ " ldr r3, [r2] \n"/* Read pxCurrentTCB. */
" ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" dmb \n" /* Complete outstanding transfers before disabling MPU. */ " dmb \n"/* Complete outstanding transfers before disabling MPU. */
" ldr r2, xMPUCTRLConst2 \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" movs r5, #1 \n" /* r5 = 1. */ " movs r5, #1 \n"/* r5 = 1. */
" bics r4, r5 \n" /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
" str r4, [r2] \n" /* Disable MPU. */ " str r4, [r2] \n"/* Disable MPU. */
" \n" " \n"
" adds r3, #4 \n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
" ldr r4, [r3] \n" /* r4 = *r3 i.e. r4 = MAIR0. */ " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */
" ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
" str r4, [r2] \n" /* Program MAIR0. */ " str r4, [r2] \n"/* Program MAIR0. */
" ldr r2, xRNRConst2 \n" /* r2 = 0xe000ed98 [Location of RNR]. */ " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
" adds r3, #4 \n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
" movs r5, #4 \n" /* r5 = 4. */ " movs r5, #4 \n"/* r5 = 4. */
" str r5, [r2] \n" /* Program RNR = 4. */ " str r5, [r2] \n"/* Program RNR = 4. */
" ldmia r3!, {r6,r7} \n" /* Read first set of RBAR/RLAR from TCB. */ " ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */
" ldr r4, xRBARConst2 \n" /* r4 = 0xe000ed9c [Location of RBAR]. */ " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
" stmia r4!, {r6,r7} \n" /* Write first set of RBAR/RLAR registers. */ " stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */
" movs r5, #5 \n" /* r5 = 5. */ " movs r5, #5 \n"/* r5 = 5. */
" str r5, [r2] \n" /* Program RNR = 5. */ " str r5, [r2] \n"/* Program RNR = 5. */
" ldmia r3!, {r6,r7} \n" /* Read second set of RBAR/RLAR from TCB. */ " ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */
" ldr r4, xRBARConst2 \n" /* r4 = 0xe000ed9c [Location of RBAR]. */ " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
" stmia r4!, {r6,r7} \n" /* Write second set of RBAR/RLAR registers. */ " stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */
" movs r5, #6 \n" /* r5 = 6. */ " movs r5, #6 \n"/* r5 = 6. */
" str r5, [r2] \n" /* Program RNR = 6. */ " str r5, [r2] \n"/* Program RNR = 6. */
" ldmia r3!, {r6,r7} \n" /* Read third set of RBAR/RLAR from TCB. */ " ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */
" ldr r4, xRBARConst2 \n" /* r4 = 0xe000ed9c [Location of RBAR]. */ " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
" stmia r4!, {r6,r7} \n" /* Write third set of RBAR/RLAR registers. */ " stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */
" movs r5, #7 \n" /* r5 = 7. */ " movs r5, #7 \n"/* r5 = 7. */
" str r5, [r2] \n" /* Program RNR = 7. */ " str r5, [r2] \n"/* Program RNR = 7. */
" ldmia r3!, {r6,r7} \n" /* Read fourth set of RBAR/RLAR from TCB. */ " ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */
" ldr r4, xRBARConst2 \n" /* r4 = 0xe000ed9c [Location of RBAR]. */ " ldr r4, xRBARConst2 \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
" stmia r4!, {r6,r7} \n" /* Write fourth set of RBAR/RLAR registers. */ " stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */
" \n" " \n"
" ldr r2, xMPUCTRLConst2 \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" movs r5, #1 \n" /* r5 = 1. */ " movs r5, #1 \n"/* r5 = 1. */
" orrs r4, r5 \n" /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
" str r4, [r2] \n" /* Enable MPU. */ " str r4, [r2] \n"/* Enable MPU. */
" dsb \n" /* Force memory writes before continuing. */ " dsb \n"/* Force memory writes before continuing. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldm r0!, {r1-r4} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
" ldr r5, xSecureContextConst2 \n" " ldr r5, xSecureContextConst2 \n"
" str r1, [r5] \n" /* Set xSecureContext to this task's value for the same. */ " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */
" msr psplim, r2 \n" /* Set this task's PSPLIM value. */ " msr psplim, r2 \n"/* Set this task's PSPLIM value. */
" msr control, r3 \n" /* Set this task's CONTROL value. */ " msr control, r3 \n"/* Set this task's CONTROL value. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n"/* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
" bx r4 \n" /* Finally, branch to EXC_RETURN. */ " bx r4 \n"/* Finally, branch to EXC_RETURN. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
" ldr r4, xSecureContextConst2 \n" " ldr r4, xSecureContextConst2 \n"
" str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */
" msr psplim, r2 \n" /* Set this task's PSPLIM value. */ " msr psplim, r2 \n"/* Set this task's PSPLIM value. */
" movs r1, #2 \n" /* r1 = 2. */ " movs r1, #2 \n"/* r1 = 2. */
" msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n"/* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
" bx r3 \n" /* Finally, branch to EXC_RETURN. */ " bx r3 \n"/* Finally, branch to EXC_RETURN. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"pxCurrentTCBConst2: .word pxCurrentTCB \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n"
"xSecureContextConst2: .word xSecureContext \n" "xSecureContextConst2: .word xSecureContext \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
"xMPUCTRLConst2: .word 0xe000ed94 \n" "xMPUCTRLConst2: .word 0xe000ed94 \n"
"xMAIR0Const2: .word 0xe000edc0 \n" "xMAIR0Const2: .word 0xe000edc0 \n"
"xRNRConst2: .word 0xe000ed98 \n" "xRNRConst2: .word 0xe000ed98 \n"
"xRBARConst2: .word 0xe000ed9c \n" "xRBARConst2: .word 0xe000ed9c \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* r0 = CONTROL. */ " mrs r0, control \n"/* r0 = CONTROL. */
" movs r1, #1 \n" /* r1 = 1. */ " movs r1, #1 \n"/* r1 = 1. */
" tst r0, r1 \n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ " tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
" beq running_privileged \n" /* If the result of previous AND operation was 0, branch. */ " beq running_privileged \n"/* If the result of previous AND operation was 0, branch. */
" movs r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ " movs r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
" running_privileged: \n" " running_privileged: \n"
" movs r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ " movs r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
::: "r0", "r1", "memory" ::: "r0", "r1", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* Read the CONTROL register. */ " mrs r0, control \n"/* Read the CONTROL register. */
" movs r1, #1 \n" /* r1 = 1. */ " movs r1, #1 \n"/* r1 = 1. */
" bics r0, r1 \n" /* Clear the bit 0. */ " bics r0, r1 \n"/* Clear the bit 0. */
" msr control, r0 \n" /* Write back the new CONTROL value. */ " msr control, r0 \n"/* Write back the new CONTROL value. */
" bx lr \n" /* Return to the caller. */ " bx lr \n"/* Return to the caller. */
::: "r0", "r1", "memory" ::: "r0", "r1", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vResetPrivilege( void ) /* __attribute__ (( naked )) */ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* r0 = CONTROL. */ " mrs r0, control \n"/* r0 = CONTROL. */
" movs r1, #1 \n" /* r1 = 1. */ " movs r1, #1 \n"/* r1 = 1. */
" orrs r0, r1 \n" /* r0 = r0 | r1. */ " orrs r0, r1 \n"/* r0 = r0 | r1. */
" msr control, r0 \n" /* CONTROL = r0. */ " msr control, r0 \n"/* CONTROL = r0. */
" bx lr \n" /* Return to the caller. */ " bx lr \n"/* Return to the caller. */
:::"r0", "r1", "memory" ::: "r0", "r1", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
" ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
" ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
" msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */
" cpsie i \n" /* Globally enable interrupts. */ " cpsie i \n"/* Globally enable interrupts. */
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" svc %0 \n" /* System call to start the first task. */ " svc %0 \n"/* System call to start the first task. */
" nop \n" " nop \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"xVTORConst: .word 0xe000ed08 \n" "xVTORConst: .word 0xe000ed08 \n"
:: "i" ( portSVC_START_SCHEDULER ) : "memory" ::"i" ( portSVC_START_SCHEDULER ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" mrs r0, PRIMASK \n" " mrs r0, PRIMASK \n"
" cpsid i \n" " cpsid i \n"
" bx lr \n" " bx lr \n"
::: "memory" ::: "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" msr PRIMASK, r0 \n" " msr PRIMASK, r0 \n"
" bx lr \n" " bx lr \n"
::: "memory" ::: "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" .extern SecureContext_SaveContext \n" " .extern SecureContext_SaveContext \n"
" .extern SecureContext_LoadContext \n" " .extern SecureContext_LoadContext \n"
" \n" " \n"
" mrs r1, psp \n" /* Read PSP in r1. */ " mrs r1, psp \n"/* Read PSP in r1. */
" ldr r2, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
" ldr r0, [r2] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ " ldr r0, [r2] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
" \n" " \n"
" cbz r0, save_ns_context \n" /* No secure context to save. */ " cbz r0, save_ns_context \n"/* No secure context to save. */
" push {r0-r2, r14} \n" " push {r0-r2, r14} \n"
" bl SecureContext_SaveContext \n" " bl SecureContext_SaveContext \n"
" pop {r0-r3} \n" /* LR is now in r3. */ " pop {r0-r3} \n"/* LR is now in r3. */
" mov lr, r3 \n" /* LR = r3. */ " mov lr, r3 \n"/* LR = r3. */
" lsls r2, r3, #25 \n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bpl save_ns_context \n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
" ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r2, [r3] \n" /* Read pxCurrentTCB. */ " ldr r2, [r3] \n"/* Read pxCurrentTCB. */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" subs r1, r1, #16 \n" /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ " subs r1, r1, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
" str r1, [r2] \n" /* Save the new top of stack in TCB. */ " str r1, [r2] \n"/* Save the new top of stack in TCB. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mrs r3, control \n" /* r3 = CONTROL. */ " mrs r3, control \n"/* r3 = CONTROL. */
" mov r4, lr \n" /* r4 = LR/EXC_RETURN. */ " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */
" stmia r1!, {r0, r2-r4} \n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" subs r1, r1, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ " subs r1, r1, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
" str r1, [r2] \n" /* Save the new top of stack in TCB. */ " str r1, [r2] \n"/* Save the new top of stack in TCB. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
" stmia r1!, {r0, r2-r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" b select_next_task \n" " b select_next_task \n"
" \n" " \n"
" save_ns_context: \n" " save_ns_context: \n"
" ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r2, [r3] \n" /* Read pxCurrentTCB. */ " ldr r2, [r3] \n"/* Read pxCurrentTCB. */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" subs r1, r1, #48 \n" /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ " subs r1, r1, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
" str r1, [r2] \n" /* Save the new top of stack in TCB. */ " str r1, [r2] \n"/* Save the new top of stack in TCB. */
" adds r1, r1, #16 \n" /* r1 = r1 + 16. */ " adds r1, r1, #16 \n"/* r1 = r1 + 16. */
" stmia r1!, {r4-r7} \n" /* Store the low registers that are not saved automatically. */ " stmia r1!, {r4-r7} \n"/* Store the low registers that are not saved automatically. */
" mov r4, r8 \n" /* r4 = r8. */ " mov r4, r8 \n"/* r4 = r8. */
" mov r5, r9 \n" /* r5 = r9. */ " mov r5, r9 \n"/* r5 = r9. */
" mov r6, r10 \n" /* r6 = r10. */ " mov r6, r10 \n"/* r6 = r10. */
" mov r7, r11 \n" /* r7 = r11. */ " mov r7, r11 \n"/* r7 = r11. */
" stmia r1!, {r4-r7} \n" /* Store the high registers that are not saved automatically. */ " stmia r1!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mrs r3, control \n" /* r3 = CONTROL. */ " mrs r3, control \n"/* r3 = CONTROL. */
" mov r4, lr \n" /* r4 = LR/EXC_RETURN. */ " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */
" subs r1, r1, #48 \n" /* r1 = r1 - 48. */ " subs r1, r1, #48 \n"/* r1 = r1 - 48. */
" stmia r1!, {r0, r2-r4} \n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" subs r1, r1, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ " subs r1, r1, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
" str r1, [r2] \n" /* Save the new top of stack in TCB. */ " str r1, [r2] \n"/* Save the new top of stack in TCB. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
" stmia r1!, {r0, r2-r7} \n" /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ " stmia r1!, {r0, r2-r7} \n"/* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */
" mov r4, r8 \n" /* r4 = r8. */ " mov r4, r8 \n"/* r4 = r8. */
" mov r5, r9 \n" /* r5 = r9. */ " mov r5, r9 \n"/* r5 = r9. */
" mov r6, r10 \n" /* r6 = r10. */ " mov r6, r10 \n"/* r6 = r10. */
" mov r7, r11 \n" /* r7 = r11. */ " mov r7, r11 \n"/* r7 = r11. */
" stmia r1!, {r4-r7} \n" /* Store the high registers that are not saved automatically. */ " stmia r1!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" select_next_task: \n" " select_next_task: \n"
" cpsid i \n" " cpsid i \n"
" bl vTaskSwitchContext \n" " bl vTaskSwitchContext \n"
" cpsie i \n" " cpsie i \n"
" \n" " \n"
" ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r3, [r2] \n" /* Read pxCurrentTCB. */ " ldr r3, [r2] \n"/* Read pxCurrentTCB. */
" ldr r1, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ " ldr r1, [r3] \n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" dmb \n" /* Complete outstanding transfers before disabling MPU. */ " dmb \n"/* Complete outstanding transfers before disabling MPU. */
" ldr r2, xMPUCTRLConst \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" movs r5, #1 \n" /* r5 = 1. */ " movs r5, #1 \n"/* r5 = 1. */
" bics r4, r5 \n" /* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */ " bics r4, r5 \n"/* r4 = r4 & ~r5 i.e. Clear the bit 0 in r4. */
" str r4, [r2] \n" /* Disable MPU. */ " str r4, [r2] \n"/* Disable MPU. */
" \n" " \n"
" adds r3, #4 \n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
" ldr r4, [r3] \n" /* r4 = *r3 i.e. r4 = MAIR0. */ " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */
" ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ " ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
" str r4, [r2] \n" /* Program MAIR0. */ " str r4, [r2] \n"/* Program MAIR0. */
" ldr r2, xRNRConst \n" /* r2 = 0xe000ed98 [Location of RNR]. */ " ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
" adds r3, #4 \n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
" movs r5, #4 \n" /* r5 = 4. */ " movs r5, #4 \n"/* r5 = 4. */
" str r5, [r2] \n" /* Program RNR = 4. */ " str r5, [r2] \n"/* Program RNR = 4. */
" ldmia r3!, {r6,r7} \n" /* Read first set of RBAR/RLAR from TCB. */ " ldmia r3!, {r6,r7} \n"/* Read first set of RBAR/RLAR from TCB. */
" ldr r4, xRBARConst \n" /* r4 = 0xe000ed9c [Location of RBAR]. */ " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
" stmia r4!, {r6,r7} \n" /* Write first set of RBAR/RLAR registers. */ " stmia r4!, {r6,r7} \n"/* Write first set of RBAR/RLAR registers. */
" movs r5, #5 \n" /* r5 = 5. */ " movs r5, #5 \n"/* r5 = 5. */
" str r5, [r2] \n" /* Program RNR = 5. */ " str r5, [r2] \n"/* Program RNR = 5. */
" ldmia r3!, {r6,r7} \n" /* Read second set of RBAR/RLAR from TCB. */ " ldmia r3!, {r6,r7} \n"/* Read second set of RBAR/RLAR from TCB. */
" ldr r4, xRBARConst \n" /* r4 = 0xe000ed9c [Location of RBAR]. */ " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
" stmia r4!, {r6,r7} \n" /* Write second set of RBAR/RLAR registers. */ " stmia r4!, {r6,r7} \n"/* Write second set of RBAR/RLAR registers. */
" movs r5, #6 \n" /* r5 = 6. */ " movs r5, #6 \n"/* r5 = 6. */
" str r5, [r2] \n" /* Program RNR = 6. */ " str r5, [r2] \n"/* Program RNR = 6. */
" ldmia r3!, {r6,r7} \n" /* Read third set of RBAR/RLAR from TCB. */ " ldmia r3!, {r6,r7} \n"/* Read third set of RBAR/RLAR from TCB. */
" ldr r4, xRBARConst \n" /* r4 = 0xe000ed9c [Location of RBAR]. */ " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
" stmia r4!, {r6,r7} \n" /* Write third set of RBAR/RLAR registers. */ " stmia r4!, {r6,r7} \n"/* Write third set of RBAR/RLAR registers. */
" movs r5, #7 \n" /* r5 = 7. */ " movs r5, #7 \n"/* r5 = 7. */
" str r5, [r2] \n" /* Program RNR = 7. */ " str r5, [r2] \n"/* Program RNR = 7. */
" ldmia r3!, {r6,r7} \n" /* Read fourth set of RBAR/RLAR from TCB. */ " ldmia r3!, {r6,r7} \n"/* Read fourth set of RBAR/RLAR from TCB. */
" ldr r4, xRBARConst \n" /* r4 = 0xe000ed9c [Location of RBAR]. */ " ldr r4, xRBARConst \n"/* r4 = 0xe000ed9c [Location of RBAR]. */
" stmia r4!, {r6,r7} \n" /* Write fourth set of RBAR/RLAR registers. */ " stmia r4!, {r6,r7} \n"/* Write fourth set of RBAR/RLAR registers. */
" \n" " \n"
" ldr r2, xMPUCTRLConst \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" movs r5, #1 \n" /* r5 = 1. */ " movs r5, #1 \n"/* r5 = 1. */
" orrs r4, r5 \n" /* r4 = r4 | r5 i.e. Set the bit 0 in r4. */ " orrs r4, r5 \n"/* r4 = r4 | r5 i.e. Set the bit 0 in r4. */
" str r4, [r2] \n" /* Enable MPU. */ " str r4, [r2] \n"/* Enable MPU. */
" dsb \n" /* Force memory writes before continuing. */ " dsb \n"/* Force memory writes before continuing. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldmia r1!, {r0, r2-r4} \n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ " ldmia r1!, {r0, r2-r4} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
" msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */
" msr control, r3 \n" /* Restore the CONTROL register value for the task. */ " msr control, r3 \n"/* Restore the CONTROL register value for the task. */
" mov lr, r4 \n" /* LR = r4. */ " mov lr, r4 \n"/* LR = r4. */
" ldr r2, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
" str r0, [r2] \n" /* Restore the task's xSecureContext. */ " str r0, [r2] \n"/* Restore the task's xSecureContext. */
" cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */
" push {r1,r4} \n" " push {r1,r4} \n"
" bl SecureContext_LoadContext \n" /* Restore the secure context. */ " bl SecureContext_LoadContext \n"/* Restore the secure context. */
" pop {r1,r4} \n" " pop {r1,r4} \n"
" mov lr, r4 \n" /* LR = r4. */ " mov lr, r4 \n"/* LR = r4. */
" lsls r2, r4, #25 \n" /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ " lsls r2, r4, #25 \n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
" msr psp, r1 \n" /* Remember the new top of stack for the task. */ " msr psp, r1 \n"/* Remember the new top of stack for the task. */
" bx lr \n" " bx lr \n"
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" ldmia r1!, {r0, r2-r3} \n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ " ldmia r1!, {r0, r2-r3} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
" msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */
" mov lr, r3 \n" /* LR = r3. */ " mov lr, r3 \n"/* LR = r3. */
" ldr r2, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
" str r0, [r2] \n" /* Restore the task's xSecureContext. */ " str r0, [r2] \n"/* Restore the task's xSecureContext. */
" cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */
" push {r1,r3} \n" " push {r1,r3} \n"
" bl SecureContext_LoadContext \n" /* Restore the secure context. */ " bl SecureContext_LoadContext \n"/* Restore the secure context. */
" pop {r1,r3} \n" " pop {r1,r3} \n"
" mov lr, r3 \n" /* LR = r3. */ " mov lr, r3 \n"/* LR = r3. */
" lsls r2, r3, #25 \n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
" msr psp, r1 \n" /* Remember the new top of stack for the task. */ " msr psp, r1 \n"/* Remember the new top of stack for the task. */
" bx lr \n" " bx lr \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" restore_ns_context: \n" " restore_ns_context: \n"
" adds r1, r1, #16 \n" /* Move to the high registers. */ " adds r1, r1, #16 \n"/* Move to the high registers. */
" ldmia r1!, {r4-r7} \n" /* Restore the high registers that are not automatically restored. */ " ldmia r1!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */
" mov r8, r4 \n" /* r8 = r4. */ " mov r8, r4 \n"/* r8 = r4. */
" mov r9, r5 \n" /* r9 = r5. */ " mov r9, r5 \n"/* r9 = r5. */
" mov r10, r6 \n" /* r10 = r6. */ " mov r10, r6 \n"/* r10 = r6. */
" mov r11, r7 \n" /* r11 = r7. */ " mov r11, r7 \n"/* r11 = r7. */
" msr psp, r1 \n" /* Remember the new top of stack for the task. */ " msr psp, r1 \n"/* Remember the new top of stack for the task. */
" subs r1, r1, #32 \n" /* Go back to the low registers. */ " subs r1, r1, #32 \n"/* Go back to the low registers. */
" ldmia r1!, {r4-r7} \n" /* Restore the low registers that are not automatically restored. */ " ldmia r1!, {r4-r7} \n"/* Restore the low registers that are not automatically restored. */
" bx lr \n" " bx lr \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"pxCurrentTCBConst: .word pxCurrentTCB \n" "pxCurrentTCBConst: .word pxCurrentTCB \n"
"xSecureContextConst: .word xSecureContext \n" "xSecureContextConst: .word xSecureContext \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
"xMPUCTRLConst: .word 0xe000ed94 \n" "xMPUCTRLConst: .word 0xe000ed94 \n"
"xMAIR0Const: .word 0xe000edc0 \n" "xMAIR0Const: .word 0xe000edc0 \n"
"xRNRConst: .word 0xe000ed98 \n" "xRNRConst: .word 0xe000ed98 \n"
"xRBARConst: .word 0xe000ed9c \n" "xRBARConst: .word 0xe000ed9c \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" movs r0, #4 \n" " movs r0, #4 \n"
" mov r1, lr \n" " mov r1, lr \n"
" tst r0, r1 \n" " tst r0, r1 \n"
" beq stacking_used_msp \n" " beq stacking_used_msp \n"
" mrs r0, psp \n" " mrs r0, psp \n"
" ldr r2, svchandler_address_const \n" " ldr r2, svchandler_address_const \n"
" bx r2 \n" " bx r2 \n"
" stacking_used_msp: \n" " stacking_used_msp: \n"
" mrs r0, msp \n" " mrs r0, msp \n"
" ldr r2, svchandler_address_const \n" " ldr r2, svchandler_address_const \n"
" bx r2 \n" " bx r2 \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"svchandler_address_const: .word vPortSVCHandler_C \n" "svchandler_address_const: .word vPortSVCHandler_C \n"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" svc %0 \n" /* Secure context is allocated in the supervisor call. */ " svc %0 \n"/* Secure context is allocated in the supervisor call. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
:: "i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" ldr r1, [r0] \n" /* The first item in the TCB is the top of the stack. */ " ldr r1, [r0] \n"/* The first item in the TCB is the top of the stack. */
" ldr r0, [r1] \n" /* The first item on the stack is the task's xSecureContext. */ " ldr r0, [r1] \n"/* The first item on the stack is the task's xSecureContext. */
" cmp r0, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ " cmp r0, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */
" beq free_secure_context \n" " beq free_secure_context \n"
" bx lr \n" /* There is no secure context (xSecureContext is NULL). */ " bx lr \n"/* There is no secure context (xSecureContext is NULL). */
" free_secure_context: \n" " free_secure_context: \n"
" svc %0 \n" /* Secure context is freed in the supervisor call. */ " svc %0 \n"/* Secure context is freed in the supervisor call. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
:: "i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,18 +19,18 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -42,109 +42,109 @@ extern "C" {
*------------------------------------------------------------------------------ *------------------------------------------------------------------------------
*/ */
#ifndef configENABLE_FPU #ifndef configENABLE_FPU
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#ifndef configENABLE_MPU #ifndef configENABLE_MPU
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#ifndef configENABLE_TRUSTZONE #ifndef configENABLE_TRUSTZONE
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Type definitions. * @brief Type definitions.
*/ */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* Architecture specifics. * Architecture specifics.
*/ */
#define portARCH_NAME "Cortex-M23" #define portARCH_NAME "Cortex-M23"
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__(( always_inline )) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
#define portHAS_STACK_OVERFLOW_CHECKING 1 #define portHAS_STACK_OVERFLOW_CHECKING 1
#define portDONT_DISCARD __attribute__(( used )) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Extern declarations. * @brief Extern declarations.
*/ */
extern BaseType_t xPortIsInsideInterrupt( void ); extern BaseType_t xPortIsInsideInterrupt( void );
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief MPU specific constants. * @brief MPU specific constants.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#else #else
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU regions. */ /* MPU regions. */
#define portPRIVILEGED_FLASH_REGION ( 0UL ) #define portPRIVILEGED_FLASH_REGION ( 0UL )
#define portUNPRIVILEGED_FLASH_REGION ( 1UL ) #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
#define portPRIVILEGED_RAM_REGION ( 3UL ) #define portPRIVILEGED_RAM_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portLAST_CONFIGURABLE_REGION ( 7UL ) #define portLAST_CONFIGURABLE_REGION ( 7UL )
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
/* Device memory attributes used in MPU_MAIR registers. /* Device memory attributes used in MPU_MAIR registers.
* *
@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* 11 --> Device-GRE * 11 --> Device-GRE
* Bit[1:0] - 00, Reserved. * Bit[1:0] - 00, Reserved.
*/ */
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
/* Normal memory attributes used in MPU_MAIR registers. */ /* Normal memory attributes used in MPU_MAIR registers. */
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
/* Attributes used in MPU_RBAR registers. */ /* Attributes used in MPU_RBAR registers. */
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
#define portMPU_REGION_EXECUTE_NEVER ( 1UL ) #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Settings to define an MPU region. * @brief Settings to define an MPU region.
*/ */
typedef struct MPURegionSettings typedef struct MPURegionSettings
{ {
uint32_t ulRBAR; /**< RBAR for the region. */ uint32_t ulRBAR; /**< RBAR for the region. */
uint32_t ulRLAR; /**< RLAR for the region. */ uint32_t ulRLAR; /**< RLAR for the region. */
} MPURegionSettings_t; } MPURegionSettings_t;
/** /**
* @brief MPU settings as stored in the TCB. * @brief MPU settings as stored in the TCB.
*/ */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
} xMPU_SETTINGS; } xMPU_SETTINGS;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief SVC numbers. * @brief SVC numbers.
*/ */
#define portSVC_ALLOCATE_SECURE_CONTEXT 0 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
#define portSVC_FREE_SECURE_CONTEXT 1 #define portSVC_FREE_SECURE_CONTEXT 1
#define portSVC_START_SCHEDULER 2 #define portSVC_START_SCHEDULER 2
#define portSVC_RAISE_PRIVILEGE 3 #define portSVC_RAISE_PRIVILEGE 3
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Scheduler utilities. * @brief Scheduler utilities.
*/ */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Tickless idle/low power functionality. * @brief Tickless idle/low power functionality.
*/ */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Task function macros as described on the FreeRTOS.org WEB site. * @brief Task function macros as described on the FreeRTOS.org WEB site.
*/ */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
/**
* @brief Allocate a secure context for the task.
*
* Tasks are not created with a secure context. Any task that is going to call
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
* secure context before it calls any secure function.
*
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
*/
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
/** /**
* @brief Called when a task is deleted to delete the task's secure context, * @brief Allocate a secure context for the task.
* if it has one. *
* * Tasks are not created with a secure context. Any task that is going to call
* @param[in] pxTCB The TCB of the task being deleted. * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
*/ * secure context before it calls any secure function.
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) *
#else * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) */
#define portCLEAN_UP_TCB( pxTCB ) #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
#endif /* configENABLE_TRUSTZONE */
/**
* @brief Called when a task is deleted to delete the task's secure context,
* if it has one.
*
* @param[in] pxTCB The TCB of the task being deleted.
*/
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
#else
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
#define portCLEAN_UP_TCB( pxTCB )
#endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
/**
* @brief Checks whether or not the processor is privileged.
*
* @return 1 if the processor is already privileged, 0 otherwise.
*/
#define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Checks whether or not the processor is privileged.
* *
* The SVC handler checks that the SVC was raised from a system call and only * @return 1 if the processor is already privileged, 0 otherwise.
* then it raises the privilege. If this is called from any other place, */
* the privilege is not raised. #define portIS_PRIVILEGED() xIsPrivileged()
*/
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Raise an SVC request to raise privilege.
* register. *
*/ * The SVC handler checks that the SVC was raised from a system call and only
#define portRESET_PRIVILEGE() vResetPrivilege() * then it raises the privilege. If this is called from any other place,
#else * the privilege is not raised.
#define portIS_PRIVILEGED() */
#define portRAISE_PRIVILEGE() #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */ /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register.
*/
#define portRESET_PRIVILEGE() vResetPrivilege()
#else
#define portIS_PRIVILEGED()
#define portRAISE_PRIVILEGE()
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Barriers. * @brief Barriers.
*/ */
#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -39,328 +39,328 @@
* header files. */ * header files. */
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
#if( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
#endif #endif
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n"/* Read pxCurrentTCB. */
" ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" dmb \n" /* Complete outstanding transfers before disabling MPU. */ " dmb \n"/* Complete outstanding transfers before disabling MPU. */
" ldr r2, xMPUCTRLConst2 \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r3, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */
" movs r4, #1 \n" /* r4 = 1. */ " movs r4, #1 \n"/* r4 = 1. */
" bics r3, r4 \n" /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */ " bics r3, r4 \n"/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
" str r3, [r2] \n" /* Disable MPU. */ " str r3, [r2] \n"/* Disable MPU. */
" \n" " \n"
" adds r1, #4 \n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
" ldr r4, [r1] \n" /* r4 = *r1 i.e. r4 = MAIR0. */ " ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */
" ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
" str r4, [r2] \n" /* Program MAIR0. */ " str r4, [r2] \n"/* Program MAIR0. */
" ldr r2, xRNRConst2 \n" /* r2 = 0xe000ed98 [Location of RNR]. */ " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
" adds r1, #4 \n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
" movs r4, #4 \n" /* r4 = 4. */ " movs r4, #4 \n"/* r4 = 4. */
" str r4, [r2] \n" /* Program RNR = 4. */ " str r4, [r2] \n"/* Program RNR = 4. */
" ldmia r1!, {r5,r6} \n" /* Read first set of RBAR/RLAR from TCB. */ " ldmia r1!, {r5,r6} \n"/* Read first set of RBAR/RLAR from TCB. */
" ldr r3, xRBARConst2 \n" /* r3 = 0xe000ed9c [Location of RBAR]. */ " ldr r3, xRBARConst2 \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
" stmia r3!, {r5,r6} \n" /* Write first set of RBAR/RLAR registers. */ " stmia r3!, {r5,r6} \n"/* Write first set of RBAR/RLAR registers. */
" movs r4, #5 \n" /* r4 = 5. */ " movs r4, #5 \n"/* r4 = 5. */
" str r4, [r2] \n" /* Program RNR = 5. */ " str r4, [r2] \n"/* Program RNR = 5. */
" ldmia r1!, {r5,r6} \n" /* Read second set of RBAR/RLAR from TCB. */ " ldmia r1!, {r5,r6} \n"/* Read second set of RBAR/RLAR from TCB. */
" ldr r3, xRBARConst2 \n" /* r3 = 0xe000ed9c [Location of RBAR]. */ " ldr r3, xRBARConst2 \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
" stmia r3!, {r5,r6} \n" /* Write second set of RBAR/RLAR registers. */ " stmia r3!, {r5,r6} \n"/* Write second set of RBAR/RLAR registers. */
" movs r4, #6 \n" /* r4 = 6. */ " movs r4, #6 \n"/* r4 = 6. */
" str r4, [r2] \n" /* Program RNR = 6. */ " str r4, [r2] \n"/* Program RNR = 6. */
" ldmia r1!, {r5,r6} \n" /* Read third set of RBAR/RLAR from TCB. */ " ldmia r1!, {r5,r6} \n"/* Read third set of RBAR/RLAR from TCB. */
" ldr r3, xRBARConst2 \n" /* r3 = 0xe000ed9c [Location of RBAR]. */ " ldr r3, xRBARConst2 \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
" stmia r3!, {r5,r6} \n" /* Write third set of RBAR/RLAR registers. */ " stmia r3!, {r5,r6} \n"/* Write third set of RBAR/RLAR registers. */
" movs r4, #7 \n" /* r4 = 7. */ " movs r4, #7 \n"/* r4 = 7. */
" str r4, [r2] \n" /* Program RNR = 7. */ " str r4, [r2] \n"/* Program RNR = 7. */
" ldmia r1!, {r5,r6} \n" /* Read fourth set of RBAR/RLAR from TCB. */ " ldmia r1!, {r5,r6} \n"/* Read fourth set of RBAR/RLAR from TCB. */
" ldr r3, xRBARConst2 \n" /* r3 = 0xe000ed9c [Location of RBAR]. */ " ldr r3, xRBARConst2 \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
" stmia r3!, {r5,r6} \n" /* Write fourth set of RBAR/RLAR registers. */ " stmia r3!, {r5,r6} \n"/* Write fourth set of RBAR/RLAR registers. */
" \n" " \n"
" ldr r2, xMPUCTRLConst2 \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r3, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */
" movs r4, #1 \n" /* r4 = 1. */ " movs r4, #1 \n"/* r4 = 1. */
" orrs r3, r4 \n" /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */ " orrs r3, r4 \n"/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
" str r3, [r2] \n" /* Enable MPU. */ " str r3, [r2] \n"/* Enable MPU. */
" dsb \n" /* Force memory writes before continuing. */ " dsb \n"/* Force memory writes before continuing. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldm r0!, {r1-r3} \n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */ " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
" msr psplim, r1 \n" /* Set this task's PSPLIM value. */ " msr psplim, r1 \n"/* Set this task's PSPLIM value. */
" msr control, r2 \n" /* Set this task's CONTROL value. */ " msr control, r2 \n"/* Set this task's CONTROL value. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n"/* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
" bx r3 \n" /* Finally, branch to EXC_RETURN. */ " bx r3 \n"/* Finally, branch to EXC_RETURN. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
" msr psplim, r1 \n" /* Set this task's PSPLIM value. */ " msr psplim, r1 \n"/* Set this task's PSPLIM value. */
" movs r1, #2 \n" /* r1 = 2. */ " movs r1, #2 \n"/* r1 = 2. */
" msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n"/* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
" bx r2 \n" /* Finally, branch to EXC_RETURN. */ " bx r2 \n"/* Finally, branch to EXC_RETURN. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"pxCurrentTCBConst2: .word pxCurrentTCB \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
"xMPUCTRLConst2: .word 0xe000ed94 \n" "xMPUCTRLConst2: .word 0xe000ed94 \n"
"xMAIR0Const2: .word 0xe000edc0 \n" "xMAIR0Const2: .word 0xe000edc0 \n"
"xRNRConst2: .word 0xe000ed98 \n" "xRNRConst2: .word 0xe000ed98 \n"
"xRBARConst2: .word 0xe000ed9c \n" "xRBARConst2: .word 0xe000ed9c \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* r0 = CONTROL. */ " mrs r0, control \n"/* r0 = CONTROL. */
" movs r1, #1 \n" /* r1 = 1. */ " movs r1, #1 \n"/* r1 = 1. */
" tst r0, r1 \n" /* Perform r0 & r1 (bitwise AND) and update the conditions flag. */ " tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
" beq running_privileged \n" /* If the result of previous AND operation was 0, branch. */ " beq running_privileged \n"/* If the result of previous AND operation was 0, branch. */
" movs r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ " movs r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
" running_privileged: \n" " running_privileged: \n"
" movs r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ " movs r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
::: "r0", "r1", "memory" ::: "r0", "r1", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* Read the CONTROL register. */ " mrs r0, control \n"/* Read the CONTROL register. */
" movs r1, #1 \n" /* r1 = 1. */ " movs r1, #1 \n"/* r1 = 1. */
" bics r0, r1 \n" /* Clear the bit 0. */ " bics r0, r1 \n"/* Clear the bit 0. */
" msr control, r0 \n" /* Write back the new CONTROL value. */ " msr control, r0 \n"/* Write back the new CONTROL value. */
" bx lr \n" /* Return to the caller. */ " bx lr \n"/* Return to the caller. */
::: "r0", "r1", "memory" ::: "r0", "r1", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vResetPrivilege( void ) /* __attribute__ (( naked )) */ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* r0 = CONTROL. */ " mrs r0, control \n"/* r0 = CONTROL. */
" movs r1, #1 \n" /* r1 = 1. */ " movs r1, #1 \n"/* r1 = 1. */
" orrs r0, r1 \n" /* r0 = r0 | r1. */ " orrs r0, r1 \n"/* r0 = r0 | r1. */
" msr control, r0 \n" /* CONTROL = r0. */ " msr control, r0 \n"/* CONTROL = r0. */
" bx lr \n" /* Return to the caller. */ " bx lr \n"/* Return to the caller. */
:::"r0", "r1", "memory" ::: "r0", "r1", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
" ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
" ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
" msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */
" cpsie i \n" /* Globally enable interrupts. */ " cpsie i \n"/* Globally enable interrupts. */
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" svc %0 \n" /* System call to start the first task. */ " svc %0 \n"/* System call to start the first task. */
" nop \n" " nop \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"xVTORConst: .word 0xe000ed08 \n" "xVTORConst: .word 0xe000ed08 \n"
:: "i" ( portSVC_START_SCHEDULER ) : "memory" ::"i" ( portSVC_START_SCHEDULER ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" mrs r0, PRIMASK \n" " mrs r0, PRIMASK \n"
" cpsid i \n" " cpsid i \n"
" bx lr \n" " bx lr \n"
::: "memory" ::: "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" msr PRIMASK, r0 \n" " msr PRIMASK, r0 \n"
" bx lr \n" " bx lr \n"
::: "memory" ::: "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" mrs r0, psp \n" /* Read PSP in r0. */ " mrs r0, psp \n"/* Read PSP in r0. */
" ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n"/* Read pxCurrentTCB. */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" subs r0, r0, #44 \n" /* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */ " subs r0, r0, #44 \n"/* Make space for PSPLIM, CONTROL, LR and the remaining registers on the stack. */
" str r0, [r1] \n" /* Save the new top of stack in TCB. */ " str r0, [r1] \n"/* Save the new top of stack in TCB. */
" mrs r1, psplim \n" /* r1 = PSPLIM. */ " mrs r1, psplim \n"/* r1 = PSPLIM. */
" mrs r2, control \n" /* r2 = CONTROL. */ " mrs r2, control \n"/* r2 = CONTROL. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
" stmia r0!, {r1-r7} \n" /* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */ " stmia r0!, {r1-r7} \n"/* Store on the stack - PSPLIM, CONTROL, LR and low registers that are not automatically saved. */
" mov r4, r8 \n" /* r4 = r8. */ " mov r4, r8 \n"/* r4 = r8. */
" mov r5, r9 \n" /* r5 = r9. */ " mov r5, r9 \n"/* r5 = r9. */
" mov r6, r10 \n" /* r6 = r10. */ " mov r6, r10 \n"/* r6 = r10. */
" mov r7, r11 \n" /* r7 = r11. */ " mov r7, r11 \n"/* r7 = r11. */
" stmia r0!, {r4-r7} \n" /* Store the high registers that are not saved automatically. */ " stmia r0!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" subs r0, r0, #40 \n" /* Make space for PSPLIM, LR and the remaining registers on the stack. */ " subs r0, r0, #40 \n"/* Make space for PSPLIM, LR and the remaining registers on the stack. */
" str r0, [r1] \n" /* Save the new top of stack in TCB. */ " str r0, [r1] \n"/* Save the new top of stack in TCB. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
" stmia r0!, {r2-r7} \n" /* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */ " stmia r0!, {r2-r7} \n"/* Store on the stack - PSPLIM, LR and low registers that are not automatically saved. */
" mov r4, r8 \n" /* r4 = r8. */ " mov r4, r8 \n"/* r4 = r8. */
" mov r5, r9 \n" /* r5 = r9. */ " mov r5, r9 \n"/* r5 = r9. */
" mov r6, r10 \n" /* r6 = r10. */ " mov r6, r10 \n"/* r6 = r10. */
" mov r7, r11 \n" /* r7 = r11. */ " mov r7, r11 \n"/* r7 = r11. */
" stmia r0!, {r4-r7} \n" /* Store the high registers that are not saved automatically. */ " stmia r0!, {r4-r7} \n"/* Store the high registers that are not saved automatically. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" cpsid i \n" " cpsid i \n"
" bl vTaskSwitchContext \n" " bl vTaskSwitchContext \n"
" cpsie i \n" " cpsie i \n"
" \n" " \n"
" ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n"/* Read pxCurrentTCB. */
" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" dmb \n" /* Complete outstanding transfers before disabling MPU. */ " dmb \n"/* Complete outstanding transfers before disabling MPU. */
" ldr r2, xMPUCTRLConst \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r3, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */
" movs r4, #1 \n" /* r4 = 1. */ " movs r4, #1 \n"/* r4 = 1. */
" bics r3, r4 \n" /* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */ " bics r3, r4 \n"/* r3 = r3 & ~r4 i.e. Clear the bit 0 in r3. */
" str r3, [r2] \n" /* Disable MPU. */ " str r3, [r2] \n"/* Disable MPU. */
" \n" " \n"
" adds r1, #4 \n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
" ldr r4, [r1] \n" /* r4 = *r1 i.e. r4 = MAIR0. */ " ldr r4, [r1] \n"/* r4 = *r1 i.e. r4 = MAIR0. */
" ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ " ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
" str r4, [r2] \n" /* Program MAIR0. */ " str r4, [r2] \n"/* Program MAIR0. */
" ldr r2, xRNRConst \n" /* r2 = 0xe000ed98 [Location of RNR]. */ " ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
" adds r1, #4 \n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
" movs r4, #4 \n" /* r4 = 4. */ " movs r4, #4 \n"/* r4 = 4. */
" str r4, [r2] \n" /* Program RNR = 4. */ " str r4, [r2] \n"/* Program RNR = 4. */
" ldmia r1!, {r5,r6} \n" /* Read first set of RBAR/RLAR from TCB. */ " ldmia r1!, {r5,r6} \n"/* Read first set of RBAR/RLAR from TCB. */
" ldr r3, xRBARConst \n" /* r3 = 0xe000ed9c [Location of RBAR]. */ " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
" stmia r3!, {r5,r6} \n" /* Write first set of RBAR/RLAR registers. */ " stmia r3!, {r5,r6} \n"/* Write first set of RBAR/RLAR registers. */
" movs r4, #5 \n" /* r4 = 5. */ " movs r4, #5 \n"/* r4 = 5. */
" str r4, [r2] \n" /* Program RNR = 5. */ " str r4, [r2] \n"/* Program RNR = 5. */
" ldmia r1!, {r5,r6} \n" /* Read second set of RBAR/RLAR from TCB. */ " ldmia r1!, {r5,r6} \n"/* Read second set of RBAR/RLAR from TCB. */
" ldr r3, xRBARConst \n" /* r3 = 0xe000ed9c [Location of RBAR]. */ " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
" stmia r3!, {r5,r6} \n" /* Write second set of RBAR/RLAR registers. */ " stmia r3!, {r5,r6} \n"/* Write second set of RBAR/RLAR registers. */
" movs r4, #6 \n" /* r4 = 6. */ " movs r4, #6 \n"/* r4 = 6. */
" str r4, [r2] \n" /* Program RNR = 6. */ " str r4, [r2] \n"/* Program RNR = 6. */
" ldmia r1!, {r5,r6} \n" /* Read third set of RBAR/RLAR from TCB. */ " ldmia r1!, {r5,r6} \n"/* Read third set of RBAR/RLAR from TCB. */
" ldr r3, xRBARConst \n" /* r3 = 0xe000ed9c [Location of RBAR]. */ " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
" stmia r3!, {r5,r6} \n" /* Write third set of RBAR/RLAR registers. */ " stmia r3!, {r5,r6} \n"/* Write third set of RBAR/RLAR registers. */
" movs r4, #7 \n" /* r4 = 7. */ " movs r4, #7 \n"/* r4 = 7. */
" str r4, [r2] \n" /* Program RNR = 7. */ " str r4, [r2] \n"/* Program RNR = 7. */
" ldmia r1!, {r5,r6} \n" /* Read fourth set of RBAR/RLAR from TCB. */ " ldmia r1!, {r5,r6} \n"/* Read fourth set of RBAR/RLAR from TCB. */
" ldr r3, xRBARConst \n" /* r3 = 0xe000ed9c [Location of RBAR]. */ " ldr r3, xRBARConst \n"/* r3 = 0xe000ed9c [Location of RBAR]. */
" stmia r3!, {r5,r6} \n" /* Write fourth set of RBAR/RLAR registers. */ " stmia r3!, {r5,r6} \n"/* Write fourth set of RBAR/RLAR registers. */
" \n" " \n"
" ldr r2, xMPUCTRLConst \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r3, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r3, [r2] \n"/* Read the value of MPU_CTRL. */
" movs r4, #1 \n" /* r4 = 1. */ " movs r4, #1 \n"/* r4 = 1. */
" orrs r3, r4 \n" /* r3 = r3 | r4 i.e. Set the bit 0 in r3. */ " orrs r3, r4 \n"/* r3 = r3 | r4 i.e. Set the bit 0 in r3. */
" str r3, [r2] \n" /* Enable MPU. */ " str r3, [r2] \n"/* Enable MPU. */
" dsb \n" /* Force memory writes before continuing. */ " dsb \n"/* Force memory writes before continuing. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" adds r0, r0, #28 \n" /* Move to the high registers. */ " adds r0, r0, #28 \n"/* Move to the high registers. */
" ldmia r0!, {r4-r7} \n" /* Restore the high registers that are not automatically restored. */ " ldmia r0!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */
" mov r8, r4 \n" /* r8 = r4. */ " mov r8, r4 \n"/* r8 = r4. */
" mov r9, r5 \n" /* r9 = r5. */ " mov r9, r5 \n"/* r9 = r5. */
" mov r10, r6 \n" /* r10 = r6. */ " mov r10, r6 \n"/* r10 = r6. */
" mov r11, r7 \n" /* r11 = r7. */ " mov r11, r7 \n"/* r11 = r7. */
" msr psp, r0 \n" /* Remember the new top of stack for the task. */ " msr psp, r0 \n"/* Remember the new top of stack for the task. */
" subs r0, r0, #44 \n" /* Move to the starting of the saved context. */ " subs r0, r0, #44 \n"/* Move to the starting of the saved context. */
" ldmia r0!, {r1-r7} \n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */ " ldmia r0!, {r1-r7} \n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r7 restored. */
" msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */
" msr control, r2 \n" /* Restore the CONTROL register value for the task. */ " msr control, r2 \n"/* Restore the CONTROL register value for the task. */
" bx r3 \n" " bx r3 \n"
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" adds r0, r0, #24 \n" /* Move to the high registers. */ " adds r0, r0, #24 \n"/* Move to the high registers. */
" ldmia r0!, {r4-r7} \n" /* Restore the high registers that are not automatically restored. */ " ldmia r0!, {r4-r7} \n"/* Restore the high registers that are not automatically restored. */
" mov r8, r4 \n" /* r8 = r4. */ " mov r8, r4 \n"/* r8 = r4. */
" mov r9, r5 \n" /* r9 = r5. */ " mov r9, r5 \n"/* r9 = r5. */
" mov r10, r6 \n" /* r10 = r6. */ " mov r10, r6 \n"/* r10 = r6. */
" mov r11, r7 \n" /* r11 = r7. */ " mov r11, r7 \n"/* r11 = r7. */
" msr psp, r0 \n" /* Remember the new top of stack for the task. */ " msr psp, r0 \n"/* Remember the new top of stack for the task. */
" subs r0, r0, #40 \n" /* Move to the starting of the saved context. */ " subs r0, r0, #40 \n"/* Move to the starting of the saved context. */
" ldmia r0!, {r2-r7} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */ " ldmia r0!, {r2-r7} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r7 restored. */
" msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */
" bx r3 \n" " bx r3 \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"pxCurrentTCBConst: .word pxCurrentTCB \n" "pxCurrentTCBConst: .word pxCurrentTCB \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
"xMPUCTRLConst: .word 0xe000ed94 \n" "xMPUCTRLConst: .word 0xe000ed94 \n"
"xMAIR0Const: .word 0xe000edc0 \n" "xMAIR0Const: .word 0xe000edc0 \n"
"xRNRConst: .word 0xe000ed98 \n" "xRNRConst: .word 0xe000ed98 \n"
"xRBARConst: .word 0xe000ed9c \n" "xRBARConst: .word 0xe000ed9c \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" movs r0, #4 \n" " movs r0, #4 \n"
" mov r1, lr \n" " mov r1, lr \n"
" tst r0, r1 \n" " tst r0, r1 \n"
" beq stacking_used_msp \n" " beq stacking_used_msp \n"
" mrs r0, psp \n" " mrs r0, psp \n"
" ldr r2, svchandler_address_const \n" " ldr r2, svchandler_address_const \n"
" bx r2 \n" " bx r2 \n"
" stacking_used_msp: \n" " stacking_used_msp: \n"
" mrs r0, msp \n" " mrs r0, msp \n"
" ldr r2, svchandler_address_const \n" " ldr r2, svchandler_address_const \n"
" bx r2 \n" " bx r2 \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"svchandler_address_const: .word vPortSVCHandler_C \n" "svchandler_address_const: .word vPortSVCHandler_C \n"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,18 +19,18 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -42,109 +42,109 @@ extern "C" {
*------------------------------------------------------------------------------ *------------------------------------------------------------------------------
*/ */
#ifndef configENABLE_FPU #ifndef configENABLE_FPU
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#ifndef configENABLE_MPU #ifndef configENABLE_MPU
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#ifndef configENABLE_TRUSTZONE #ifndef configENABLE_TRUSTZONE
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Type definitions. * @brief Type definitions.
*/ */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* Architecture specifics. * Architecture specifics.
*/ */
#define portARCH_NAME "Cortex-M23" #define portARCH_NAME "Cortex-M23"
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__(( always_inline )) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
#define portHAS_STACK_OVERFLOW_CHECKING 1 #define portHAS_STACK_OVERFLOW_CHECKING 1
#define portDONT_DISCARD __attribute__(( used )) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Extern declarations. * @brief Extern declarations.
*/ */
extern BaseType_t xPortIsInsideInterrupt( void ); extern BaseType_t xPortIsInsideInterrupt( void );
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief MPU specific constants. * @brief MPU specific constants.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#else #else
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU regions. */ /* MPU regions. */
#define portPRIVILEGED_FLASH_REGION ( 0UL ) #define portPRIVILEGED_FLASH_REGION ( 0UL )
#define portUNPRIVILEGED_FLASH_REGION ( 1UL ) #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
#define portPRIVILEGED_RAM_REGION ( 3UL ) #define portPRIVILEGED_RAM_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portLAST_CONFIGURABLE_REGION ( 7UL ) #define portLAST_CONFIGURABLE_REGION ( 7UL )
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
/* Device memory attributes used in MPU_MAIR registers. /* Device memory attributes used in MPU_MAIR registers.
* *
@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* 11 --> Device-GRE * 11 --> Device-GRE
* Bit[1:0] - 00, Reserved. * Bit[1:0] - 00, Reserved.
*/ */
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
/* Normal memory attributes used in MPU_MAIR registers. */ /* Normal memory attributes used in MPU_MAIR registers. */
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
/* Attributes used in MPU_RBAR registers. */ /* Attributes used in MPU_RBAR registers. */
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
#define portMPU_REGION_EXECUTE_NEVER ( 1UL ) #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Settings to define an MPU region. * @brief Settings to define an MPU region.
*/ */
typedef struct MPURegionSettings typedef struct MPURegionSettings
{ {
uint32_t ulRBAR; /**< RBAR for the region. */ uint32_t ulRBAR; /**< RBAR for the region. */
uint32_t ulRLAR; /**< RLAR for the region. */ uint32_t ulRLAR; /**< RLAR for the region. */
} MPURegionSettings_t; } MPURegionSettings_t;
/** /**
* @brief MPU settings as stored in the TCB. * @brief MPU settings as stored in the TCB.
*/ */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
} xMPU_SETTINGS; } xMPU_SETTINGS;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief SVC numbers. * @brief SVC numbers.
*/ */
#define portSVC_ALLOCATE_SECURE_CONTEXT 0 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
#define portSVC_FREE_SECURE_CONTEXT 1 #define portSVC_FREE_SECURE_CONTEXT 1
#define portSVC_START_SCHEDULER 2 #define portSVC_START_SCHEDULER 2
#define portSVC_RAISE_PRIVILEGE 3 #define portSVC_RAISE_PRIVILEGE 3
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Scheduler utilities. * @brief Scheduler utilities.
*/ */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Tickless idle/low power functionality. * @brief Tickless idle/low power functionality.
*/ */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Task function macros as described on the FreeRTOS.org WEB site. * @brief Task function macros as described on the FreeRTOS.org WEB site.
*/ */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
/**
* @brief Allocate a secure context for the task.
*
* Tasks are not created with a secure context. Any task that is going to call
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
* secure context before it calls any secure function.
*
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
*/
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
/** /**
* @brief Called when a task is deleted to delete the task's secure context, * @brief Allocate a secure context for the task.
* if it has one. *
* * Tasks are not created with a secure context. Any task that is going to call
* @param[in] pxTCB The TCB of the task being deleted. * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
*/ * secure context before it calls any secure function.
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) *
#else * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) */
#define portCLEAN_UP_TCB( pxTCB ) #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
#endif /* configENABLE_TRUSTZONE */
/**
* @brief Called when a task is deleted to delete the task's secure context,
* if it has one.
*
* @param[in] pxTCB The TCB of the task being deleted.
*/
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
#else
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
#define portCLEAN_UP_TCB( pxTCB )
#endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
/**
* @brief Checks whether or not the processor is privileged.
*
* @return 1 if the processor is already privileged, 0 otherwise.
*/
#define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Checks whether or not the processor is privileged.
* *
* The SVC handler checks that the SVC was raised from a system call and only * @return 1 if the processor is already privileged, 0 otherwise.
* then it raises the privilege. If this is called from any other place, */
* the privilege is not raised. #define portIS_PRIVILEGED() xIsPrivileged()
*/
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Raise an SVC request to raise privilege.
* register. *
*/ * The SVC handler checks that the SVC was raised from a system call and only
#define portRESET_PRIVILEGE() vResetPrivilege() * then it raises the privilege. If this is called from any other place,
#else * the privilege is not raised.
#define portIS_PRIVILEGED() */
#define portRAISE_PRIVILEGE() #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */ /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register.
*/
#define portRESET_PRIVILEGE() vResetPrivilege()
#else
#define portIS_PRIVILEGED()
#define portRAISE_PRIVILEGE()
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Barriers. * @brief Barriers.
*/ */
#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -41,370 +41,370 @@
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r3, [r2] \n" /* Read pxCurrentTCB. */ " ldr r3, [r2] \n"/* Read pxCurrentTCB. */
" ldr r0, [r3] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " ldr r0, [r3] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" dmb \n" /* Complete outstanding transfers before disabling MPU. */ " dmb \n"/* Complete outstanding transfers before disabling MPU. */
" ldr r2, xMPUCTRLConst2 \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" bic r4, #1 \n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
" str r4, [r2] \n" /* Disable MPU. */ " str r4, [r2] \n"/* Disable MPU. */
" \n" " \n"
" adds r3, #4 \n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
" ldr r4, [r3] \n" /* r4 = *r3 i.e. r4 = MAIR0. */ " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */
" ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
" str r4, [r2] \n" /* Program MAIR0. */ " str r4, [r2] \n"/* Program MAIR0. */
" ldr r2, xRNRConst2 \n" /* r2 = 0xe000ed98 [Location of RNR]. */ " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
" movs r4, #4 \n" /* r4 = 4. */ " movs r4, #4 \n"/* r4 = 4. */
" str r4, [r2] \n" /* Program RNR = 4. */ " str r4, [r2] \n"/* Program RNR = 4. */
" adds r3, #4 \n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
" ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ " ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
" ldmia r3!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ " ldmia r3!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
" stmia r2!, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
" \n" " \n"
" ldr r2, xMPUCTRLConst2 \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" orr r4, #1 \n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
" str r4, [r2] \n" /* Enable MPU. */ " str r4, [r2] \n"/* Enable MPU. */
" dsb \n" /* Force memory writes before continuing. */ " dsb \n"/* Force memory writes before continuing. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldm r0!, {r1-r4} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */ " ldm r0!, {r1-r4} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = EXC_RETURN. */
" ldr r5, xSecureContextConst2 \n" " ldr r5, xSecureContextConst2 \n"
" str r1, [r5] \n" /* Set xSecureContext to this task's value for the same. */ " str r1, [r5] \n"/* Set xSecureContext to this task's value for the same. */
" msr psplim, r2 \n" /* Set this task's PSPLIM value. */ " msr psplim, r2 \n"/* Set this task's PSPLIM value. */
" msr control, r3 \n" /* Set this task's CONTROL value. */ " msr control, r3 \n"/* Set this task's CONTROL value. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n"/* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
" bx r4 \n" /* Finally, branch to EXC_RETURN. */ " bx r4 \n"/* Finally, branch to EXC_RETURN. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */
" ldr r4, xSecureContextConst2 \n" " ldr r4, xSecureContextConst2 \n"
" str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ " str r1, [r4] \n"/* Set xSecureContext to this task's value for the same. */
" msr psplim, r2 \n" /* Set this task's PSPLIM value. */ " msr psplim, r2 \n"/* Set this task's PSPLIM value. */
" movs r1, #2 \n" /* r1 = 2. */ " movs r1, #2 \n"/* r1 = 2. */
" msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n"/* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
" bx r3 \n" /* Finally, branch to EXC_RETURN. */ " bx r3 \n"/* Finally, branch to EXC_RETURN. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"pxCurrentTCBConst2: .word pxCurrentTCB \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n"
"xSecureContextConst2: .word xSecureContext \n" "xSecureContextConst2: .word xSecureContext \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
"xMPUCTRLConst2: .word 0xe000ed94 \n" "xMPUCTRLConst2: .word 0xe000ed94 \n"
"xMAIR0Const2: .word 0xe000edc0 \n" "xMAIR0Const2: .word 0xe000edc0 \n"
"xRNRConst2: .word 0xe000ed98 \n" "xRNRConst2: .word 0xe000ed98 \n"
"xRBARConst2: .word 0xe000ed9c \n" "xRBARConst2: .word 0xe000ed9c \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* r0 = CONTROL. */ " mrs r0, control \n"/* r0 = CONTROL. */
" tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
" ite ne \n" " ite ne \n"
" movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
" moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
::: "r0", "memory" ::: "r0", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* Read the CONTROL register. */ " mrs r0, control \n"/* Read the CONTROL register. */
" bic r0, #1 \n" /* Clear the bit 0. */ " bic r0, #1 \n"/* Clear the bit 0. */
" msr control, r0 \n" /* Write back the new CONTROL value. */ " msr control, r0 \n"/* Write back the new CONTROL value. */
" bx lr \n" /* Return to the caller. */ " bx lr \n"/* Return to the caller. */
::: "r0", "memory" ::: "r0", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vResetPrivilege( void ) /* __attribute__ (( naked )) */ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* r0 = CONTROL. */ " mrs r0, control \n"/* r0 = CONTROL. */
" orr r0, #1 \n" /* r0 = r0 | 1. */ " orr r0, #1 \n"/* r0 = r0 | 1. */
" msr control, r0 \n" /* CONTROL = r0. */ " msr control, r0 \n"/* CONTROL = r0. */
" bx lr \n" /* Return to the caller. */ " bx lr \n"/* Return to the caller. */
:::"r0", "memory" ::: "r0", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
" ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
" ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
" msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */
" cpsie i \n" /* Globally enable interrupts. */ " cpsie i \n"/* Globally enable interrupts. */
" cpsie f \n" " cpsie f \n"
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" svc %0 \n" /* System call to start the first task. */ " svc %0 \n"/* System call to start the first task. */
" nop \n" " nop \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"xVTORConst: .word 0xe000ed08 \n" "xVTORConst: .word 0xe000ed08 \n"
:: "i" ( portSVC_START_SCHEDULER ) : "memory" ::"i" ( portSVC_START_SCHEDULER ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */
" mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
" msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
:: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" msr basepri, r0 \n" /* basepri = ulMask. */ " msr basepri, r0 \n"/* basepri = ulMask. */
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
::: "memory" ::: "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" .extern SecureContext_SaveContext \n" " .extern SecureContext_SaveContext \n"
" .extern SecureContext_LoadContext \n" " .extern SecureContext_LoadContext \n"
" \n" " \n"
" mrs r1, psp \n" /* Read PSP in r1. */ " mrs r1, psp \n"/* Read PSP in r1. */
" ldr r2, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
" ldr r0, [r2] \n" /* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */ " ldr r0, [r2] \n"/* Read xSecureContext - Value of xSecureContext must be in r0 as it is used as a parameter later. */
" \n" " \n"
" cbz r0, save_ns_context \n" /* No secure context to save. */ " cbz r0, save_ns_context \n"/* No secure context to save. */
" push {r0-r2, r14} \n" " push {r0-r2, r14} \n"
" bl SecureContext_SaveContext \n" " bl SecureContext_SaveContext \n"
" pop {r0-r3} \n" /* LR is now in r3. */ " pop {r0-r3} \n"/* LR is now in r3. */
" mov lr, r3 \n" /* LR = r3. */ " mov lr, r3 \n"/* LR = r3. */
" lsls r2, r3, #25 \n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bpl save_ns_context \n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ " bpl save_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
" ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r2, [r3] \n" /* Read pxCurrentTCB. */ " ldr r2, [r3] \n"/* Read pxCurrentTCB. */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" subs r1, r1, #16 \n" /* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */ " subs r1, r1, #16 \n"/* Make space for xSecureContext, PSPLIM, CONTROL and LR on the stack. */
" str r1, [r2] \n" /* Save the new top of stack in TCB. */ " str r1, [r2] \n"/* Save the new top of stack in TCB. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mrs r3, control \n" /* r3 = CONTROL. */ " mrs r3, control \n"/* r3 = CONTROL. */
" mov r4, lr \n" /* r4 = LR/EXC_RETURN. */ " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */
" stmia r1!, {r0, r2-r4} \n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ " stmia r1!, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" subs r1, r1, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ " subs r1, r1, #12 \n"/* Make space for xSecureContext, PSPLIM and LR on the stack. */
" str r1, [r2] \n" /* Save the new top of stack in TCB. */ " str r1, [r2] \n"/* Save the new top of stack in TCB. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
" stmia r1!, {r0, r2-r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" b select_next_task \n" " b select_next_task \n"
" \n" " \n"
" save_ns_context: \n" " save_ns_context: \n"
" ldr r3, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r3, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r2, [r3] \n" /* Read pxCurrentTCB. */ " ldr r2, [r3] \n"/* Read pxCurrentTCB. */
#if( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
" it eq \n" " it eq \n"
" vstmdbeq r1!, {s16-s31} \n" /* Store the FPU registers which are not saved automatically. */ " vstmdbeq r1!, {s16-s31} \n"/* Store the FPU registers which are not saved automatically. */
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" subs r1, r1, #48 \n" /* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */ " subs r1, r1, #48 \n"/* Make space for xSecureContext, PSPLIM, CONTROL, LR and the remaining registers on the stack. */
" str r1, [r2] \n" /* Save the new top of stack in TCB. */ " str r1, [r2] \n"/* Save the new top of stack in TCB. */
" adds r1, r1, #16 \n" /* r1 = r1 + 16. */ " adds r1, r1, #16 \n"/* r1 = r1 + 16. */
" stm r1, {r4-r11} \n" /* Store the registers that are not saved automatically. */ " stm r1, {r4-r11} \n"/* Store the registers that are not saved automatically. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mrs r3, control \n" /* r3 = CONTROL. */ " mrs r3, control \n"/* r3 = CONTROL. */
" mov r4, lr \n" /* r4 = LR/EXC_RETURN. */ " mov r4, lr \n"/* r4 = LR/EXC_RETURN. */
" subs r1, r1, #16 \n" /* r1 = r1 - 16. */ " subs r1, r1, #16 \n"/* r1 = r1 - 16. */
" stm r1, {r0, r2-r4} \n" /* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */ " stm r1, {r0, r2-r4} \n"/* Store xSecureContext, PSPLIM, CONTROL and LR on the stack. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" subs r1, r1, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ " subs r1, r1, #44 \n"/* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */
" str r1, [r2] \n" /* Save the new top of stack in TCB. */ " str r1, [r2] \n"/* Save the new top of stack in TCB. */
" adds r1, r1, #12 \n" /* r1 = r1 + 12. */ " adds r1, r1, #12 \n"/* r1 = r1 + 12. */
" stm r1, {r4-r11} \n" /* Store the registers that are not saved automatically. */ " stm r1, {r4-r11} \n"/* Store the registers that are not saved automatically. */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
" subs r1, r1, #12 \n" /* r1 = r1 - 12. */ " subs r1, r1, #12 \n"/* r1 = r1 - 12. */
" stmia r1!, {r0, r2-r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ " stmia r1!, {r0, r2-r3} \n"/* Store xSecureContext, PSPLIM and LR on the stack. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" select_next_task: \n" " select_next_task: \n"
" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
" msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" bl vTaskSwitchContext \n" " bl vTaskSwitchContext \n"
" mov r0, #0 \n" /* r0 = 0. */ " mov r0, #0 \n"/* r0 = 0. */
" msr basepri, r0 \n" /* Enable interrupts. */ " msr basepri, r0 \n"/* Enable interrupts. */
" \n" " \n"
" ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r3, [r2] \n" /* Read pxCurrentTCB. */ " ldr r3, [r2] \n"/* Read pxCurrentTCB. */
" ldr r1, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */ " ldr r1, [r3] \n"/* The first item in pxCurrentTCB is the task top of stack. r1 now points to the top of stack. */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" dmb \n" /* Complete outstanding transfers before disabling MPU. */ " dmb \n"/* Complete outstanding transfers before disabling MPU. */
" ldr r2, xMPUCTRLConst \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" bic r4, #1 \n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
" str r4, [r2] \n" /* Disable MPU. */ " str r4, [r2] \n"/* Disable MPU. */
" \n" " \n"
" adds r3, #4 \n" /* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */ " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to MAIR0 in TCB. */
" ldr r4, [r3] \n" /* r4 = *r3 i.e. r4 = MAIR0. */ " ldr r4, [r3] \n"/* r4 = *r3 i.e. r4 = MAIR0. */
" ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ " ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
" str r4, [r2] \n" /* Program MAIR0. */ " str r4, [r2] \n"/* Program MAIR0. */
" ldr r2, xRNRConst \n" /* r2 = 0xe000ed98 [Location of RNR]. */ " ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
" movs r4, #4 \n" /* r4 = 4. */ " movs r4, #4 \n"/* r4 = 4. */
" str r4, [r2] \n" /* Program RNR = 4. */ " str r4, [r2] \n"/* Program RNR = 4. */
" adds r3, #4 \n" /* r3 = r3 + 4. r3 now points to first RBAR in TCB. */ " adds r3, #4 \n"/* r3 = r3 + 4. r3 now points to first RBAR in TCB. */
" ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ " ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
" ldmia r3!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ " ldmia r3!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
" stmia r2!, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
" \n" " \n"
" ldr r2, xMPUCTRLConst \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" orr r4, #1 \n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
" str r4, [r2] \n" /* Enable MPU. */ " str r4, [r2] \n"/* Enable MPU. */
" dsb \n" /* Force memory writes before continuing. */ " dsb \n"/* Force memory writes before continuing. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldmia r1!, {r0, r2-r4} \n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */ " ldmia r1!, {r0, r2-r4} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM, r3 = CONTROL and r4 = LR. */
" msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */
" msr control, r3 \n" /* Restore the CONTROL register value for the task. */ " msr control, r3 \n"/* Restore the CONTROL register value for the task. */
" mov lr, r4 \n" /* LR = r4. */ " mov lr, r4 \n"/* LR = r4. */
" ldr r2, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
" str r0, [r2] \n" /* Restore the task's xSecureContext. */ " str r0, [r2] \n"/* Restore the task's xSecureContext. */
" cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */
" push {r1,r4} \n" " push {r1,r4} \n"
" bl SecureContext_LoadContext \n" /* Restore the secure context. */ " bl SecureContext_LoadContext \n"/* Restore the secure context. */
" pop {r1,r4} \n" " pop {r1,r4} \n"
" mov lr, r4 \n" /* LR = r4. */ " mov lr, r4 \n"/* LR = r4. */
" lsls r2, r4, #25 \n" /* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ " lsls r2, r4, #25 \n"/* r2 = r4 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
" msr psp, r1 \n" /* Remember the new top of stack for the task. */ " msr psp, r1 \n"/* Remember the new top of stack for the task. */
" bx lr \n" " bx lr \n"
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" ldmia r1!, {r0, r2-r3} \n" /* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */ " ldmia r1!, {r0, r2-r3} \n"/* Read from stack - r0 = xSecureContext, r2 = PSPLIM and r3 = LR. */
" msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */
" mov lr, r3 \n" /* LR = r3. */ " mov lr, r3 \n"/* LR = r3. */
" ldr r2, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " ldr r2, xSecureContextConst \n"/* Read the location of xSecureContext i.e. &( xSecureContext ). */
" str r0, [r2] \n" /* Restore the task's xSecureContext. */ " str r0, [r2] \n"/* Restore the task's xSecureContext. */
" cbz r0, restore_ns_context \n" /* If there is no secure context for the task, restore the non-secure context. */ " cbz r0, restore_ns_context \n"/* If there is no secure context for the task, restore the non-secure context. */
" push {r1,r3} \n" " push {r1,r3} \n"
" bl SecureContext_LoadContext \n" /* Restore the secure context. */ " bl SecureContext_LoadContext \n"/* Restore the secure context. */
" pop {r1,r3} \n" " pop {r1,r3} \n"
" mov lr, r3 \n" /* LR = r3. */ " mov lr, r3 \n"/* LR = r3. */
" lsls r2, r3, #25 \n" /* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */ " lsls r2, r3, #25 \n"/* r2 = r3 << 25. Bit[6] of EXC_RETURN is 1 if secure stack was used, 0 if non-secure stack was used to store stack frame. */
" bpl restore_ns_context \n" /* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */ " bpl restore_ns_context \n"/* bpl - branch if positive or zero. If r2 >= 0 ==> Bit[6] in EXC_RETURN is 0 i.e. non-secure stack was used. */
" msr psp, r1 \n" /* Remember the new top of stack for the task. */ " msr psp, r1 \n"/* Remember the new top of stack for the task. */
" bx lr \n" " bx lr \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" restore_ns_context: \n" " restore_ns_context: \n"
" ldmia r1!, {r4-r11} \n" /* Restore the registers that are not automatically restored. */ " ldmia r1!, {r4-r11} \n"/* Restore the registers that are not automatically restored. */
#if( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
" it eq \n" " it eq \n"
" vldmiaeq r1!, {s16-s31} \n" /* Restore the FPU registers which are not restored automatically. */ " vldmiaeq r1!, {s16-s31} \n"/* Restore the FPU registers which are not restored automatically. */
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
" msr psp, r1 \n" /* Remember the new top of stack for the task. */ " msr psp, r1 \n"/* Remember the new top of stack for the task. */
" bx lr \n" " bx lr \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"pxCurrentTCBConst: .word pxCurrentTCB \n" "pxCurrentTCBConst: .word pxCurrentTCB \n"
"xSecureContextConst: .word xSecureContext \n" "xSecureContextConst: .word xSecureContext \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
"xMPUCTRLConst: .word 0xe000ed94 \n" "xMPUCTRLConst: .word 0xe000ed94 \n"
"xMAIR0Const: .word 0xe000edc0 \n" "xMAIR0Const: .word 0xe000edc0 \n"
"xRNRConst: .word 0xe000ed98 \n" "xRNRConst: .word 0xe000ed98 \n"
"xRBARConst: .word 0xe000ed9c \n" "xRBARConst: .word 0xe000ed9c \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
:: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" tst lr, #4 \n" " tst lr, #4 \n"
" ite eq \n" " ite eq \n"
" mrseq r0, msp \n" " mrseq r0, msp \n"
" mrsne r0, psp \n" " mrsne r0, psp \n"
" ldr r1, svchandler_address_const \n" " ldr r1, svchandler_address_const \n"
" bx r1 \n" " bx r1 \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"svchandler_address_const: .word vPortSVCHandler_C \n" "svchandler_address_const: .word vPortSVCHandler_C \n"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" svc %0 \n" /* Secure context is allocated in the supervisor call. */ " svc %0 \n"/* Secure context is allocated in the supervisor call. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
:: "i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory" ::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" ldr r1, [r0] \n" /* The first item in the TCB is the top of the stack. */ " ldr r1, [r0] \n"/* The first item in the TCB is the top of the stack. */
" ldr r0, [r1] \n" /* The first item on the stack is the task's xSecureContext. */ " ldr r0, [r1] \n"/* The first item on the stack is the task's xSecureContext. */
" cmp r0, #0 \n" /* Raise svc if task's xSecureContext is not NULL. */ " cmp r0, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */
" it ne \n" " it ne \n"
" svcne %0 \n" /* Secure context is freed in the supervisor call. */ " svcne %0 \n"/* Secure context is freed in the supervisor call. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
:: "i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory" ::"i" ( portSVC_FREE_SECURE_CONTEXT ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,18 +19,18 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -42,109 +42,109 @@ extern "C" {
*------------------------------------------------------------------------------ *------------------------------------------------------------------------------
*/ */
#ifndef configENABLE_FPU #ifndef configENABLE_FPU
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#ifndef configENABLE_MPU #ifndef configENABLE_MPU
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#ifndef configENABLE_TRUSTZONE #ifndef configENABLE_TRUSTZONE
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Type definitions. * @brief Type definitions.
*/ */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* Architecture specifics. * Architecture specifics.
*/ */
#define portARCH_NAME "Cortex-M33" #define portARCH_NAME "Cortex-M33"
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__(( always_inline )) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
#define portHAS_STACK_OVERFLOW_CHECKING 1 #define portHAS_STACK_OVERFLOW_CHECKING 1
#define portDONT_DISCARD __attribute__(( used )) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Extern declarations. * @brief Extern declarations.
*/ */
extern BaseType_t xPortIsInsideInterrupt( void ); extern BaseType_t xPortIsInsideInterrupt( void );
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief MPU specific constants. * @brief MPU specific constants.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#else #else
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU regions. */ /* MPU regions. */
#define portPRIVILEGED_FLASH_REGION ( 0UL ) #define portPRIVILEGED_FLASH_REGION ( 0UL )
#define portUNPRIVILEGED_FLASH_REGION ( 1UL ) #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
#define portPRIVILEGED_RAM_REGION ( 3UL ) #define portPRIVILEGED_RAM_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portLAST_CONFIGURABLE_REGION ( 7UL ) #define portLAST_CONFIGURABLE_REGION ( 7UL )
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
/* Device memory attributes used in MPU_MAIR registers. /* Device memory attributes used in MPU_MAIR registers.
* *
@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* 11 --> Device-GRE * 11 --> Device-GRE
* Bit[1:0] - 00, Reserved. * Bit[1:0] - 00, Reserved.
*/ */
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
/* Normal memory attributes used in MPU_MAIR registers. */ /* Normal memory attributes used in MPU_MAIR registers. */
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
/* Attributes used in MPU_RBAR registers. */ /* Attributes used in MPU_RBAR registers. */
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
#define portMPU_REGION_EXECUTE_NEVER ( 1UL ) #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Settings to define an MPU region. * @brief Settings to define an MPU region.
*/ */
typedef struct MPURegionSettings typedef struct MPURegionSettings
{ {
uint32_t ulRBAR; /**< RBAR for the region. */ uint32_t ulRBAR; /**< RBAR for the region. */
uint32_t ulRLAR; /**< RLAR for the region. */ uint32_t ulRLAR; /**< RLAR for the region. */
} MPURegionSettings_t; } MPURegionSettings_t;
/** /**
* @brief MPU settings as stored in the TCB. * @brief MPU settings as stored in the TCB.
*/ */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
} xMPU_SETTINGS; } xMPU_SETTINGS;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief SVC numbers. * @brief SVC numbers.
*/ */
#define portSVC_ALLOCATE_SECURE_CONTEXT 0 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
#define portSVC_FREE_SECURE_CONTEXT 1 #define portSVC_FREE_SECURE_CONTEXT 1
#define portSVC_START_SCHEDULER 2 #define portSVC_START_SCHEDULER 2
#define portSVC_RAISE_PRIVILEGE 3 #define portSVC_RAISE_PRIVILEGE 3
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Scheduler utilities. * @brief Scheduler utilities.
*/ */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
#define portDISABLE_INTERRUPTS() ulSetInterruptMask() #define portDISABLE_INTERRUPTS() ulSetInterruptMask()
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Tickless idle/low power functionality. * @brief Tickless idle/low power functionality.
*/ */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Task function macros as described on the FreeRTOS.org WEB site. * @brief Task function macros as described on the FreeRTOS.org WEB site.
*/ */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
/**
* @brief Allocate a secure context for the task.
*
* Tasks are not created with a secure context. Any task that is going to call
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
* secure context before it calls any secure function.
*
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
*/
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
/** /**
* @brief Called when a task is deleted to delete the task's secure context, * @brief Allocate a secure context for the task.
* if it has one. *
* * Tasks are not created with a secure context. Any task that is going to call
* @param[in] pxTCB The TCB of the task being deleted. * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
*/ * secure context before it calls any secure function.
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) *
#else * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) */
#define portCLEAN_UP_TCB( pxTCB ) #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
#endif /* configENABLE_TRUSTZONE */
/**
* @brief Called when a task is deleted to delete the task's secure context,
* if it has one.
*
* @param[in] pxTCB The TCB of the task being deleted.
*/
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
#else
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
#define portCLEAN_UP_TCB( pxTCB )
#endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
/**
* @brief Checks whether or not the processor is privileged.
*
* @return 1 if the processor is already privileged, 0 otherwise.
*/
#define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Checks whether or not the processor is privileged.
* *
* The SVC handler checks that the SVC was raised from a system call and only * @return 1 if the processor is already privileged, 0 otherwise.
* then it raises the privilege. If this is called from any other place, */
* the privilege is not raised. #define portIS_PRIVILEGED() xIsPrivileged()
*/
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Raise an SVC request to raise privilege.
* register. *
*/ * The SVC handler checks that the SVC was raised from a system call and only
#define portRESET_PRIVILEGE() vResetPrivilege() * then it raises the privilege. If this is called from any other place,
#else * the privilege is not raised.
#define portIS_PRIVILEGED() */
#define portRAISE_PRIVILEGE() #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */ /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register.
*/
#define portRESET_PRIVILEGE() vResetPrivilege()
#else
#define portIS_PRIVILEGED()
#define portRAISE_PRIVILEGE()
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Barriers. * @brief Barriers.
*/ */
#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -41,276 +41,276 @@
void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vRestoreContextOfFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" ldr r2, pxCurrentTCBConst2 \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst2 \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n"/* Read pxCurrentTCB. */
" ldr r0, [r1] \n" /* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */ " ldr r0, [r1] \n"/* Read top of stack from TCB - The first item in pxCurrentTCB is the task top of stack. */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" dmb \n" /* Complete outstanding transfers before disabling MPU. */ " dmb \n"/* Complete outstanding transfers before disabling MPU. */
" ldr r2, xMPUCTRLConst2 \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" bic r4, #1 \n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
" str r4, [r2] \n" /* Disable MPU. */ " str r4, [r2] \n"/* Disable MPU. */
" \n" " \n"
" adds r1, #4 \n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
" ldr r3, [r1] \n" /* r3 = *r1 i.e. r3 = MAIR0. */ " ldr r3, [r1] \n"/* r3 = *r1 i.e. r3 = MAIR0. */
" ldr r2, xMAIR0Const2 \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ " ldr r2, xMAIR0Const2 \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
" str r3, [r2] \n" /* Program MAIR0. */ " str r3, [r2] \n"/* Program MAIR0. */
" ldr r2, xRNRConst2 \n" /* r2 = 0xe000ed98 [Location of RNR]. */ " ldr r2, xRNRConst2 \n"/* r2 = 0xe000ed98 [Location of RNR]. */
" movs r3, #4 \n" /* r3 = 4. */ " movs r3, #4 \n"/* r3 = 4. */
" str r3, [r2] \n" /* Program RNR = 4. */ " str r3, [r2] \n"/* Program RNR = 4. */
" adds r1, #4 \n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
" ldr r2, xRBARConst2 \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ " ldr r2, xRBARConst2 \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
" ldmia r1!, {r4-r11} \n" /* Read 4 set of RBAR/RLAR registers from TCB. */ " ldmia r1!, {r4-r11} \n"/* Read 4 set of RBAR/RLAR registers from TCB. */
" stmia r2!, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
" \n" " \n"
" ldr r2, xMPUCTRLConst2 \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst2 \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" orr r4, #1 \n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
" str r4, [r2] \n" /* Enable MPU. */ " str r4, [r2] \n"/* Enable MPU. */
" dsb \n" /* Force memory writes before continuing. */ " dsb \n"/* Force memory writes before continuing. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldm r0!, {r1-r3} \n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */ " ldm r0!, {r1-r3} \n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL and r3 = EXC_RETURN. */
" msr psplim, r1 \n" /* Set this task's PSPLIM value. */ " msr psplim, r1 \n"/* Set this task's PSPLIM value. */
" msr control, r2 \n" /* Set this task's CONTROL value. */ " msr control, r2 \n"/* Set this task's CONTROL value. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n"/* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
" bx r3 \n" /* Finally, branch to EXC_RETURN. */ " bx r3 \n"/* Finally, branch to EXC_RETURN. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" ldm r0!, {r1-r2} \n" /* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */ " ldm r0!, {r1-r2} \n"/* Read from stack - r1 = PSPLIM and r2 = EXC_RETURN. */
" msr psplim, r1 \n" /* Set this task's PSPLIM value. */ " msr psplim, r1 \n"/* Set this task's PSPLIM value. */
" movs r1, #2 \n" /* r1 = 2. */ " movs r1, #2 \n"/* r1 = 2. */
" msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " msr CONTROL, r1 \n"/* Switch to use PSP in the thread mode. */
" adds r0, #32 \n" /* Discard everything up to r0. */ " adds r0, #32 \n"/* Discard everything up to r0. */
" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */ " msr psp, r0 \n"/* This is now the new top of stack to use in the task. */
" isb \n" " isb \n"
" bx r2 \n" /* Finally, branch to EXC_RETURN. */ " bx r2 \n"/* Finally, branch to EXC_RETURN. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"pxCurrentTCBConst2: .word pxCurrentTCB \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
"xMPUCTRLConst2: .word 0xe000ed94 \n" "xMPUCTRLConst2: .word 0xe000ed94 \n"
"xMAIR0Const2: .word 0xe000edc0 \n" "xMAIR0Const2: .word 0xe000edc0 \n"
"xRNRConst2: .word 0xe000ed98 \n" "xRNRConst2: .word 0xe000ed98 \n"
"xRBARConst2: .word 0xe000ed9c \n" "xRBARConst2: .word 0xe000ed9c \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* r0 = CONTROL. */ " mrs r0, control \n"/* r0 = CONTROL. */
" tst r0, #1 \n" /* Perform r0 & 1 (bitwise AND) and update the conditions flag. */ " tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
" ite ne \n" " ite ne \n"
" movne r0, #0 \n" /* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */ " movne r0, #0 \n"/* CONTROL[0]!=0. Return false to indicate that the processor is not privileged. */
" moveq r0, #1 \n" /* CONTROL[0]==0. Return true to indicate that the processor is privileged. */ " moveq r0, #1 \n"/* CONTROL[0]==0. Return true to indicate that the processor is privileged. */
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
" \n" " \n"
" .align 4 \n" " .align 4 \n"
::: "r0", "memory" ::: "r0", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* Read the CONTROL register. */ " mrs r0, control \n"/* Read the CONTROL register. */
" bic r0, #1 \n" /* Clear the bit 0. */ " bic r0, #1 \n"/* Clear the bit 0. */
" msr control, r0 \n" /* Write back the new CONTROL value. */ " msr control, r0 \n"/* Write back the new CONTROL value. */
" bx lr \n" /* Return to the caller. */ " bx lr \n"/* Return to the caller. */
::: "r0", "memory" ::: "r0", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vResetPrivilege( void ) /* __attribute__ (( naked )) */ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
{ {
__asm volatile __asm volatile
( (
" mrs r0, control \n" /* r0 = CONTROL. */ " mrs r0, control \n"/* r0 = CONTROL. */
" orr r0, #1 \n" /* r0 = r0 | 1. */ " orr r0, #1 \n"/* r0 = r0 | 1. */
" msr control, r0 \n" /* CONTROL = r0. */ " msr control, r0 \n"/* CONTROL = r0. */
" bx lr \n" /* Return to the caller. */ " bx lr \n"/* Return to the caller. */
:::"r0", "memory" ::: "r0", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" ldr r0, xVTORConst \n" /* Use the NVIC offset register to locate the stack. */ " ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
" ldr r0, [r0] \n" /* Read the VTOR register which gives the address of vector table. */ " ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
" ldr r0, [r0] \n" /* The first entry in vector table is stack pointer. */ " ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
" msr msp, r0 \n" /* Set the MSP back to the start of the stack. */ " msr msp, r0 \n"/* Set the MSP back to the start of the stack. */
" cpsie i \n" /* Globally enable interrupts. */ " cpsie i \n"/* Globally enable interrupts. */
" cpsie f \n" " cpsie f \n"
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" svc %0 \n" /* System call to start the first task. */ " svc %0 \n"/* System call to start the first task. */
" nop \n" " nop \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"xVTORConst: .word 0xe000ed08 \n" "xVTORConst: .word 0xe000ed08 \n"
:: "i" ( portSVC_START_SCHEDULER ) : "memory" ::"i" ( portSVC_START_SCHEDULER ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" mrs r0, basepri \n" /* r0 = basepri. Return original basepri value. */ " mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */
" mov r1, %0 \n" /* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
" msr basepri, r1 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
:: "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" msr basepri, r0 \n" /* basepri = ulMask. */ " msr basepri, r0 \n"/* basepri = ulMask. */
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" bx lr \n" /* Return. */ " bx lr \n"/* Return. */
::: "memory" ::: "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void PendSV_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" mrs r0, psp \n" /* Read PSP in r0. */ " mrs r0, psp \n"/* Read PSP in r0. */
#if( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
" tst lr, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ " tst lr, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
" it eq \n" " it eq \n"
" vstmdbeq r0!, {s16-s31} \n" /* Store the FPU registers which are not saved automatically. */ " vstmdbeq r0!, {s16-s31} \n"/* Store the FPU registers which are not saved automatically. */
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" mrs r1, psplim \n" /* r1 = PSPLIM. */ " mrs r1, psplim \n"/* r1 = PSPLIM. */
" mrs r2, control \n" /* r2 = CONTROL. */ " mrs r2, control \n"/* r2 = CONTROL. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
" stmdb r0!, {r1-r11} \n" /* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */ " stmdb r0!, {r1-r11} \n"/* Store on the stack - PSPLIM, CONTROL, LR and registers that are not automatically saved. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" mrs r2, psplim \n" /* r2 = PSPLIM. */ " mrs r2, psplim \n"/* r2 = PSPLIM. */
" mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " mov r3, lr \n"/* r3 = LR/EXC_RETURN. */
" stmdb r0!, {r2-r11} \n" /* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */ " stmdb r0!, {r2-r11} \n"/* Store on the stack - PSPLIM, LR and registers that are not automatically saved. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
" ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n"/* Read pxCurrentTCB. */
" str r0, [r1] \n" /* Save the new top of stack in TCB. */ " str r0, [r1] \n"/* Save the new top of stack in TCB. */
" \n" " \n"
" mov r0, %0 \n" /* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */ " mov r0, %0 \n"/* r0 = configMAX_SYSCALL_INTERRUPT_PRIORITY */
" msr basepri, r0 \n" /* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */ " msr basepri, r0 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
" dsb \n" " dsb \n"
" isb \n" " isb \n"
" bl vTaskSwitchContext \n" " bl vTaskSwitchContext \n"
" mov r0, #0 \n" /* r0 = 0. */ " mov r0, #0 \n"/* r0 = 0. */
" msr basepri, r0 \n" /* Enable interrupts. */ " msr basepri, r0 \n"/* Enable interrupts. */
" \n" " \n"
" ldr r2, pxCurrentTCBConst \n" /* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */ " ldr r2, pxCurrentTCBConst \n"/* Read the location of pxCurrentTCB i.e. &( pxCurrentTCB ). */
" ldr r1, [r2] \n" /* Read pxCurrentTCB. */ " ldr r1, [r2] \n"/* Read pxCurrentTCB. */
" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */ " ldr r0, [r1] \n"/* The first item in pxCurrentTCB is the task top of stack. r0 now points to the top of stack. */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" dmb \n" /* Complete outstanding transfers before disabling MPU. */ " dmb \n"/* Complete outstanding transfers before disabling MPU. */
" ldr r2, xMPUCTRLConst \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" bic r4, #1 \n" /* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */ " bic r4, #1 \n"/* r4 = r4 & ~1 i.e. Clear the bit 0 in r4. */
" str r4, [r2] \n" /* Disable MPU. */ " str r4, [r2] \n"/* Disable MPU. */
" \n" " \n"
" adds r1, #4 \n" /* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */ " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to MAIR0 in TCB. */
" ldr r3, [r1] \n" /* r3 = *r1 i.e. r3 = MAIR0. */ " ldr r3, [r1] \n"/* r3 = *r1 i.e. r3 = MAIR0. */
" ldr r2, xMAIR0Const \n" /* r2 = 0xe000edc0 [Location of MAIR0]. */ " ldr r2, xMAIR0Const \n"/* r2 = 0xe000edc0 [Location of MAIR0]. */
" str r3, [r2] \n" /* Program MAIR0. */ " str r3, [r2] \n"/* Program MAIR0. */
" ldr r2, xRNRConst \n" /* r2 = 0xe000ed98 [Location of RNR]. */ " ldr r2, xRNRConst \n"/* r2 = 0xe000ed98 [Location of RNR]. */
" movs r3, #4 \n" /* r3 = 4. */ " movs r3, #4 \n"/* r3 = 4. */
" str r3, [r2] \n" /* Program RNR = 4. */ " str r3, [r2] \n"/* Program RNR = 4. */
" adds r1, #4 \n" /* r1 = r1 + 4. r1 now points to first RBAR in TCB. */ " adds r1, #4 \n"/* r1 = r1 + 4. r1 now points to first RBAR in TCB. */
" ldr r2, xRBARConst \n" /* r2 = 0xe000ed9c [Location of RBAR]. */ " ldr r2, xRBARConst \n"/* r2 = 0xe000ed9c [Location of RBAR]. */
" ldmia r1!, {r4-r11} \n" /* Read 4 sets of RBAR/RLAR registers from TCB. */ " ldmia r1!, {r4-r11} \n"/* Read 4 sets of RBAR/RLAR registers from TCB. */
" stmia r2!, {r4-r11} \n" /* Write 4 set of RBAR/RLAR registers using alias registers. */ " stmia r2!, {r4-r11} \n"/* Write 4 set of RBAR/RLAR registers using alias registers. */
" \n" " \n"
" ldr r2, xMPUCTRLConst \n" /* r2 = 0xe000ed94 [Location of MPU_CTRL]. */ " ldr r2, xMPUCTRLConst \n"/* r2 = 0xe000ed94 [Location of MPU_CTRL]. */
" ldr r4, [r2] \n" /* Read the value of MPU_CTRL. */ " ldr r4, [r2] \n"/* Read the value of MPU_CTRL. */
" orr r4, #1 \n" /* r4 = r4 | 1 i.e. Set the bit 0 in r4. */ " orr r4, #1 \n"/* r4 = r4 | 1 i.e. Set the bit 0 in r4. */
" str r4, [r2] \n" /* Enable MPU. */ " str r4, [r2] \n"/* Enable MPU. */
" dsb \n" /* Force memory writes before continuing. */ " dsb \n"/* Force memory writes before continuing. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldmia r0!, {r1-r11} \n" /* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */ " ldmia r0!, {r1-r11} \n"/* Read from stack - r1 = PSPLIM, r2 = CONTROL, r3 = LR and r4-r11 restored. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" ldmia r0!, {r2-r11} \n" /* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */ " ldmia r0!, {r2-r11} \n"/* Read from stack - r2 = PSPLIM, r3 = LR and r4-r11 restored. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" \n" " \n"
#if( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
" tst r3, #0x10 \n" /* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */ " tst r3, #0x10 \n"/* Test Bit[4] in LR. Bit[4] of EXC_RETURN is 0 if the FPU is in use. */
" it eq \n" " it eq \n"
" vldmiaeq r0!, {s16-s31} \n" /* Restore the FPU registers which are not restored automatically. */ " vldmiaeq r0!, {s16-s31} \n"/* Restore the FPU registers which are not restored automatically. */
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
" \n" " \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ " msr psplim, r1 \n"/* Restore the PSPLIM register value for the task. */
" msr control, r2 \n" /* Restore the CONTROL register value for the task. */ " msr control, r2 \n"/* Restore the CONTROL register value for the task. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" msr psplim, r2 \n" /* Restore the PSPLIM register value for the task. */ " msr psplim, r2 \n"/* Restore the PSPLIM register value for the task. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" msr psp, r0 \n" /* Remember the new top of stack for the task. */ " msr psp, r0 \n"/* Remember the new top of stack for the task. */
" bx r3 \n" " bx r3 \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"pxCurrentTCBConst: .word pxCurrentTCB \n" "pxCurrentTCBConst: .word pxCurrentTCB \n"
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
"xMPUCTRLConst: .word 0xe000ed94 \n" "xMPUCTRLConst: .word 0xe000ed94 \n"
"xMAIR0Const: .word 0xe000edc0 \n" "xMAIR0Const: .word 0xe000edc0 \n"
"xRNRConst: .word 0xe000ed98 \n" "xRNRConst: .word 0xe000ed98 \n"
"xRBARConst: .word 0xe000ed9c \n" "xRBARConst: .word 0xe000ed9c \n"
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
:: "i"( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY )
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
{ {
__asm volatile __asm volatile
( (
" tst lr, #4 \n" " tst lr, #4 \n"
" ite eq \n" " ite eq \n"
" mrseq r0, msp \n" " mrseq r0, msp \n"
" mrsne r0, psp \n" " mrsne r0, psp \n"
" ldr r1, svchandler_address_const \n" " ldr r1, svchandler_address_const \n"
" bx r1 \n" " bx r1 \n"
" \n" " \n"
" .align 4 \n" " .align 4 \n"
"svchandler_address_const: .word vPortSVCHandler_C \n" "svchandler_address_const: .word vPortSVCHandler_C \n"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,18 +19,18 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -42,109 +42,109 @@ extern "C" {
*------------------------------------------------------------------------------ *------------------------------------------------------------------------------
*/ */
#ifndef configENABLE_FPU #ifndef configENABLE_FPU
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#ifndef configENABLE_MPU #ifndef configENABLE_MPU
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#ifndef configENABLE_TRUSTZONE #ifndef configENABLE_TRUSTZONE
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Type definitions. * @brief Type definitions.
*/ */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* Architecture specifics. * Architecture specifics.
*/ */
#define portARCH_NAME "Cortex-M33" #define portARCH_NAME "Cortex-M33"
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__(( always_inline )) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
#define portHAS_STACK_OVERFLOW_CHECKING 1 #define portHAS_STACK_OVERFLOW_CHECKING 1
#define portDONT_DISCARD __attribute__(( used )) #define portDONT_DISCARD __attribute__( ( used ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Extern declarations. * @brief Extern declarations.
*/ */
extern BaseType_t xPortIsInsideInterrupt( void ); extern BaseType_t xPortIsInsideInterrupt( void );
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief MPU specific constants. * @brief MPU specific constants.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#else #else
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU regions. */ /* MPU regions. */
#define portPRIVILEGED_FLASH_REGION ( 0UL ) #define portPRIVILEGED_FLASH_REGION ( 0UL )
#define portUNPRIVILEGED_FLASH_REGION ( 1UL ) #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
#define portPRIVILEGED_RAM_REGION ( 3UL ) #define portPRIVILEGED_RAM_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portLAST_CONFIGURABLE_REGION ( 7UL ) #define portLAST_CONFIGURABLE_REGION ( 7UL )
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
/* Device memory attributes used in MPU_MAIR registers. /* Device memory attributes used in MPU_MAIR registers.
* *
@ -156,155 +156,157 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* 11 --> Device-GRE * 11 --> Device-GRE
* Bit[1:0] - 00, Reserved. * Bit[1:0] - 00, Reserved.
*/ */
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
/* Normal memory attributes used in MPU_MAIR registers. */ /* Normal memory attributes used in MPU_MAIR registers. */
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
/* Attributes used in MPU_RBAR registers. */ /* Attributes used in MPU_RBAR registers. */
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
#define portMPU_REGION_EXECUTE_NEVER ( 1UL ) #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Settings to define an MPU region. * @brief Settings to define an MPU region.
*/ */
typedef struct MPURegionSettings typedef struct MPURegionSettings
{ {
uint32_t ulRBAR; /**< RBAR for the region. */ uint32_t ulRBAR; /**< RBAR for the region. */
uint32_t ulRLAR; /**< RLAR for the region. */ uint32_t ulRLAR; /**< RLAR for the region. */
} MPURegionSettings_t; } MPURegionSettings_t;
/** /**
* @brief MPU settings as stored in the TCB. * @brief MPU settings as stored in the TCB.
*/ */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
} xMPU_SETTINGS; } xMPU_SETTINGS;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief SVC numbers. * @brief SVC numbers.
*/ */
#define portSVC_ALLOCATE_SECURE_CONTEXT 0 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
#define portSVC_FREE_SECURE_CONTEXT 1 #define portSVC_FREE_SECURE_CONTEXT 1
#define portSVC_START_SCHEDULER 2 #define portSVC_START_SCHEDULER 2
#define portSVC_RAISE_PRIVILEGE 3 #define portSVC_RAISE_PRIVILEGE 3
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Scheduler utilities. * @brief Scheduler utilities.
*/ */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
#define portDISABLE_INTERRUPTS() ulSetInterruptMask() #define portDISABLE_INTERRUPTS() ulSetInterruptMask()
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Tickless idle/low power functionality. * @brief Tickless idle/low power functionality.
*/ */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Task function macros as described on the FreeRTOS.org WEB site. * @brief Task function macros as described on the FreeRTOS.org WEB site.
*/ */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
/**
* @brief Allocate a secure context for the task.
*
* Tasks are not created with a secure context. Any task that is going to call
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
* secure context before it calls any secure function.
*
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
*/
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
/** /**
* @brief Called when a task is deleted to delete the task's secure context, * @brief Allocate a secure context for the task.
* if it has one. *
* * Tasks are not created with a secure context. Any task that is going to call
* @param[in] pxTCB The TCB of the task being deleted. * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
*/ * secure context before it calls any secure function.
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) *
#else * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) */
#define portCLEAN_UP_TCB( pxTCB ) #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
#endif /* configENABLE_TRUSTZONE */
/**
* @brief Called when a task is deleted to delete the task's secure context,
* if it has one.
*
* @param[in] pxTCB The TCB of the task being deleted.
*/
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
#else
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
#define portCLEAN_UP_TCB( pxTCB )
#endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
/**
* @brief Checks whether or not the processor is privileged.
*
* @return 1 if the processor is already privileged, 0 otherwise.
*/
#define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Checks whether or not the processor is privileged.
* *
* The SVC handler checks that the SVC was raised from a system call and only * @return 1 if the processor is already privileged, 0 otherwise.
* then it raises the privilege. If this is called from any other place, */
* the privilege is not raised. #define portIS_PRIVILEGED() xIsPrivileged()
*/
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Raise an SVC request to raise privilege.
* register. *
*/ * The SVC handler checks that the SVC was raised from a system call and only
#define portRESET_PRIVILEGE() vResetPrivilege() * then it raises the privilege. If this is called from any other place,
#else * the privilege is not raised.
#define portIS_PRIVILEGED() */
#define portRAISE_PRIVILEGE() #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */ /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register.
*/
#define portRESET_PRIVILEGE() vResetPrivilege()
#else
#define portIS_PRIVILEGED()
#define portRAISE_PRIVILEGE()
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Barriers. * @brief Barriers.
*/ */
#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,18 +19,18 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -42,109 +42,109 @@ extern "C" {
*------------------------------------------------------------------------------ *------------------------------------------------------------------------------
*/ */
#ifndef configENABLE_FPU #ifndef configENABLE_FPU
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#ifndef configENABLE_MPU #ifndef configENABLE_MPU
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#ifndef configENABLE_TRUSTZONE #ifndef configENABLE_TRUSTZONE
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Type definitions. * @brief Type definitions.
*/ */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* Architecture specifics. * Architecture specifics.
*/ */
#define portARCH_NAME "Cortex-M23" #define portARCH_NAME "Cortex-M23"
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__(( always_inline )) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
#define portHAS_STACK_OVERFLOW_CHECKING 1 #define portHAS_STACK_OVERFLOW_CHECKING 1
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Extern declarations. * @brief Extern declarations.
*/ */
extern BaseType_t xPortIsInsideInterrupt( void ); extern BaseType_t xPortIsInsideInterrupt( void );
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief MPU specific constants. * @brief MPU specific constants.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#else #else
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU regions. */ /* MPU regions. */
#define portPRIVILEGED_FLASH_REGION ( 0UL ) #define portPRIVILEGED_FLASH_REGION ( 0UL )
#define portUNPRIVILEGED_FLASH_REGION ( 1UL ) #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
#define portPRIVILEGED_RAM_REGION ( 3UL ) #define portPRIVILEGED_RAM_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portLAST_CONFIGURABLE_REGION ( 7UL ) #define portLAST_CONFIGURABLE_REGION ( 7UL )
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
/* Device memory attributes used in MPU_MAIR registers. /* Device memory attributes used in MPU_MAIR registers.
* *
@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* 11 --> Device-GRE * 11 --> Device-GRE
* Bit[1:0] - 00, Reserved. * Bit[1:0] - 00, Reserved.
*/ */
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
/* Normal memory attributes used in MPU_MAIR registers. */ /* Normal memory attributes used in MPU_MAIR registers. */
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
/* Attributes used in MPU_RBAR registers. */ /* Attributes used in MPU_RBAR registers. */
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
#define portMPU_REGION_EXECUTE_NEVER ( 1UL ) #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Settings to define an MPU region. * @brief Settings to define an MPU region.
*/ */
typedef struct MPURegionSettings typedef struct MPURegionSettings
{ {
uint32_t ulRBAR; /**< RBAR for the region. */ uint32_t ulRBAR; /**< RBAR for the region. */
uint32_t ulRLAR; /**< RLAR for the region. */ uint32_t ulRLAR; /**< RLAR for the region. */
} MPURegionSettings_t; } MPURegionSettings_t;
/** /**
* @brief MPU settings as stored in the TCB. * @brief MPU settings as stored in the TCB.
*/ */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
} xMPU_SETTINGS; } xMPU_SETTINGS;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief SVC numbers. * @brief SVC numbers.
*/ */
#define portSVC_ALLOCATE_SECURE_CONTEXT 0 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
#define portSVC_FREE_SECURE_CONTEXT 1 #define portSVC_FREE_SECURE_CONTEXT 1
#define portSVC_START_SCHEDULER 2 #define portSVC_START_SCHEDULER 2
#define portSVC_RAISE_PRIVILEGE 3 #define portSVC_RAISE_PRIVILEGE 3
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Scheduler utilities. * @brief Scheduler utilities.
*/ */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Tickless idle/low power functionality. * @brief Tickless idle/low power functionality.
*/ */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Task function macros as described on the FreeRTOS.org WEB site. * @brief Task function macros as described on the FreeRTOS.org WEB site.
*/ */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
/**
* @brief Allocate a secure context for the task.
*
* Tasks are not created with a secure context. Any task that is going to call
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
* secure context before it calls any secure function.
*
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
*/
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
/** /**
* @brief Called when a task is deleted to delete the task's secure context, * @brief Allocate a secure context for the task.
* if it has one. *
* * Tasks are not created with a secure context. Any task that is going to call
* @param[in] pxTCB The TCB of the task being deleted. * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
*/ * secure context before it calls any secure function.
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) *
#else * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) */
#define portCLEAN_UP_TCB( pxTCB ) #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
#endif /* configENABLE_TRUSTZONE */
/**
* @brief Called when a task is deleted to delete the task's secure context,
* if it has one.
*
* @param[in] pxTCB The TCB of the task being deleted.
*/
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
#else
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
#define portCLEAN_UP_TCB( pxTCB )
#endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
/**
* @brief Checks whether or not the processor is privileged.
*
* @return 1 if the processor is already privileged, 0 otherwise.
*/
#define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Checks whether or not the processor is privileged.
* *
* The SVC handler checks that the SVC was raised from a system call and only * @return 1 if the processor is already privileged, 0 otherwise.
* then it raises the privilege. If this is called from any other place, */
* the privilege is not raised. #define portIS_PRIVILEGED() xIsPrivileged()
*/
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Raise an SVC request to raise privilege.
* register. *
*/ * The SVC handler checks that the SVC was raised from a system call and only
#define portRESET_PRIVILEGE() vResetPrivilege() * then it raises the privilege. If this is called from any other place,
#else * the privilege is not raised.
#define portIS_PRIVILEGED() */
#define portRAISE_PRIVILEGE() #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */ /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register.
*/
#define portRESET_PRIVILEGE() vResetPrivilege()
#else
#define portIS_PRIVILEGED()
#define portRAISE_PRIVILEGE()
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Barriers. * @brief Barriers.
*/ */
#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
* the source code because to do so would cause other compilers to generate * the source code because to do so would cause other compilers to generate
* warnings. */ * warnings. */
#pragma diag_suppress=Be006 #pragma diag_suppress=Be006
#pragma diag_suppress=Pa082 #pragma diag_suppress=Pa082
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,18 +19,18 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -42,109 +42,109 @@ extern "C" {
*------------------------------------------------------------------------------ *------------------------------------------------------------------------------
*/ */
#ifndef configENABLE_FPU #ifndef configENABLE_FPU
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#ifndef configENABLE_MPU #ifndef configENABLE_MPU
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#ifndef configENABLE_TRUSTZONE #ifndef configENABLE_TRUSTZONE
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Type definitions. * @brief Type definitions.
*/ */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* Architecture specifics. * Architecture specifics.
*/ */
#define portARCH_NAME "Cortex-M23" #define portARCH_NAME "Cortex-M23"
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__(( always_inline )) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
#define portHAS_STACK_OVERFLOW_CHECKING 1 #define portHAS_STACK_OVERFLOW_CHECKING 1
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Extern declarations. * @brief Extern declarations.
*/ */
extern BaseType_t xPortIsInsideInterrupt( void ); extern BaseType_t xPortIsInsideInterrupt( void );
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief MPU specific constants. * @brief MPU specific constants.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#else #else
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU regions. */ /* MPU regions. */
#define portPRIVILEGED_FLASH_REGION ( 0UL ) #define portPRIVILEGED_FLASH_REGION ( 0UL )
#define portUNPRIVILEGED_FLASH_REGION ( 1UL ) #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
#define portPRIVILEGED_RAM_REGION ( 3UL ) #define portPRIVILEGED_RAM_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portLAST_CONFIGURABLE_REGION ( 7UL ) #define portLAST_CONFIGURABLE_REGION ( 7UL )
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
/* Device memory attributes used in MPU_MAIR registers. /* Device memory attributes used in MPU_MAIR registers.
* *
@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* 11 --> Device-GRE * 11 --> Device-GRE
* Bit[1:0] - 00, Reserved. * Bit[1:0] - 00, Reserved.
*/ */
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
/* Normal memory attributes used in MPU_MAIR registers. */ /* Normal memory attributes used in MPU_MAIR registers. */
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
/* Attributes used in MPU_RBAR registers. */ /* Attributes used in MPU_RBAR registers. */
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
#define portMPU_REGION_EXECUTE_NEVER ( 1UL ) #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Settings to define an MPU region. * @brief Settings to define an MPU region.
*/ */
typedef struct MPURegionSettings typedef struct MPURegionSettings
{ {
uint32_t ulRBAR; /**< RBAR for the region. */ uint32_t ulRBAR; /**< RBAR for the region. */
uint32_t ulRLAR; /**< RLAR for the region. */ uint32_t ulRLAR; /**< RLAR for the region. */
} MPURegionSettings_t; } MPURegionSettings_t;
/** /**
* @brief MPU settings as stored in the TCB. * @brief MPU settings as stored in the TCB.
*/ */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
} xMPU_SETTINGS; } xMPU_SETTINGS;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief SVC numbers. * @brief SVC numbers.
*/ */
#define portSVC_ALLOCATE_SECURE_CONTEXT 0 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
#define portSVC_FREE_SECURE_CONTEXT 1 #define portSVC_FREE_SECURE_CONTEXT 1
#define portSVC_START_SCHEDULER 2 #define portSVC_START_SCHEDULER 2
#define portSVC_RAISE_PRIVILEGE 3 #define portSVC_RAISE_PRIVILEGE 3
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Scheduler utilities. * @brief Scheduler utilities.
*/ */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" ) #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" ) #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Tickless idle/low power functionality. * @brief Tickless idle/low power functionality.
*/ */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Task function macros as described on the FreeRTOS.org WEB site. * @brief Task function macros as described on the FreeRTOS.org WEB site.
*/ */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
/**
* @brief Allocate a secure context for the task.
*
* Tasks are not created with a secure context. Any task that is going to call
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
* secure context before it calls any secure function.
*
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
*/
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
/** /**
* @brief Called when a task is deleted to delete the task's secure context, * @brief Allocate a secure context for the task.
* if it has one. *
* * Tasks are not created with a secure context. Any task that is going to call
* @param[in] pxTCB The TCB of the task being deleted. * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
*/ * secure context before it calls any secure function.
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) *
#else * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) */
#define portCLEAN_UP_TCB( pxTCB ) #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
#endif /* configENABLE_TRUSTZONE */
/**
* @brief Called when a task is deleted to delete the task's secure context,
* if it has one.
*
* @param[in] pxTCB The TCB of the task being deleted.
*/
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
#else
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
#define portCLEAN_UP_TCB( pxTCB )
#endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
/**
* @brief Checks whether or not the processor is privileged.
*
* @return 1 if the processor is already privileged, 0 otherwise.
*/
#define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Checks whether or not the processor is privileged.
* *
* The SVC handler checks that the SVC was raised from a system call and only * @return 1 if the processor is already privileged, 0 otherwise.
* then it raises the privilege. If this is called from any other place, */
* the privilege is not raised. #define portIS_PRIVILEGED() xIsPrivileged()
*/
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Raise an SVC request to raise privilege.
* register. *
*/ * The SVC handler checks that the SVC was raised from a system call and only
#define portRESET_PRIVILEGE() vResetPrivilege() * then it raises the privilege. If this is called from any other place,
#else * the privilege is not raised.
#define portIS_PRIVILEGED() */
#define portRAISE_PRIVILEGE() #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */ /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register.
*/
#define portRESET_PRIVILEGE() vResetPrivilege()
#else
#define portIS_PRIVILEGED()
#define portRAISE_PRIVILEGE()
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Barriers. * @brief Barriers.
*/ */
#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
* the source code because to do so would cause other compilers to generate * the source code because to do so would cause other compilers to generate
* warnings. */ * warnings. */
#pragma diag_suppress=Be006 #pragma diag_suppress=Be006
#pragma diag_suppress=Pa082 #pragma diag_suppress=Pa082
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,18 +19,18 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -42,109 +42,109 @@ extern "C" {
*------------------------------------------------------------------------------ *------------------------------------------------------------------------------
*/ */
#ifndef configENABLE_FPU #ifndef configENABLE_FPU
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#ifndef configENABLE_MPU #ifndef configENABLE_MPU
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#ifndef configENABLE_TRUSTZONE #ifndef configENABLE_TRUSTZONE
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Type definitions. * @brief Type definitions.
*/ */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* Architecture specifics. * Architecture specifics.
*/ */
#define portARCH_NAME "Cortex-M33" #define portARCH_NAME "Cortex-M33"
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__(( always_inline )) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
#define portHAS_STACK_OVERFLOW_CHECKING 1 #define portHAS_STACK_OVERFLOW_CHECKING 1
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Extern declarations. * @brief Extern declarations.
*/ */
extern BaseType_t xPortIsInsideInterrupt( void ); extern BaseType_t xPortIsInsideInterrupt( void );
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief MPU specific constants. * @brief MPU specific constants.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#else #else
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU regions. */ /* MPU regions. */
#define portPRIVILEGED_FLASH_REGION ( 0UL ) #define portPRIVILEGED_FLASH_REGION ( 0UL )
#define portUNPRIVILEGED_FLASH_REGION ( 1UL ) #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
#define portPRIVILEGED_RAM_REGION ( 3UL ) #define portPRIVILEGED_RAM_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portLAST_CONFIGURABLE_REGION ( 7UL ) #define portLAST_CONFIGURABLE_REGION ( 7UL )
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
/* Device memory attributes used in MPU_MAIR registers. /* Device memory attributes used in MPU_MAIR registers.
* *
@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* 11 --> Device-GRE * 11 --> Device-GRE
* Bit[1:0] - 00, Reserved. * Bit[1:0] - 00, Reserved.
*/ */
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
/* Normal memory attributes used in MPU_MAIR registers. */ /* Normal memory attributes used in MPU_MAIR registers. */
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
/* Attributes used in MPU_RBAR registers. */ /* Attributes used in MPU_RBAR registers. */
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
#define portMPU_REGION_EXECUTE_NEVER ( 1UL ) #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Settings to define an MPU region. * @brief Settings to define an MPU region.
*/ */
typedef struct MPURegionSettings typedef struct MPURegionSettings
{ {
uint32_t ulRBAR; /**< RBAR for the region. */ uint32_t ulRBAR; /**< RBAR for the region. */
uint32_t ulRLAR; /**< RLAR for the region. */ uint32_t ulRLAR; /**< RLAR for the region. */
} MPURegionSettings_t; } MPURegionSettings_t;
/** /**
* @brief MPU settings as stored in the TCB. * @brief MPU settings as stored in the TCB.
*/ */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
} xMPU_SETTINGS; } xMPU_SETTINGS;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief SVC numbers. * @brief SVC numbers.
*/ */
#define portSVC_ALLOCATE_SECURE_CONTEXT 0 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
#define portSVC_FREE_SECURE_CONTEXT 1 #define portSVC_FREE_SECURE_CONTEXT 1
#define portSVC_START_SCHEDULER 2 #define portSVC_START_SCHEDULER 2
#define portSVC_RAISE_PRIVILEGE 3 #define portSVC_RAISE_PRIVILEGE 3
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Scheduler utilities. * @brief Scheduler utilities.
*/ */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
#define portDISABLE_INTERRUPTS() ulSetInterruptMask() #define portDISABLE_INTERRUPTS() ulSetInterruptMask()
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Tickless idle/low power functionality. * @brief Tickless idle/low power functionality.
*/ */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Task function macros as described on the FreeRTOS.org WEB site. * @brief Task function macros as described on the FreeRTOS.org WEB site.
*/ */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
/**
* @brief Allocate a secure context for the task.
*
* Tasks are not created with a secure context. Any task that is going to call
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
* secure context before it calls any secure function.
*
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
*/
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
/** /**
* @brief Called when a task is deleted to delete the task's secure context, * @brief Allocate a secure context for the task.
* if it has one. *
* * Tasks are not created with a secure context. Any task that is going to call
* @param[in] pxTCB The TCB of the task being deleted. * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
*/ * secure context before it calls any secure function.
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) *
#else * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) */
#define portCLEAN_UP_TCB( pxTCB ) #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
#endif /* configENABLE_TRUSTZONE */
/**
* @brief Called when a task is deleted to delete the task's secure context,
* if it has one.
*
* @param[in] pxTCB The TCB of the task being deleted.
*/
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
#else
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
#define portCLEAN_UP_TCB( pxTCB )
#endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
/**
* @brief Checks whether or not the processor is privileged.
*
* @return 1 if the processor is already privileged, 0 otherwise.
*/
#define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Checks whether or not the processor is privileged.
* *
* The SVC handler checks that the SVC was raised from a system call and only * @return 1 if the processor is already privileged, 0 otherwise.
* then it raises the privilege. If this is called from any other place, */
* the privilege is not raised. #define portIS_PRIVILEGED() xIsPrivileged()
*/
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Raise an SVC request to raise privilege.
* register. *
*/ * The SVC handler checks that the SVC was raised from a system call and only
#define portRESET_PRIVILEGE() vResetPrivilege() * then it raises the privilege. If this is called from any other place,
#else * the privilege is not raised.
#define portIS_PRIVILEGED() */
#define portRAISE_PRIVILEGE() #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */ /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register.
*/
#define portRESET_PRIVILEGE() vResetPrivilege()
#else
#define portIS_PRIVILEGED()
#define portRAISE_PRIVILEGE()
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Barriers. * @brief Barriers.
*/ */
#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
* the source code because to do so would cause other compilers to generate * the source code because to do so would cause other compilers to generate
* warnings. */ * warnings. */
#pragma diag_suppress=Be006 #pragma diag_suppress=Be006
#pragma diag_suppress=Pa082 #pragma diag_suppress=Pa082
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,18 +19,18 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -42,109 +42,109 @@ extern "C" {
*------------------------------------------------------------------------------ *------------------------------------------------------------------------------
*/ */
#ifndef configENABLE_FPU #ifndef configENABLE_FPU
#error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU. #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#ifndef configENABLE_MPU #ifndef configENABLE_MPU
#error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU. #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
#ifndef configENABLE_TRUSTZONE #ifndef configENABLE_TRUSTZONE
#error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone. #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Type definitions. * @brief Type definitions.
*/ */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
* not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* Architecture specifics. * Architecture specifics.
*/ */
#define portARCH_NAME "Cortex-M33" #define portARCH_NAME "Cortex-M33"
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
#define portNOP() #define portNOP()
#define portINLINE __inline #define portINLINE __inline
#ifndef portFORCE_INLINE #ifndef portFORCE_INLINE
#define portFORCE_INLINE inline __attribute__(( always_inline )) #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
#endif #endif
#define portHAS_STACK_OVERFLOW_CHECKING 1 #define portHAS_STACK_OVERFLOW_CHECKING 1
#define portDONT_DISCARD __root #define portDONT_DISCARD __root
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Extern declarations. * @brief Extern declarations.
*/ */
extern BaseType_t xPortIsInsideInterrupt( void ); extern BaseType_t xPortIsInsideInterrupt( void );
extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */; extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */; extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */; extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */ extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
extern void vPortFreeSecureContext( uint32_t *pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */; extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
#endif /* configENABLE_TRUSTZONE */ #endif /* configENABLE_TRUSTZONE */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */; extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */; extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief MPU specific constants. * @brief MPU specific constants.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
#define portUSING_MPU_WRAPPERS 1 #define portUSING_MPU_WRAPPERS 1
#define portPRIVILEGE_BIT ( 0x80000000UL ) #define portPRIVILEGE_BIT ( 0x80000000UL )
#else #else
#define portPRIVILEGE_BIT ( 0x0UL ) #define portPRIVILEGE_BIT ( 0x0UL )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/* MPU regions. */ /* MPU regions. */
#define portPRIVILEGED_FLASH_REGION ( 0UL ) #define portPRIVILEGED_FLASH_REGION ( 0UL )
#define portUNPRIVILEGED_FLASH_REGION ( 1UL ) #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
#define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL ) #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
#define portPRIVILEGED_RAM_REGION ( 3UL ) #define portPRIVILEGED_RAM_REGION ( 3UL )
#define portSTACK_REGION ( 4UL ) #define portSTACK_REGION ( 4UL )
#define portFIRST_CONFIGURABLE_REGION ( 5UL ) #define portFIRST_CONFIGURABLE_REGION ( 5UL )
#define portLAST_CONFIGURABLE_REGION ( 7UL ) #define portLAST_CONFIGURABLE_REGION ( 7UL )
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 ) #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */ #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
/* Device memory attributes used in MPU_MAIR registers. /* Device memory attributes used in MPU_MAIR registers.
* *
@ -156,162 +156,164 @@ extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) P
* 11 --> Device-GRE * 11 --> Device-GRE
* Bit[1:0] - 00, Reserved. * Bit[1:0] - 00, Reserved.
*/ */
#define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */ #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
#define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */ #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
#define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */ #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
#define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */ #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
/* Normal memory attributes used in MPU_MAIR registers. */ /* Normal memory attributes used in MPU_MAIR registers. */
#define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */ #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
#define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */ #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
/* Attributes used in MPU_RBAR registers. */ /* Attributes used in MPU_RBAR registers. */
#define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL ) #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
#define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL ) #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
#define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL ) #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
#define portMPU_REGION_READ_WRITE ( 1UL << 1UL ) #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL ) #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
#define portMPU_REGION_READ_ONLY ( 3UL << 1UL ) #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
#define portMPU_REGION_EXECUTE_NEVER ( 1UL ) #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Settings to define an MPU region. * @brief Settings to define an MPU region.
*/ */
typedef struct MPURegionSettings typedef struct MPURegionSettings
{ {
uint32_t ulRBAR; /**< RBAR for the region. */ uint32_t ulRBAR; /**< RBAR for the region. */
uint32_t ulRLAR; /**< RLAR for the region. */ uint32_t ulRLAR; /**< RLAR for the region. */
} MPURegionSettings_t; } MPURegionSettings_t;
/** /**
* @brief MPU settings as stored in the TCB. * @brief MPU settings as stored in the TCB.
*/ */
typedef struct MPU_SETTINGS typedef struct MPU_SETTINGS
{ {
uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */ uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */ MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
} xMPU_SETTINGS; } xMPU_SETTINGS;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief SVC numbers. * @brief SVC numbers.
*/ */
#define portSVC_ALLOCATE_SECURE_CONTEXT 0 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
#define portSVC_FREE_SECURE_CONTEXT 1 #define portSVC_FREE_SECURE_CONTEXT 1
#define portSVC_START_SCHEDULER 2 #define portSVC_START_SCHEDULER 2
#define portSVC_RAISE_PRIVILEGE 3 #define portSVC_RAISE_PRIVILEGE 3
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Scheduler utilities. * @brief Scheduler utilities.
*/ */
#define portYIELD() vPortYield() #define portYIELD() vPortYield()
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Critical section management. * @brief Critical section management.
*/ */
#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask() #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMask( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
#define portDISABLE_INTERRUPTS() ulSetInterruptMask() #define portDISABLE_INTERRUPTS() ulSetInterruptMask()
#define portENABLE_INTERRUPTS() vClearInterruptMask( 0 ) #define portENABLE_INTERRUPTS() vClearInterruptMask( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Tickless idle/low power functionality. * @brief Tickless idle/low power functionality.
*/ */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Task function macros as described on the FreeRTOS.org WEB site. * @brief Task function macros as described on the FreeRTOS.org WEB site.
*/ */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_TRUSTZONE == 1 ) #if ( configENABLE_TRUSTZONE == 1 )
/**
* @brief Allocate a secure context for the task.
*
* Tasks are not created with a secure context. Any task that is going to call
* secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
* secure context before it calls any secure function.
*
* @param[in] ulSecureStackSize The size of the secure stack to be allocated.
*/
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
/** /**
* @brief Called when a task is deleted to delete the task's secure context, * @brief Allocate a secure context for the task.
* if it has one. *
* * Tasks are not created with a secure context. Any task that is going to call
* @param[in] pxTCB The TCB of the task being deleted. * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
*/ * secure context before it calls any secure function.
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB ) *
#else * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) */
#define portCLEAN_UP_TCB( pxTCB ) #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
#endif /* configENABLE_TRUSTZONE */
/**
* @brief Called when a task is deleted to delete the task's secure context,
* if it has one.
*
* @param[in] pxTCB The TCB of the task being deleted.
*/
#define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
#else
#define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
#define portCLEAN_UP_TCB( pxTCB )
#endif /* configENABLE_TRUSTZONE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
/**
* @brief Checks whether or not the processor is privileged.
*
* @return 1 if the processor is already privileged, 0 otherwise.
*/
#define portIS_PRIVILEGED() xIsPrivileged()
/** /**
* @brief Raise an SVC request to raise privilege. * @brief Checks whether or not the processor is privileged.
* *
* The SVC handler checks that the SVC was raised from a system call and only * @return 1 if the processor is already privileged, 0 otherwise.
* then it raises the privilege. If this is called from any other place, */
* the privilege is not raised. #define portIS_PRIVILEGED() xIsPrivileged()
*/
#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Raise an SVC request to raise privilege.
* register. *
*/ * The SVC handler checks that the SVC was raised from a system call and only
#define portRESET_PRIVILEGE() vResetPrivilege() * then it raises the privilege. If this is called from any other place,
#else * the privilege is not raised.
#define portIS_PRIVILEGED() */
#define portRAISE_PRIVILEGE() #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */ /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL
* register.
*/
#define portRESET_PRIVILEGE() vResetPrivilege()
#else
#define portIS_PRIVILEGED()
#define portRAISE_PRIVILEGE()
#define portRESET_PRIVILEGE()
#endif /* configENABLE_MPU */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
* @brief Barriers. * @brief Barriers.
*/ */
#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" ) #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in
* the source code because to do so would cause other compilers to generate * the source code because to do so would cause other compilers to generate
* warnings. */ * warnings. */
#pragma diag_suppress=Be006 #pragma diag_suppress=Be006
#pragma diag_suppress=Pa082 #pragma diag_suppress=Pa082
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -38,14 +38,14 @@
* @brief Restore the context of the first task so that the first task starts * @brief Restore the context of the first task so that the first task starts
* executing. * executing.
*/ */
void vRestoreContextOfFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; void vRestoreContextOfFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
/** /**
* @brief Checks whether or not the processor is privileged. * @brief Checks whether or not the processor is privileged.
* *
* @return 1 if the processor is already privileged, 0 otherwise. * @return 1 if the processor is already privileged, 0 otherwise.
*/ */
BaseType_t xIsPrivileged( void ) __attribute__ (( naked )); BaseType_t xIsPrivileged( void ) __attribute__( ( naked ) );
/** /**
* @brief Raises the privilege level by clearing the bit 0 of the CONTROL * @brief Raises the privilege level by clearing the bit 0 of the CONTROL
@ -58,7 +58,7 @@ BaseType_t xIsPrivileged( void ) __attribute__ (( naked ));
* Bit[0] = 0 --> The processor is running privileged * Bit[0] = 0 --> The processor is running privileged
* Bit[0] = 1 --> The processor is running unprivileged. * Bit[0] = 1 --> The processor is running unprivileged.
*/ */
void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; void vRaisePrivilege( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
/** /**
* @brief Lowers the privilege level by setting the bit 0 of the CONTROL * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
@ -68,32 +68,32 @@ void vRaisePrivilege( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
* Bit[0] = 0 --> The processor is running privileged * Bit[0] = 0 --> The processor is running privileged
* Bit[0] = 1 --> The processor is running unprivileged. * Bit[0] = 1 --> The processor is running unprivileged.
*/ */
void vResetPrivilege( void ) __attribute__ (( naked )); void vResetPrivilege( void ) __attribute__( ( naked ) );
/** /**
* @brief Starts the first task. * @brief Starts the first task.
*/ */
void vStartFirstTask( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; void vStartFirstTask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
/** /**
* @brief Disables interrupts. * @brief Disables interrupts.
*/ */
uint32_t ulSetInterruptMask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION; uint32_t ulSetInterruptMask( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
/** /**
* @brief Enables interrupts. * @brief Enables interrupts.
*/ */
void vClearInterruptMask( uint32_t ulMask ) __attribute__(( naked )) PRIVILEGED_FUNCTION; void vClearInterruptMask( uint32_t ulMask ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
/** /**
* @brief PendSV Exception handler. * @brief PendSV Exception handler.
*/ */
void PendSV_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; void PendSV_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
/** /**
* @brief SVC Handler. * @brief SVC Handler.
*/ */
void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; void SVC_Handler( void ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
/** /**
* @brief Allocate a Secure context for the calling task. * @brief Allocate a Secure context for the calling task.
@ -101,13 +101,13 @@ void SVC_Handler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
* @param[in] ulSecureStackSize The size of the stack to be allocated on the * @param[in] ulSecureStackSize The size of the stack to be allocated on the
* secure side for the calling task. * secure side for the calling task.
*/ */
void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__ (( naked )); void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) __attribute__( ( naked ) );
/** /**
* @brief Free the task's secure context. * @brief Free the task's secure context.
* *
* @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task. * @param[in] pulTCB Pointer to the Task Control Block (TCB) of the task.
*/ */
void vPortFreeSecureContext( uint32_t *pulTCB ) __attribute__ (( naked )) PRIVILEGED_FUNCTION; void vPortFreeSecureContext( uint32_t * pulTCB ) __attribute__( ( naked ) ) PRIVILEGED_FUNCTION;
#endif /* __PORT_ASM_H__ */ #endif /* __PORT_ASM_H__ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -31,61 +31,61 @@
/* Secure port macros. */ /* Secure port macros. */
#include "secure_port_macros.h" #include "secure_port_macros.h"
#if( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
#error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0. #error Cortex-M23 does not have a Floating Point Unit (FPU) and therefore configENABLE_FPU must be set to 0.
#endif #endif
secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
{ {
/* xSecureContextHandle value is in r0. */ /* xSecureContextHandle value is in r0. */
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" mrs r1, ipsr \n" /* r1 = IPSR. */ " mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, load_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ " cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" ldmia r0!, {r1, r2} \n" /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ " ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldmia r1!, {r3} \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */ " ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
" msr control, r3 \n" /* CONTROL = r3. */ " msr control, r3 \n"/* CONTROL = r3. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" msr psplim, r2 \n" /* PSPLIM = r2. */ " msr psplim, r2 \n"/* PSPLIM = r2. */
" msr psp, r1 \n" /* PSP = r1. */ " msr psp, r1 \n"/* PSP = r1. */
" \n" " \n"
" load_ctx_therad_mode: \n" " load_ctx_therad_mode: \n"
" nop \n" " nop \n"
" \n" " \n"
:::"r0", "r1", "r2" ::: "r0", "r1", "r2"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
{ {
/* xSecureContextHandle value is in r0. */ /* xSecureContextHandle value is in r0. */
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" mrs r1, ipsr \n" /* r1 = IPSR. */ " mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, save_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ " cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" mrs r1, psp \n" /* r1 = PSP. */ " mrs r1, psp \n"/* r1 = PSP. */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" mrs r2, control \n" /* r2 = CONTROL. */ " mrs r2, control \n"/* r2 = CONTROL. */
" subs r1, r1, #4 \n" /* Make space for the CONTROL value on the stack. */ " subs r1, r1, #4 \n"/* Make space for the CONTROL value on the stack. */
" str r1, [r0] \n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
" stmia r1!, {r2} \n" /* Store CONTROL value on the stack. */ " stmia r1!, {r2} \n"/* Store CONTROL value on the stack. */
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
" str r1, [r0] \n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" movs r1, %0 \n" /* r1 = securecontextNO_STACK. */ " movs r1, %0 \n"/* r1 = securecontextNO_STACK. */
" msr psplim, r1 \n" /* PSPLIM = securecontextNO_STACK. */ " msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */
" msr psp, r1 \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ " msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
" \n" " \n"
" save_ctx_therad_mode: \n" " save_ctx_therad_mode: \n"
" nop \n" " nop \n"
" \n" " \n"
:: "i" ( securecontextNO_STACK ) : "r1", "memory" ::"i" ( securecontextNO_STACK ) : "r1", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -33,56 +33,56 @@
secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
{ {
/* xSecureContextHandle value is in r0. */ /* xSecureContextHandle value is in r0. */
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" mrs r1, ipsr \n" /* r1 = IPSR. */ " mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, load_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ " cbz r1, load_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" ldmia r0!, {r1, r2} \n" /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */ " ldmia r0!, {r1, r2} \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" ldmia r1!, {r3} \n" /* Read CONTROL register value from task's stack. r3 = CONTROL. */ " ldmia r1!, {r3} \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
" msr control, r3 \n" /* CONTROL = r3. */ " msr control, r3 \n"/* CONTROL = r3. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" msr psplim, r2 \n" /* PSPLIM = r2. */ " msr psplim, r2 \n"/* PSPLIM = r2. */
" msr psp, r1 \n" /* PSP = r1. */ " msr psp, r1 \n"/* PSP = r1. */
" \n" " \n"
" load_ctx_therad_mode: \n" " load_ctx_therad_mode: \n"
" nop \n" " nop \n"
" \n" " \n"
:::"r0", "r1", "r2" ::: "r0", "r1", "r2"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
{ {
/* xSecureContextHandle value is in r0. */ /* xSecureContextHandle value is in r0. */
__asm volatile __asm volatile
( (
" .syntax unified \n" " .syntax unified \n"
" \n" " \n"
" mrs r1, ipsr \n" /* r1 = IPSR. */ " mrs r1, ipsr \n"/* r1 = IPSR. */
" cbz r1, save_ctx_therad_mode \n" /* Do nothing if the processor is running in the Thread Mode. */ " cbz r1, save_ctx_therad_mode \n"/* Do nothing if the processor is running in the Thread Mode. */
" mrs r1, psp \n" /* r1 = PSP. */ " mrs r1, psp \n"/* r1 = PSP. */
#if( configENABLE_FPU == 1 ) #if ( configENABLE_FPU == 1 )
" vstmdb r1!, {s0} \n" /* Trigger the defferred stacking of FPU registers. */ " vstmdb r1!, {s0} \n"/* Trigger the defferred stacking of FPU registers. */
" vldmia r1!, {s0} \n" /* Nullify the effect of the pervious statement. */ " vldmia r1!, {s0} \n"/* Nullify the effect of the pervious statement. */
#endif /* configENABLE_FPU */ #endif /* configENABLE_FPU */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
" mrs r2, control \n" /* r2 = CONTROL. */ " mrs r2, control \n"/* r2 = CONTROL. */
" stmdb r1!, {r2} \n" /* Store CONTROL value on the stack. */ " stmdb r1!, {r2} \n"/* Store CONTROL value on the stack. */
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
" str r1, [r0] \n" /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */ " str r1, [r0] \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
" movs r1, %0 \n" /* r1 = securecontextNO_STACK. */ " movs r1, %0 \n"/* r1 = securecontextNO_STACK. */
" msr psplim, r1 \n" /* PSPLIM = securecontextNO_STACK. */ " msr psplim, r1 \n"/* PSPLIM = securecontextNO_STACK. */
" msr psp, r1 \n" /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */ " msr psp, r1 \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
" \n" " \n"
" save_ctx_therad_mode: \n" " save_ctx_therad_mode: \n"
" nop \n" " nop \n"
" \n" " \n"
:: "i" ( securecontextNO_STACK ) : "r1", "memory" ::"i" ( securecontextNO_STACK ) : "r1", "memory"
); );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -37,12 +37,12 @@ extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHa
secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
{ {
SecureContext_LoadContextAsm( xSecureContextHandle ); SecureContext_LoadContextAsm( xSecureContextHandle );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
{ {
SecureContext_SaveContextAsm( xSecureContextHandle ); SecureContext_SaveContextAsm( xSecureContextHandle );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -37,12 +37,12 @@ extern void SecureContext_SaveContextAsm( SecureContextHandle_t xSecureContextHa
secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
{ {
SecureContext_LoadContextAsm( xSecureContextHandle ); SecureContext_LoadContextAsm( xSecureContextHandle );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
{ {
SecureContext_SaveContextAsm( xSecureContextHandle ); SecureContext_SaveContextAsm( xSecureContextHandle );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -40,7 +40,7 @@
* Bit[0] - 0 --> Thread mode is privileged. * Bit[0] - 0 --> Thread mode is privileged.
* Bit[1] - 1 --> Thread mode uses PSP. * Bit[1] - 1 --> Thread mode uses PSP.
*/ */
#define securecontextCONTROL_VALUE_PRIVILEGED 0x02 #define securecontextCONTROL_VALUE_PRIVILEGED 0x02
/** /**
* @brief CONTROL value for un-privileged tasks. * @brief CONTROL value for un-privileged tasks.
@ -48,7 +48,7 @@
* Bit[0] - 1 --> Thread mode is un-privileged. * Bit[0] - 1 --> Thread mode is un-privileged.
* Bit[1] - 1 --> Thread mode uses PSP. * Bit[1] - 1 --> Thread mode uses PSP.
*/ */
#define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03 #define securecontextCONTROL_VALUE_UNPRIVILEGED 0x03
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
@ -59,146 +59,148 @@
*/ */
typedef struct SecureContext typedef struct SecureContext
{ {
uint8_t *pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */ uint8_t * pucCurrentStackPointer; /**< Current value of stack pointer (PSP). */
uint8_t *pucStackLimit; /**< Last location of the stack memory (PSPLIM). */ uint8_t * pucStackLimit; /**< Last location of the stack memory (PSPLIM). */
uint8_t *pucStackStart; /**< First location of the stack memory. */ uint8_t * pucStackStart; /**< First location of the stack memory. */
} SecureContext_t; } SecureContext_t;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void SecureContext_Init( void ) secureportNON_SECURE_CALLABLE void SecureContext_Init( void )
{ {
uint32_t ulIPSR; uint32_t ulIPSR;
/* Read the Interrupt Program Status Register (IPSR) value. */ /* Read the Interrupt Program Status Register (IPSR) value. */
secureportREAD_IPSR( ulIPSR ); secureportREAD_IPSR( ulIPSR );
/* Do nothing if the processor is running in the Thread Mode. IPSR is zero /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
* when the processor is running in the Thread Mode. */ * when the processor is running in the Thread Mode. */
if( ulIPSR != 0 ) if( ulIPSR != 0 )
{ {
/* No stack for thread mode until a task's context is loaded. */ /* No stack for thread mode until a task's context is loaded. */
secureportSET_PSPLIM( securecontextNO_STACK ); secureportSET_PSPLIM( securecontextNO_STACK );
secureportSET_PSP( securecontextNO_STACK ); secureportSET_PSP( securecontextNO_STACK );
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
{ {
/* Configure thread mode to use PSP and to be unprivileged. */ /* Configure thread mode to use PSP and to be unprivileged. */
secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED ); secureportSET_CONTROL( securecontextCONTROL_VALUE_UNPRIVILEGED );
} }
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
{ {
/* Configure thread mode to use PSP and to be privileged.. */ /* Configure thread mode to use PSP and to be privileged.. */
secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED ); secureportSET_CONTROL( securecontextCONTROL_VALUE_PRIVILEGED );
} }
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
uint32_t ulIsTaskPrivileged )
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ) secureportNON_SECURE_CALLABLE SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize )
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
{ {
uint8_t *pucStackMemory = NULL; uint8_t * pucStackMemory = NULL;
uint32_t ulIPSR; uint32_t ulIPSR;
SecureContextHandle_t xSecureContextHandle = NULL; SecureContextHandle_t xSecureContextHandle = NULL;
#if( configENABLE_MPU == 1 )
uint32_t *pulCurrentStackPointer = NULL;
#endif /* configENABLE_MPU */
/* Read the Interrupt Program Status Register (IPSR) value. */ #if ( configENABLE_MPU == 1 )
secureportREAD_IPSR( ulIPSR ); uint32_t * pulCurrentStackPointer = NULL;
#endif /* configENABLE_MPU */
/* Do nothing if the processor is running in the Thread Mode. IPSR is zero /* Read the Interrupt Program Status Register (IPSR) value. */
* when the processor is running in the Thread Mode. */ secureportREAD_IPSR( ulIPSR );
if( ulIPSR != 0 )
{
/* Allocate the context structure. */
xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
if( xSecureContextHandle != NULL ) /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
{ * when the processor is running in the Thread Mode. */
/* Allocate the stack space. */ if( ulIPSR != 0 )
pucStackMemory = pvPortMalloc( ulSecureStackSize ); {
/* Allocate the context structure. */
xSecureContextHandle = ( SecureContextHandle_t ) pvPortMalloc( sizeof( SecureContext_t ) );
if( pucStackMemory != NULL ) if( xSecureContextHandle != NULL )
{ {
/* Since stack grows down, the starting point will be the last /* Allocate the stack space. */
* location. Note that this location is next to the last pucStackMemory = pvPortMalloc( ulSecureStackSize );
* allocated byte because the hardware decrements the stack
* pointer before writing i.e. if stack pointer is 0x2, a push
* operation will decrement the stack pointer to 0x1 and then
* write at 0x1. */
xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
/* The stack cannot go beyond this location. This value is if( pucStackMemory != NULL )
* programmed in the PSPLIM register on context switch.*/ {
xSecureContextHandle->pucStackLimit = pucStackMemory; /* Since stack grows down, the starting point will be the last
* location. Note that this location is next to the last
* allocated byte because the hardware decrements the stack
* pointer before writing i.e. if stack pointer is 0x2, a push
* operation will decrement the stack pointer to 0x1 and then
* write at 0x1. */
xSecureContextHandle->pucStackStart = pucStackMemory + ulSecureStackSize;
#if( configENABLE_MPU == 1 ) /* The stack cannot go beyond this location. This value is
{ * programmed in the PSPLIM register on context switch.*/
/* Store the correct CONTROL value for the task on the stack. xSecureContextHandle->pucStackLimit = pucStackMemory;
* This value is programmed in the CONTROL register on
* context switch. */
pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
pulCurrentStackPointer--;
if( ulIsTaskPrivileged )
{
*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
}
else
{
*( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
}
/* Store the current stack pointer. This value is programmed in #if ( configENABLE_MPU == 1 )
* the PSP register on context switch. */ {
xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer; /* Store the correct CONTROL value for the task on the stack.
} * This value is programmed in the CONTROL register on
#else /* configENABLE_MPU */ * context switch. */
{ pulCurrentStackPointer = ( uint32_t * ) xSecureContextHandle->pucStackStart;
/* Current SP is set to the starting of the stack. This pulCurrentStackPointer--;
* value programmed in the PSP register on context switch. */
xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
} if( ulIsTaskPrivileged )
#endif /* configENABLE_MPU */ {
} *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_PRIVILEGED;
else }
{ else
/* Free the context to avoid memory leak and make sure to return {
* NULL to indicate failure. */ *( pulCurrentStackPointer ) = securecontextCONTROL_VALUE_UNPRIVILEGED;
vPortFree( xSecureContextHandle ); }
xSecureContextHandle = NULL;
}
}
}
return xSecureContextHandle; /* Store the current stack pointer. This value is programmed in
* the PSP register on context switch. */
xSecureContextHandle->pucCurrentStackPointer = ( uint8_t * ) pulCurrentStackPointer;
}
#else /* configENABLE_MPU */
{
/* Current SP is set to the starting of the stack. This
* value programmed in the PSP register on context switch. */
xSecureContextHandle->pucCurrentStackPointer = xSecureContextHandle->pucStackStart;
}
#endif /* configENABLE_MPU */
}
else
{
/* Free the context to avoid memory leak and make sure to return
* NULL to indicate failure. */
vPortFree( xSecureContextHandle );
xSecureContextHandle = NULL;
}
}
}
return xSecureContextHandle;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle ) secureportNON_SECURE_CALLABLE void SecureContext_FreeContext( SecureContextHandle_t xSecureContextHandle )
{ {
uint32_t ulIPSR; uint32_t ulIPSR;
/* Read the Interrupt Program Status Register (IPSR) value. */ /* Read the Interrupt Program Status Register (IPSR) value. */
secureportREAD_IPSR( ulIPSR ); secureportREAD_IPSR( ulIPSR );
/* Do nothing if the processor is running in the Thread Mode. IPSR is zero /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
* when the processor is running in the Thread Mode. */ * when the processor is running in the Thread Mode. */
if( ulIPSR != 0 ) if( ulIPSR != 0 )
{ {
/* Ensure that valid parameters are passed. */ /* Ensure that valid parameters are passed. */
secureportASSERT( xSecureContextHandle != NULL ); secureportASSERT( xSecureContextHandle != NULL );
/* Free the stack space. */ /* Free the stack space. */
vPortFree( xSecureContextHandle->pucStackLimit ); vPortFree( xSecureContextHandle->pucStackLimit );
/* Free the context itself. */ /* Free the context itself. */
vPortFree( xSecureContextHandle ); vPortFree( xSecureContextHandle );
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -37,13 +37,13 @@
/** /**
* @brief PSP value when no task's context is loaded. * @brief PSP value when no task's context is loaded.
*/ */
#define securecontextNO_STACK 0x0 #define securecontextNO_STACK 0x0
/** /**
* @brief Opaque handle. * @brief Opaque handle.
*/ */
struct SecureContext; struct SecureContext;
typedef struct SecureContext* SecureContextHandle_t; typedef struct SecureContext * SecureContextHandle_t;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
@ -69,10 +69,11 @@ void SecureContext_Init( void );
* @return Opaque context handle if context is successfully allocated, NULL * @return Opaque context handle if context is successfully allocated, NULL
* otherwise. * otherwise.
*/ */
#if( configENABLE_MPU == 1 ) #if ( configENABLE_MPU == 1 )
SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize, uint32_t ulIsTaskPrivileged ); SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize,
uint32_t ulIsTaskPrivileged );
#else /* configENABLE_MPU */ #else /* configENABLE_MPU */
SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize ); SecureContextHandle_t SecureContext_AllocateContext( uint32_t ulSecureStackSize );
#endif /* configENABLE_MPU */ #endif /* configENABLE_MPU */
/** /**

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -37,37 +37,38 @@
/** /**
* @brief Total heap size. * @brief Total heap size.
*/ */
#define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) ) #define secureconfigTOTAL_HEAP_SIZE ( ( ( size_t ) ( 10 * 1024 ) ) )
/* No test marker by default. */ /* No test marker by default. */
#ifndef mtCOVERAGE_TEST_MARKER #ifndef mtCOVERAGE_TEST_MARKER
#define mtCOVERAGE_TEST_MARKER() #define mtCOVERAGE_TEST_MARKER()
#endif #endif
/* No tracing by default. */ /* No tracing by default. */
#ifndef traceMALLOC #ifndef traceMALLOC
#define traceMALLOC( pvReturn, xWantedSize ) #define traceMALLOC( pvReturn, xWantedSize )
#endif #endif
/* No tracing by default. */ /* No tracing by default. */
#ifndef traceFREE #ifndef traceFREE
#define traceFREE( pv, xBlockSize ) #define traceFREE( pv, xBlockSize )
#endif #endif
/* Block sizes must not get too small. */ /* Block sizes must not get too small. */
#define secureheapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) ) #define secureheapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) )
/* Assumes 8bit bytes! */ /* Assumes 8bit bytes! */
#define secureheapBITS_PER_BYTE ( ( size_t ) 8 ) #define secureheapBITS_PER_BYTE ( ( size_t ) 8 )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Allocate the memory for the heap. */ /* Allocate the memory for the heap. */
#if( configAPPLICATION_ALLOCATED_HEAP == 1 ) #if ( configAPPLICATION_ALLOCATED_HEAP == 1 )
/* The application writer has already defined the array used for the RTOS
* heap - probably so it can be placed in a special segment or address. */ /* The application writer has already defined the array used for the RTOS
extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ]; * heap - probably so it can be placed in a special segment or address. */
extern uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
#else /* configAPPLICATION_ALLOCATED_HEAP */ #else /* configAPPLICATION_ALLOCATED_HEAP */
static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ]; static uint8_t ucHeap[ secureconfigTOTAL_HEAP_SIZE ];
#endif /* configAPPLICATION_ALLOCATED_HEAP */ #endif /* configAPPLICATION_ALLOCATED_HEAP */
/** /**
@ -77,8 +78,8 @@
*/ */
typedef struct A_BLOCK_LINK typedef struct A_BLOCK_LINK
{ {
struct A_BLOCK_LINK *pxNextFreeBlock; /**< The next free block in the list. */ struct A_BLOCK_LINK * pxNextFreeBlock; /**< The next free block in the list. */
size_t xBlockSize; /**< The size of the free block. */ size_t xBlockSize; /**< The size of the free block. */
} BlockLink_t; } BlockLink_t;
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -97,7 +98,7 @@ static void prvHeapInit( void );
* *
* @param[in] pxBlockToInsert The block being freed. * @param[in] pxBlockToInsert The block being freed.
*/ */
static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ); static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/** /**
@ -109,7 +110,7 @@ static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( s
/** /**
* @brief Create a couple of list links to mark the start and end of the list. * @brief Create a couple of list links to mark the start and end of the list.
*/ */
static BlockLink_t xStart, *pxEnd = NULL; static BlockLink_t xStart, * pxEnd = NULL;
/** /**
* @brief Keeps track of the number of free bytes remaining, but says nothing * @brief Keeps track of the number of free bytes remaining, but says nothing
@ -130,321 +131,324 @@ static size_t xBlockAllocatedBit = 0;
static void prvHeapInit( void ) static void prvHeapInit( void )
{ {
BlockLink_t *pxFirstFreeBlock; BlockLink_t * pxFirstFreeBlock;
uint8_t *pucAlignedHeap; uint8_t * pucAlignedHeap;
size_t uxAddress; size_t uxAddress;
size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE; size_t xTotalHeapSize = secureconfigTOTAL_HEAP_SIZE;
/* Ensure the heap starts on a correctly aligned boundary. */ /* Ensure the heap starts on a correctly aligned boundary. */
uxAddress = ( size_t ) ucHeap; uxAddress = ( size_t ) ucHeap;
if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 ) if( ( uxAddress & secureportBYTE_ALIGNMENT_MASK ) != 0 )
{ {
uxAddress += ( secureportBYTE_ALIGNMENT - 1 ); uxAddress += ( secureportBYTE_ALIGNMENT - 1 );
uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
} }
pucAlignedHeap = ( uint8_t * ) uxAddress; pucAlignedHeap = ( uint8_t * ) uxAddress;
/* xStart is used to hold a pointer to the first item in the list of free /* xStart is used to hold a pointer to the first item in the list of free
* blocks. The void cast is used to prevent compiler warnings. */ * blocks. The void cast is used to prevent compiler warnings. */
xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
xStart.xBlockSize = ( size_t ) 0; xStart.xBlockSize = ( size_t ) 0;
/* pxEnd is used to mark the end of the list of free blocks and is inserted /* pxEnd is used to mark the end of the list of free blocks and is inserted
* at the end of the heap space. */ * at the end of the heap space. */
uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
uxAddress -= xHeapStructSize; uxAddress -= xHeapStructSize;
uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK ); uxAddress &= ~( ( size_t ) secureportBYTE_ALIGNMENT_MASK );
pxEnd = ( void * ) uxAddress; pxEnd = ( void * ) uxAddress;
pxEnd->xBlockSize = 0; pxEnd->xBlockSize = 0;
pxEnd->pxNextFreeBlock = NULL; pxEnd->pxNextFreeBlock = NULL;
/* To start with there is a single free block that is sized to take up the /* To start with there is a single free block that is sized to take up the
* entire heap space, minus the space taken by pxEnd. */ * entire heap space, minus the space taken by pxEnd. */
pxFirstFreeBlock = ( void * ) pucAlignedHeap; pxFirstFreeBlock = ( void * ) pucAlignedHeap;
pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
pxFirstFreeBlock->pxNextFreeBlock = pxEnd; pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
/* Only one block exists - and it covers the entire usable heap space. */ /* Only one block exists - and it covers the entire usable heap space. */
xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
/* Work out the position of the top bit in a size_t variable. */ /* Work out the position of the top bit in a size_t variable. */
xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 ); xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * secureheapBITS_PER_BYTE ) - 1 );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ) static void prvInsertBlockIntoFreeList( BlockLink_t * pxBlockToInsert )
{ {
BlockLink_t *pxIterator; BlockLink_t * pxIterator;
uint8_t *puc; uint8_t * puc;
/* Iterate through the list until a block is found that has a higher address /* Iterate through the list until a block is found that has a higher address
* than the block being inserted. */ * than the block being inserted. */
for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock ) for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
{ {
/* Nothing to do here, just iterate to the right position. */ /* Nothing to do here, just iterate to the right position. */
} }
/* Do the block being inserted, and the block it is being inserted after /* Do the block being inserted, and the block it is being inserted after
* make a contiguous block of memory? */ * make a contiguous block of memory? */
puc = ( uint8_t * ) pxIterator; puc = ( uint8_t * ) pxIterator;
if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
{
pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
pxBlockToInsert = pxIterator;
}
else
{
mtCOVERAGE_TEST_MARKER();
}
/* Do the block being inserted, and the block it is being inserted before if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
* make a contiguous block of memory? */ {
puc = ( uint8_t * ) pxBlockToInsert; pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock ) pxBlockToInsert = pxIterator;
{ }
if( pxIterator->pxNextFreeBlock != pxEnd ) else
{ {
/* Form one big block from the two blocks. */ mtCOVERAGE_TEST_MARKER();
pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; }
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxEnd;
}
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
}
/* If the block being inserted plugged a gab, so was merged with the block /* Do the block being inserted, and the block it is being inserted before
* before and the block after, then it's pxNextFreeBlock pointer will have * make a contiguous block of memory? */
* already been set, and should not be set here as that would make it point puc = ( uint8_t * ) pxBlockToInsert;
* to itself. */
if( pxIterator != pxBlockToInsert ) if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
{ {
pxIterator->pxNextFreeBlock = pxBlockToInsert; if( pxIterator->pxNextFreeBlock != pxEnd )
} {
else /* Form one big block from the two blocks. */
{ pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
mtCOVERAGE_TEST_MARKER(); pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
} }
else
{
pxBlockToInsert->pxNextFreeBlock = pxEnd;
}
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
}
/* If the block being inserted plugged a gab, so was merged with the block
* before and the block after, then it's pxNextFreeBlock pointer will have
* already been set, and should not be set here as that would make it point
* to itself. */
if( pxIterator != pxBlockToInsert )
{
pxIterator->pxNextFreeBlock = pxBlockToInsert;
}
else
{
mtCOVERAGE_TEST_MARKER();
}
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void *pvPortMalloc( size_t xWantedSize ) void * pvPortMalloc( size_t xWantedSize )
{ {
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink; BlockLink_t * pxBlock, * pxPreviousBlock, * pxNewBlockLink;
void *pvReturn = NULL; void * pvReturn = NULL;
/* If this is the first call to malloc then the heap will require /* If this is the first call to malloc then the heap will require
* initialisation to setup the list of free blocks. */ * initialisation to setup the list of free blocks. */
if( pxEnd == NULL ) if( pxEnd == NULL )
{ {
prvHeapInit(); prvHeapInit();
} }
else else
{ {
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
/* Check the requested block size is not so large that the top bit is set. /* Check the requested block size is not so large that the top bit is set.
* The top bit of the block size member of the BlockLink_t structure is used * The top bit of the block size member of the BlockLink_t structure is used
* to determine who owns the block - the application or the kernel, so it * to determine who owns the block - the application or the kernel, so it
* must be free. */ * must be free. */
if( ( xWantedSize & xBlockAllocatedBit ) == 0 ) if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
{ {
/* The wanted size is increased so it can contain a BlockLink_t /* The wanted size is increased so it can contain a BlockLink_t
* structure in addition to the requested amount of bytes. */ * structure in addition to the requested amount of bytes. */
if( xWantedSize > 0 ) if( xWantedSize > 0 )
{ {
xWantedSize += xHeapStructSize; xWantedSize += xHeapStructSize;
/* Ensure that blocks are always aligned to the required number of /* Ensure that blocks are always aligned to the required number of
* bytes. */ * bytes. */
if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 ) if( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) != 0x00 )
{ {
/* Byte alignment required. */ /* Byte alignment required. */
xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) ); xWantedSize += ( secureportBYTE_ALIGNMENT - ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) );
secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 ); secureportASSERT( ( xWantedSize & secureportBYTE_ALIGNMENT_MASK ) == 0 );
} }
else else
{ {
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
} }
else else
{ {
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
{ {
/* Traverse the list from the start (lowest address) block until /* Traverse the list from the start (lowest address) block until
* one of adequate size is found. */ * one of adequate size is found. */
pxPreviousBlock = &xStart; pxPreviousBlock = &xStart;
pxBlock = xStart.pxNextFreeBlock; pxBlock = xStart.pxNextFreeBlock;
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
{
pxPreviousBlock = pxBlock;
pxBlock = pxBlock->pxNextFreeBlock;
}
/* If the end marker was reached then a block of adequate size was while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
* not found. */ {
if( pxBlock != pxEnd ) pxPreviousBlock = pxBlock;
{ pxBlock = pxBlock->pxNextFreeBlock;
/* Return the memory space pointed to - jumping over the }
* BlockLink_t structure at its start. */
pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
/* This block is being returned for use so must be taken out /* If the end marker was reached then a block of adequate size was
* of the list of free blocks. */ * not found. */
pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; if( pxBlock != pxEnd )
{
/* Return the memory space pointed to - jumping over the
* BlockLink_t structure at its start. */
pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
/* If the block is larger than required it can be split into /* This block is being returned for use so must be taken out
* two. */ * of the list of free blocks. */
if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE ) pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
{
/* This block is to be split into two. Create a new
* block following the number of bytes requested. The void
* cast is used to prevent byte alignment warnings from the
* compiler. */
pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
/* Calculate the sizes of two blocks split from the single /* If the block is larger than required it can be split into
* block. */ * two. */
pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; if( ( pxBlock->xBlockSize - xWantedSize ) > secureheapMINIMUM_BLOCK_SIZE )
pxBlock->xBlockSize = xWantedSize; {
/* This block is to be split into two. Create a new
* block following the number of bytes requested. The void
* cast is used to prevent byte alignment warnings from the
* compiler. */
pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
secureportASSERT( ( ( ( size_t ) pxNewBlockLink ) & secureportBYTE_ALIGNMENT_MASK ) == 0 );
/* Insert the new block into the list of free blocks. */ /* Calculate the sizes of two blocks split from the single
prvInsertBlockIntoFreeList( pxNewBlockLink ); * block. */
} pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
else pxBlock->xBlockSize = xWantedSize;
{
mtCOVERAGE_TEST_MARKER();
}
xFreeBytesRemaining -= pxBlock->xBlockSize; /* Insert the new block into the list of free blocks. */
prvInsertBlockIntoFreeList( pxNewBlockLink );
}
else
{
mtCOVERAGE_TEST_MARKER();
}
if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) xFreeBytesRemaining -= pxBlock->xBlockSize;
{
xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
}
else
{
mtCOVERAGE_TEST_MARKER();
}
/* The block is being returned - it is allocated and owned by if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
* the application and has no "next" block. */ {
pxBlock->xBlockSize |= xBlockAllocatedBit; xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
pxBlock->pxNextFreeBlock = NULL; }
} else
else {
{ mtCOVERAGE_TEST_MARKER();
mtCOVERAGE_TEST_MARKER(); }
}
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else
{
mtCOVERAGE_TEST_MARKER();
}
traceMALLOC( pvReturn, xWantedSize ); /* The block is being returned - it is allocated and owned by
* the application and has no "next" block. */
pxBlock->xBlockSize |= xBlockAllocatedBit;
pxBlock->pxNextFreeBlock = NULL;
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else
{
mtCOVERAGE_TEST_MARKER();
}
#if( secureconfigUSE_MALLOC_FAILED_HOOK == 1 ) traceMALLOC( pvReturn, xWantedSize );
{
if( pvReturn == NULL )
{
extern void vApplicationMallocFailedHook( void );
vApplicationMallocFailedHook();
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
#endif
secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 ); #if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 )
return pvReturn; {
if( pvReturn == NULL )
{
extern void vApplicationMallocFailedHook( void );
vApplicationMallocFailedHook();
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* if ( secureconfigUSE_MALLOC_FAILED_HOOK == 1 ) */
secureportASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) secureportBYTE_ALIGNMENT_MASK ) == 0 );
return pvReturn;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortFree( void *pv ) void vPortFree( void * pv )
{ {
uint8_t *puc = ( uint8_t * ) pv; uint8_t * puc = ( uint8_t * ) pv;
BlockLink_t *pxLink; BlockLink_t * pxLink;
if( pv != NULL ) if( pv != NULL )
{ {
/* The memory being freed will have an BlockLink_t structure immediately /* The memory being freed will have an BlockLink_t structure immediately
* before it. */ * before it. */
puc -= xHeapStructSize; puc -= xHeapStructSize;
/* This casting is to keep the compiler from issuing warnings. */ /* This casting is to keep the compiler from issuing warnings. */
pxLink = ( void * ) puc; pxLink = ( void * ) puc;
/* Check the block is actually allocated. */ /* Check the block is actually allocated. */
secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ); secureportASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
secureportASSERT( pxLink->pxNextFreeBlock == NULL ); secureportASSERT( pxLink->pxNextFreeBlock == NULL );
if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ) if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
{ {
if( pxLink->pxNextFreeBlock == NULL ) if( pxLink->pxNextFreeBlock == NULL )
{ {
/* The block is being returned to the heap - it is no longer /* The block is being returned to the heap - it is no longer
* allocated. */ * allocated. */
pxLink->xBlockSize &= ~xBlockAllocatedBit; pxLink->xBlockSize &= ~xBlockAllocatedBit;
secureportDISABLE_NON_SECURE_INTERRUPTS(); secureportDISABLE_NON_SECURE_INTERRUPTS();
{ {
/* Add this block to the list of free blocks. */ /* Add this block to the list of free blocks. */
xFreeBytesRemaining += pxLink->xBlockSize; xFreeBytesRemaining += pxLink->xBlockSize;
traceFREE( pv, pxLink->xBlockSize ); traceFREE( pv, pxLink->xBlockSize );
prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
} }
secureportENABLE_NON_SECURE_INTERRUPTS(); secureportENABLE_NON_SECURE_INTERRUPTS();
} }
else else
{ {
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
} }
else else
{ {
mtCOVERAGE_TEST_MARKER(); mtCOVERAGE_TEST_MARKER();
} }
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
size_t xPortGetFreeHeapSize( void ) size_t xPortGetFreeHeapSize( void )
{ {
return xFreeBytesRemaining; return xFreeBytesRemaining;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
size_t xPortGetMinimumEverFreeHeapSize( void ) size_t xPortGetMinimumEverFreeHeapSize( void )
{ {
return xMinimumEverFreeBytesRemaining; return xMinimumEverFreeBytesRemaining;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortInitialiseBlocks( void ) void vPortInitialiseBlocks( void )
{ {
/* This just exists to keep the linker quiet. */ /* This just exists to keep the linker quiet. */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -39,13 +39,13 @@
* @return Pointer to the memory region if the allocation is successful, NULL * @return Pointer to the memory region if the allocation is successful, NULL
* otherwise. * otherwise.
*/ */
void *pvPortMalloc( size_t xWantedSize ); void * pvPortMalloc( size_t xWantedSize );
/** /**
* @brief Frees the previously allocated memory. * @brief Frees the previously allocated memory.
* *
* @param[in] pv Pointer to the memory to be freed. * @param[in] pv Pointer to the memory to be freed.
*/ */
void vPortFree( void *pv ); void vPortFree( void * pv );
#endif /* __SECURE_HEAP_H__ */ #endif /* __SECURE_HEAP_H__ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -37,69 +37,69 @@
/** /**
* @brief Constants required to manipulate the SCB. * @brief Constants required to manipulate the SCB.
*/ */
#define secureinitSCB_AIRCR ( ( volatile uint32_t * ) 0xe000ed0c ) /* Application Interrupt and Reset Control Register. */ #define secureinitSCB_AIRCR ( ( volatile uint32_t * ) 0xe000ed0c ) /* Application Interrupt and Reset Control Register. */
#define secureinitSCB_AIRCR_VECTKEY_POS ( 16UL ) #define secureinitSCB_AIRCR_VECTKEY_POS ( 16UL )
#define secureinitSCB_AIRCR_VECTKEY_MASK ( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS ) #define secureinitSCB_AIRCR_VECTKEY_MASK ( 0xFFFFUL << secureinitSCB_AIRCR_VECTKEY_POS )
#define secureinitSCB_AIRCR_PRIS_POS ( 14UL ) #define secureinitSCB_AIRCR_PRIS_POS ( 14UL )
#define secureinitSCB_AIRCR_PRIS_MASK ( 1UL << secureinitSCB_AIRCR_PRIS_POS ) #define secureinitSCB_AIRCR_PRIS_MASK ( 1UL << secureinitSCB_AIRCR_PRIS_POS )
/** /**
* @brief Constants required to manipulate the FPU. * @brief Constants required to manipulate the FPU.
*/ */
#define secureinitFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating Point Context Control Register. */ #define secureinitFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating Point Context Control Register. */
#define secureinitFPCCR_LSPENS_POS ( 29UL ) #define secureinitFPCCR_LSPENS_POS ( 29UL )
#define secureinitFPCCR_LSPENS_MASK ( 1UL << secureinitFPCCR_LSPENS_POS ) #define secureinitFPCCR_LSPENS_MASK ( 1UL << secureinitFPCCR_LSPENS_POS )
#define secureinitFPCCR_TS_POS ( 26UL ) #define secureinitFPCCR_TS_POS ( 26UL )
#define secureinitFPCCR_TS_MASK ( 1UL << secureinitFPCCR_TS_POS ) #define secureinitFPCCR_TS_MASK ( 1UL << secureinitFPCCR_TS_POS )
#define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure Access Control Register. */ #define secureinitNSACR ( ( volatile uint32_t * ) 0xe000ed8c ) /* Non-secure Access Control Register. */
#define secureinitNSACR_CP10_POS ( 10UL ) #define secureinitNSACR_CP10_POS ( 10UL )
#define secureinitNSACR_CP10_MASK ( 1UL << secureinitNSACR_CP10_POS ) #define secureinitNSACR_CP10_MASK ( 1UL << secureinitNSACR_CP10_POS )
#define secureinitNSACR_CP11_POS ( 11UL ) #define secureinitNSACR_CP11_POS ( 11UL )
#define secureinitNSACR_CP11_MASK ( 1UL << secureinitNSACR_CP11_POS ) #define secureinitNSACR_CP11_MASK ( 1UL << secureinitNSACR_CP11_POS )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( void ) secureportNON_SECURE_CALLABLE void SecureInit_DePrioritizeNSExceptions( void )
{ {
uint32_t ulIPSR; uint32_t ulIPSR;
/* Read the Interrupt Program Status Register (IPSR) value. */ /* Read the Interrupt Program Status Register (IPSR) value. */
secureportREAD_IPSR( ulIPSR ); secureportREAD_IPSR( ulIPSR );
/* Do nothing if the processor is running in the Thread Mode. IPSR is zero /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
* when the processor is running in the Thread Mode. */ * when the processor is running in the Thread Mode. */
if( ulIPSR != 0 ) if( ulIPSR != 0 )
{ {
*( secureinitSCB_AIRCR ) = ( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) | *( secureinitSCB_AIRCR ) = ( *( secureinitSCB_AIRCR ) & ~( secureinitSCB_AIRCR_VECTKEY_MASK | secureinitSCB_AIRCR_PRIS_MASK ) ) |
( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) | ( ( 0x05FAUL << secureinitSCB_AIRCR_VECTKEY_POS ) & secureinitSCB_AIRCR_VECTKEY_MASK ) |
( ( 0x1UL << secureinitSCB_AIRCR_PRIS_POS ) & secureinitSCB_AIRCR_PRIS_MASK ); ( ( 0x1UL << secureinitSCB_AIRCR_PRIS_POS ) & secureinitSCB_AIRCR_PRIS_MASK );
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void ) secureportNON_SECURE_CALLABLE void SecureInit_EnableNSFPUAccess( void )
{ {
uint32_t ulIPSR; uint32_t ulIPSR;
/* Read the Interrupt Program Status Register (IPSR) value. */ /* Read the Interrupt Program Status Register (IPSR) value. */
secureportREAD_IPSR( ulIPSR ); secureportREAD_IPSR( ulIPSR );
/* Do nothing if the processor is running in the Thread Mode. IPSR is zero /* Do nothing if the processor is running in the Thread Mode. IPSR is zero
* when the processor is running in the Thread Mode. */ * when the processor is running in the Thread Mode. */
if( ulIPSR != 0 ) if( ulIPSR != 0 )
{ {
/* CP10 = 1 ==> Non-secure access to the Floating Point Unit is /* CP10 = 1 ==> Non-secure access to the Floating Point Unit is
* permitted. CP11 should be programmed to the same value as CP10. */ * permitted. CP11 should be programmed to the same value as CP10. */
*( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK ); *( secureinitNSACR ) |= ( secureinitNSACR_CP10_MASK | secureinitNSACR_CP11_MASK );
/* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures /* LSPENS = 0 ==> LSPEN is writable fron non-secure state. This ensures
* that we can enable/disable lazy stacking in port.c file. */ * that we can enable/disable lazy stacking in port.c file. */
*( secureinitFPCCR ) &= ~ ( secureinitFPCCR_LSPENS_MASK ); *( secureinitFPCCR ) &= ~( secureinitFPCCR_LSPENS_MASK );
/* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP /* TS = 1 ==> Treat FP registers as secure i.e. callee saved FP
* registers (S16-S31) are also pushed to stack on exception entry and * registers (S16-S31) are also pushed to stack on exception entry and
* restored on exception return. */ * restored on exception return. */
*( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK ); *( secureinitFPCCR ) |= ( secureinitFPCCR_TS_MASK );
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
@ -31,103 +31,103 @@
/** /**
* @brief Byte alignment requirements. * @brief Byte alignment requirements.
*/ */
#define secureportBYTE_ALIGNMENT 8 #define secureportBYTE_ALIGNMENT 8
#define secureportBYTE_ALIGNMENT_MASK ( 0x0007 ) #define secureportBYTE_ALIGNMENT_MASK ( 0x0007 )
/** /**
* @brief Macro to declare a function as non-secure callable. * @brief Macro to declare a function as non-secure callable.
*/ */
#if defined( __IAR_SYSTEMS_ICC__ ) #if defined( __IAR_SYSTEMS_ICC__ )
#define secureportNON_SECURE_CALLABLE __cmse_nonsecure_entry __root #define secureportNON_SECURE_CALLABLE __cmse_nonsecure_entry __root
#else #else
#define secureportNON_SECURE_CALLABLE __attribute__((cmse_nonsecure_entry)) __attribute__((used)) #define secureportNON_SECURE_CALLABLE __attribute__( ( cmse_nonsecure_entry ) ) __attribute__( ( used ) )
#endif #endif
/** /**
* @brief Set the secure PRIMASK value. * @brief Set the secure PRIMASK value.
*/ */
#define secureportSET_SECURE_PRIMASK( ulPrimaskValue ) \ #define secureportSET_SECURE_PRIMASK( ulPrimaskValue ) \
__asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" ) __asm volatile ( "msr primask, %0" : : "r" ( ulPrimaskValue ) : "memory" )
/** /**
* @brief Set the non-secure PRIMASK value. * @brief Set the non-secure PRIMASK value.
*/ */
#define secureportSET_NON_SECURE_PRIMASK( ulPrimaskValue ) \ #define secureportSET_NON_SECURE_PRIMASK( ulPrimaskValue ) \
__asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" ) __asm volatile ( "msr primask_ns, %0" : : "r" ( ulPrimaskValue ) : "memory" )
/** /**
* @brief Read the PSP value in the given variable. * @brief Read the PSP value in the given variable.
*/ */
#define secureportREAD_PSP( pucOutCurrentStackPointer ) \ #define secureportREAD_PSP( pucOutCurrentStackPointer ) \
__asm volatile ( "mrs %0, psp" : "=r" ( pucOutCurrentStackPointer ) ) __asm volatile ( "mrs %0, psp" : "=r" ( pucOutCurrentStackPointer ) )
/** /**
* @brief Set the PSP to the given value. * @brief Set the PSP to the given value.
*/ */
#define secureportSET_PSP( pucCurrentStackPointer ) \ #define secureportSET_PSP( pucCurrentStackPointer ) \
__asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) ) __asm volatile ( "msr psp, %0" : : "r" ( pucCurrentStackPointer ) )
/** /**
* @brief Set the PSPLIM to the given value. * @brief Set the PSPLIM to the given value.
*/ */
#define secureportSET_PSPLIM( pucStackLimit ) \ #define secureportSET_PSPLIM( pucStackLimit ) \
__asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) ) __asm volatile ( "msr psplim, %0" : : "r" ( pucStackLimit ) )
/** /**
* @brief Set the NonSecure MSP to the given value. * @brief Set the NonSecure MSP to the given value.
*/ */
#define secureportSET_MSP_NS( pucMainStackPointer ) \ #define secureportSET_MSP_NS( pucMainStackPointer ) \
__asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) ) __asm volatile ( "msr msp_ns, %0" : : "r" ( pucMainStackPointer ) )
/** /**
* @brief Set the CONTROL register to the given value. * @brief Set the CONTROL register to the given value.
*/ */
#define secureportSET_CONTROL( ulControl ) \ #define secureportSET_CONTROL( ulControl ) \
__asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" ) __asm volatile ( "msr control, %0" : : "r" ( ulControl ) : "memory" )
/** /**
* @brief Read the Interrupt Program Status Register (IPSR) value in the given * @brief Read the Interrupt Program Status Register (IPSR) value in the given
* variable. * variable.
*/ */
#define secureportREAD_IPSR( ulIPSR ) \ #define secureportREAD_IPSR( ulIPSR ) \
__asm volatile ( "mrs %0, ipsr" : "=r" ( ulIPSR ) ) __asm volatile ( "mrs %0, ipsr" : "=r" ( ulIPSR ) )
/** /**
* @brief PRIMASK value to enable interrupts. * @brief PRIMASK value to enable interrupts.
*/ */
#define secureportPRIMASK_ENABLE_INTERRUPTS_VAL 0 #define secureportPRIMASK_ENABLE_INTERRUPTS_VAL 0
/** /**
* @brief PRIMASK value to disable interrupts. * @brief PRIMASK value to disable interrupts.
*/ */
#define secureportPRIMASK_DISABLE_INTERRUPTS_VAL 1 #define secureportPRIMASK_DISABLE_INTERRUPTS_VAL 1
/** /**
* @brief Disable secure interrupts. * @brief Disable secure interrupts.
*/ */
#define secureportDISABLE_SECURE_INTERRUPTS() secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL ) #define secureportDISABLE_SECURE_INTERRUPTS() secureportSET_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
/** /**
* @brief Disable non-secure interrupts. * @brief Disable non-secure interrupts.
* *
* This effectively disables context switches. * This effectively disables context switches.
*/ */
#define secureportDISABLE_NON_SECURE_INTERRUPTS() secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL ) #define secureportDISABLE_NON_SECURE_INTERRUPTS() secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_DISABLE_INTERRUPTS_VAL )
/** /**
* @brief Enable non-secure interrupts. * @brief Enable non-secure interrupts.
*/ */
#define secureportENABLE_NON_SECURE_INTERRUPTS() secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL ) #define secureportENABLE_NON_SECURE_INTERRUPTS() secureportSET_NON_SECURE_PRIMASK( secureportPRIMASK_ENABLE_INTERRUPTS_VAL )
/** /**
* @brief Assert definition. * @brief Assert definition.
*/ */
#define secureportASSERT( x ) \ #define secureportASSERT( x ) \
if( ( x ) == 0 ) \ if( ( x ) == 0 ) \
{ \ { \
secureportDISABLE_SECURE_INTERRUPTS(); \ secureportDISABLE_SECURE_INTERRUPTS(); \
secureportDISABLE_NON_SECURE_INTERRUPTS(); \ secureportDISABLE_NON_SECURE_INTERRUPTS(); \
for( ;; ); \ for( ; ; ) {; } \
} }
#endif /* __SECURE_PORT_MACROS_H__ */ #endif /* __SECURE_PORT_MACROS_H__ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,76 +19,76 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the ARM CM4F port. * Implementation of functions defined in portable.h for the ARM CM3 port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
/* Scheduler includes. */ /* Scheduler includes. */
#include "FreeRTOS.h" #include "FreeRTOS.h"
#include "task.h" #include "task.h"
#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 ) #if ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
#endif #endif
#ifndef configSYSTICK_CLOCK_HZ #ifndef configSYSTICK_CLOCK_HZ
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
/* Ensure the SysTick is clocked at the same frequency as the core. */ /* Ensure the SysTick is clocked at the same frequency as the core. */
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL ) #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
#else #else
/* The way the SysTick is clocked is not modified in case it is not the same
as the core. */ /* The way the SysTick is clocked is not modified in case it is not the same
#define portNVIC_SYSTICK_CLK_BIT ( 0 ) * as the core. */
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
#endif #endif
/* Constants required to manipulate the core. Registers first... */ /* Constants required to manipulate the core. Registers first... */
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) ) #define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) ) #define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) ) #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) ) #define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
/* ...then bits in the registers. */ /* ...then bits in the registers. */
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL ) #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL ) #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL ) #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL ) #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL ) #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL ) #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL ) #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
/* Constants required to check the validity of an interrupt priority. */ /* Constants required to check the validity of an interrupt priority. */
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 ) #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 ) #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) ) #define portAIRCR_REG ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff ) #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 ) #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 ) #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL ) #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
#define portPRIGROUP_SHIFT ( 8UL ) #define portPRIGROUP_SHIFT ( 8UL )
/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */ /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
#define portVECTACTIVE_MASK ( 0xFFUL ) #define portVECTACTIVE_MASK ( 0xFFUL )
/* Constants required to set up the initial stack. */ /* Constants required to set up the initial stack. */
#define portINITIAL_XPSR ( 0x01000000 ) #define portINITIAL_XPSR ( 0x01000000 )
/* The systick is a 24-bit counter. */ /* The systick is a 24-bit counter. */
#define portMAX_24_BIT_NUMBER ( 0xffffffUL ) #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
/* A fiddle factor to estimate the number of SysTick counts that would have /* A fiddle factor to estimate the number of SysTick counts that would have
occurred while the SysTick counter is stopped during tickless idle * occurred while the SysTick counter is stopped during tickless idle
calculations. */ * calculations. */
#define portMISSED_COUNTS_FACTOR ( 45UL ) #define portMISSED_COUNTS_FACTOR ( 45UL )
/* For strict compliance with the Cortex-M spec the task start address should /* For strict compliance with the Cortex-M spec the task start address should
have bit-0 clear, as it is loaded into the PC on exit from an ISR. */ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL ) #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
/* /*
* Setup the timer to generate the tick interrupts. The implementation in this * Setup the timer to generate the tick interrupts. The implementation in this
@ -115,34 +115,34 @@ static void prvTaskExitError( void );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Required to allow portasm.asm access the configMAX_SYSCALL_INTERRUPT_PRIORITY /* Required to allow portasm.asm access the configMAX_SYSCALL_INTERRUPT_PRIORITY
setting. */ * setting. */
const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY; const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY;
/* Each task maintains its own interrupt status in the critical nesting /* Each task maintains its own interrupt status in the critical nesting
variable. */ * variable. */
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
/* /*
* The number of SysTick increments that make up one tick period. * The number of SysTick increments that make up one tick period.
*/ */
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
static uint32_t ulTimerCountsForOneTick = 0; static uint32_t ulTimerCountsForOneTick = 0;
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/* /*
* The maximum number of tick periods that can be suppressed is limited by the * The maximum number of tick periods that can be suppressed is limited by the
* 24 bit resolution of the SysTick timer. * 24 bit resolution of the SysTick timer.
*/ */
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
static uint32_t xMaximumPossibleSuppressedTicks = 0; static uint32_t xMaximumPossibleSuppressedTicks = 0;
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/* /*
* Compensate for the CPU cycles that pass while the SysTick is stopped (low * Compensate for the CPU cycles that pass while the SysTick is stopped (low
* power functionality only. * power functionality only.
*/ */
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
static uint32_t ulStoppedTimerCompensation = 0; static uint32_t ulStoppedTimerCompensation = 0;
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/* /*
@ -151,9 +151,9 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
*/ */
#if ( configASSERT_DEFINED == 1 ) #if ( configASSERT_DEFINED == 1 )
static uint8_t ucMaxSysCallPriority = 0; static uint8_t ucMaxSysCallPriority = 0;
static uint32_t ulMaxPRIGROUPValue = 0; static uint32_t ulMaxPRIGROUPValue = 0;
static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
#endif /* configASSERT_DEFINED */ #endif /* configASSERT_DEFINED */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -165,40 +165,43 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode, TaskFunction_t pxCode,
void * pvParameters ) void * pvParameters )
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
interrupt. */ * interrupt. */
/* Offset added to account for the way the MCU uses the stack on entry/exit /* Offset added to account for the way the MCU uses the stack on entry/exit
of interrupts, and to ensure alignment. */ * of interrupts, and to ensure alignment. */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */ *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */ *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
/* Save code space by skipping register initialisation. */ /* Save code space by skipping register initialisation. */
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
return pxTopOfStack; return pxTopOfStack;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static void prvTaskExitError( void ) static void prvTaskExitError( void )
{ {
/* A function that implements a task must not exit or attempt to return to /* A function that implements a task must not exit or attempt to return to
its caller as there is nothing to return to. If a task wants to exit it * its caller as there is nothing to return to. If a task wants to exit it
should instead call vTaskDelete( NULL ). * should instead call vTaskDelete( NULL ).
*
* Artificially force an assert() to be triggered if configASSERT() is
* defined, then stop here so application writers can catch the error. */
configASSERT( uxCriticalNesting == ~0UL );
portDISABLE_INTERRUPTS();
Artificially force an assert() to be triggered if configASSERT() is for( ; ; )
defined, then stop here so application writers can catch the error. */ {
configASSERT( uxCriticalNesting == ~0UL ); }
portDISABLE_INTERRUPTS();
for( ;; );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -207,308 +210,312 @@ static void prvTaskExitError( void )
*/ */
BaseType_t xPortStartScheduler( void ) BaseType_t xPortStartScheduler( void )
{ {
#if( configASSERT_DEFINED == 1 ) #if ( configASSERT_DEFINED == 1 )
{ {
volatile uint32_t ulOriginalPriority; volatile uint32_t ulOriginalPriority;
volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue; volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API /* Determine the maximum priority from which ISR safe FreeRTOS API
functions can be called. ISR safe functions are those that end in * functions can be called. ISR safe functions are those that end in
"FromISR". FreeRTOS maintains separate thread and ISR API functions to * "FromISR". FreeRTOS maintains separate thread and ISR API functions to
ensure interrupt entry is as fast and simple as possible. * ensure interrupt entry is as fast and simple as possible.
*
* Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pucFirstUserPriorityRegister;
Save the interrupt priority value that is about to be clobbered. */ /* Determine the number of priority bits available. First write to all
ulOriginalPriority = *pucFirstUserPriorityRegister; * possible bits. */
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Determine the number of priority bits available. First write to all /* Read the value back to see how many bits stuck. */
possible bits. */ ucMaxPriorityValue = *pucFirstUserPriorityRegister;
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */ /* Use the same mask on the maximum system call priority. */
ucMaxPriorityValue = *pucFirstUserPriorityRegister; ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
/* Use the same mask on the maximum system call priority. */ /* Calculate the maximum acceptable priority group value for the number
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; * of bits read back. */
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
/* Calculate the maximum acceptable priority group value for the number while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
of bits read back. */ {
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; ulMaxPRIGROUPValue--;
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) ucMaxPriorityValue <<= ( uint8_t ) 0x01;
{ }
ulMaxPRIGROUPValue--;
ucMaxPriorityValue <<= ( uint8_t ) 0x01;
}
#ifdef __NVIC_PRIO_BITS #ifdef __NVIC_PRIO_BITS
{ {
/* Check the CMSIS configuration that defines the number of /* Check the CMSIS configuration that defines the number of
priority bits matches the number of priority bits actually queried * priority bits matches the number of priority bits actually queried
from the hardware. */ * from the hardware. */
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS ); configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
} }
#endif #endif
#ifdef configPRIO_BITS #ifdef configPRIO_BITS
{ {
/* Check the FreeRTOS configuration that defines the number of /* Check the FreeRTOS configuration that defines the number of
priority bits matches the number of priority bits actually queried * priority bits matches the number of priority bits actually queried
from the hardware. */ * from the hardware. */
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS ); configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
} }
#endif #endif
/* Shift the priority group value back to its position within the AIRCR /* Shift the priority group value back to its position within the AIRCR
register. */ * register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
/* Restore the clobbered interrupt priority register to its original /* Restore the clobbered interrupt priority register to its original
value. */ * value. */
*pucFirstUserPriorityRegister = ulOriginalPriority; *pucFirstUserPriorityRegister = ulOriginalPriority;
} }
#endif /* conifgASSERT_DEFINED */ #endif /* conifgASSERT_DEFINED */
/* Make PendSV and SysTick the lowest priority interrupts. */ /* Make PendSV and SysTick the lowest priority interrupts. */
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI; portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI; portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
/* Start the timer that generates the tick ISR. Interrupts are disabled /* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */ * here already. */
vPortSetupTimerInterrupt(); vPortSetupTimerInterrupt();
/* Initialise the critical nesting count ready for the first task. */ /* Initialise the critical nesting count ready for the first task. */
uxCriticalNesting = 0; uxCriticalNesting = 0;
/* Start the first task. */ /* Start the first task. */
vPortStartFirstTask(); vPortStartFirstTask();
/* Should not get here! */ /* Should not get here! */
return 0; return 0;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortEndScheduler( void ) void vPortEndScheduler( void )
{ {
/* Not implemented in ports where there is nothing to return to. /* Not implemented in ports where there is nothing to return to.
Artificially force an assert. */ * Artificially force an assert. */
configASSERT( uxCriticalNesting == 1000UL ); configASSERT( uxCriticalNesting == 1000UL );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortEnterCritical( void ) void vPortEnterCritical( void )
{ {
portDISABLE_INTERRUPTS(); portDISABLE_INTERRUPTS();
uxCriticalNesting++; uxCriticalNesting++;
/* This is not the interrupt safe version of the enter critical function so /* This is not the interrupt safe version of the enter critical function so
assert() if it is being called from an interrupt context. Only API * assert() if it is being called from an interrupt context. Only API
functions that end in "FromISR" can be used in an interrupt. Only assert if * functions that end in "FromISR" can be used in an interrupt. Only assert if
the critical nesting count is 1 to protect against recursive calls if the * the critical nesting count is 1 to protect against recursive calls if the
assert function also uses a critical section. */ * assert function also uses a critical section. */
if( uxCriticalNesting == 1 ) if( uxCriticalNesting == 1 )
{ {
configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortExitCritical( void ) void vPortExitCritical( void )
{ {
configASSERT( uxCriticalNesting ); configASSERT( uxCriticalNesting );
uxCriticalNesting--; uxCriticalNesting--;
if( uxCriticalNesting == 0 )
{ if( uxCriticalNesting == 0 )
portENABLE_INTERRUPTS(); {
} portENABLE_INTERRUPTS();
}
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void xPortSysTickHandler( void ) void xPortSysTickHandler( void )
{ {
/* The SysTick runs at the lowest interrupt priority, so when this interrupt /* The SysTick runs at the lowest interrupt priority, so when this interrupt
executes all interrupts must be unmasked. There is therefore no need to * executes all interrupts must be unmasked. There is therefore no need to
save and then restore the interrupt mask value as its value is already * save and then restore the interrupt mask value as its value is already
known. */ * known. */
( void ) portSET_INTERRUPT_MASK_FROM_ISR(); ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
{ {
/* Increment the RTOS tick. */ /* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE ) if( xTaskIncrementTick() != pdFALSE )
{ {
/* A context switch is required. Context switching is performed in /* A context switch is required. Context switching is performed in
the PendSV interrupt. Pend the PendSV interrupt. */ * the PendSV interrupt. Pend the PendSV interrupt. */
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 ); portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
#pragma WEAK( vPortSuppressTicksAndSleep ) #pragma WEAK( vPortSuppressTicksAndSleep )
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{ {
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
TickType_t xModifiableIdleTime; TickType_t xModifiableIdleTime;
/* Make sure the SysTick reload value does not overflow the counter. */ /* Make sure the SysTick reload value does not overflow the counter. */
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks ) if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
{ {
xExpectedIdleTime = xMaximumPossibleSuppressedTicks; xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
} }
/* Stop the SysTick momentarily. The time the SysTick is stopped for /* Stop the SysTick momentarily. The time the SysTick is stopped for
is accounted for as best it can be, but using the tickless mode will * is accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the * inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */ * kernel with respect to calendar time. */
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT; portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
/* Calculate the reload value required to wait xExpectedIdleTime /* Calculate the reload value required to wait xExpectedIdleTime
tick periods. -1 is used because this code will execute part way * tick periods. -1 is used because this code will execute part way
through one of the tick periods. */ * through one of the tick periods. */
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
if( ulReloadValue > ulStoppedTimerCompensation )
{
ulReloadValue -= ulStoppedTimerCompensation;
}
/* Enter a critical section but don't use the taskENTER_CRITICAL() if( ulReloadValue > ulStoppedTimerCompensation )
method as that will mask interrupts that should exit sleep mode. */ {
__asm( " cpsid i" ); ulReloadValue -= ulStoppedTimerCompensation;
__asm( " dsb" ); }
__asm( " isb" );
/* Enter a critical section but don't use the taskENTER_CRITICAL()
* method as that will mask interrupts that should exit sleep mode. */
__asm( " cpsid i");
__asm( " dsb");
__asm( " isb");
/* If a context switch is pending or a task is waiting for the scheduler /* If a context switch is pending or a task is waiting for the scheduler
to be unsuspended then abandon the low power entry. */ * to be unsuspended then abandon the low power entry. */
if( eTaskConfirmSleepModeStatus() == eAbortSleep ) if( eTaskConfirmSleepModeStatus() == eAbortSleep )
{ {
/* Restart from whatever is left in the count register to complete /* Restart from whatever is left in the count register to complete
this tick period. */ * this tick period. */
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
/* Restart SysTick. */ /* Restart SysTick. */
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
/* Reset the reload register to the value required for normal tick /* Reset the reload register to the value required for normal tick
periods. */ * periods. */
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
/* Re-enable interrupts - see comments above __disable_interrupt() /* Re-enable interrupts - see comments above __disable_interrupt()
call above. */ * call above. */
__asm( " cpsie i" ); __asm( " cpsie i");
} }
else else
{ {
/* Set the new reload value. */ /* Set the new reload value. */
portNVIC_SYSTICK_LOAD_REG = ulReloadValue; portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
/* Clear the SysTick count flag and set the count value back to /* Clear the SysTick count flag and set the count value back to
zero. */ * zero. */
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Restart SysTick. */ /* Restart SysTick. */
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
set its parameter to 0 to indicate that its implementation contains * set its parameter to 0 to indicate that its implementation contains
its own wait for interrupt or wait for event instruction, and so wfi * its own wait for interrupt or wait for event instruction, and so wfi
should not be executed again. However, the original expected idle * should not be executed again. However, the original expected idle
time variable must remain unmodified, so a copy is taken. */ * time variable must remain unmodified, so a copy is taken. */
xModifiableIdleTime = xExpectedIdleTime; xModifiableIdleTime = xExpectedIdleTime;
configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
if( xModifiableIdleTime > 0 )
{
__asm( " dsb" );
__asm( " wfi" );
__asm( " isb" );
}
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
/* Re-enable interrupts to allow the interrupt that brought the MCU if( xModifiableIdleTime > 0 )
out of sleep mode to execute immediately. see comments above {
__disable_interrupt() call above. */ __asm( " dsb");
__asm( " cpsie i" ); __asm( " wfi");
__asm( " dsb" ); __asm( " isb");
__asm( " isb" ); }
/* Disable interrupts again because the clock is about to be stopped configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
and interrupts that execute while the clock is stopped will increase
any slippage between the time maintained by the RTOS and calendar
time. */
__asm( " cpsid i" );
__asm( " dsb" );
__asm( " isb" );
/* Disable the SysTick clock without reading the /* Re-enable interrupts to allow the interrupt that brought the MCU
portNVIC_SYSTICK_CTRL_REG register to ensure the * out of sleep mode to execute immediately. see comments above
portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again, * __disable_interrupt() call above. */
the time the SysTick is stopped for is accounted for as best it can __asm( " cpsie i");
be, but using the tickless mode will inevitably result in some tiny __asm( " dsb");
drift of the time maintained by the kernel with respect to calendar __asm( " isb");
time*/
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
/* Determine if the SysTick clock has already counted to zero and /* Disable interrupts again because the clock is about to be stopped
been set back to the current reload value (the reload back being * and interrupts that execute while the clock is stopped will increase
correct for the entire expected idle time) or if the SysTick is yet * any slippage between the time maintained by the RTOS and calendar
to count to zero (in which case an interrupt other than the SysTick * time. */
must have brought the system out of sleep mode). */ __asm( " cpsid i");
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 ) __asm( " dsb");
{ __asm( " isb");
uint32_t ulCalculatedLoadValue;
/* The tick interrupt is already pending, and the SysTick count /* Disable the SysTick clock without reading the
reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_CTRL_REG register to ensure the
portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
period. */ * the time the SysTick is stopped for is accounted for as best it can
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); * be, but using the tickless mode will inevitably result in some tiny
* drift of the time maintained by the kernel with respect to calendar
* time*/
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
/* Don't allow a tiny value, or values that have somehow /* Determine if the SysTick clock has already counted to zero and
underflowed because the post sleep hook did something * been set back to the current reload value (the reload back being
that took too long. */ * correct for the entire expected idle time) or if the SysTick is yet
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) ) * to count to zero (in which case an interrupt other than the SysTick
{ * must have brought the system out of sleep mode). */
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ); if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
} {
uint32_t ulCalculatedLoadValue;
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue; /* The tick interrupt is already pending, and the SysTick count
* reloaded with ulReloadValue. Reset the
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
* period. */
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
/* As the pending tick will be processed as soon as this /* Don't allow a tiny value, or values that have somehow
function exits, the tick value maintained by the tick is stepped * underflowed because the post sleep hook did something
forward by one less than the time spent waiting. */ * that took too long. */
ulCompleteTickPeriods = xExpectedIdleTime - 1UL; if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
} {
else ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
{ }
/* Something other than the tick interrupt ended the sleep.
Work out how long the sleep lasted rounded to complete tick
periods (not the ulReload value which accounted for part
ticks). */
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
/* How many complete tick periods passed while the processor portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
was waiting? */
ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
/* The reload value is set to whatever fraction of a single tick /* As the pending tick will be processed as soon as this
period remains. */ * function exits, the tick value maintained by the tick is stepped
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; * forward by one less than the time spent waiting. */
} ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
}
else
{
/* Something other than the tick interrupt ended the sleep.
* Work out how long the sleep lasted rounded to complete tick
* periods (not the ulReload value which accounted for part
* ticks). */
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG /* How many complete tick periods passed while the processor
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * was waiting? */
value. */ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
vTaskStepTick( ulCompleteTickPeriods );
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
/* Exit with interrupts enabled. */ /* The reload value is set to whatever fraction of a single tick
__asm( " cpsie i" ); * period remains. */
} portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
} }
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
* value. */
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
vTaskStepTick( ulCompleteTickPeriods );
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
/* Exit with interrupts enabled. */
__asm( " cpsie i");
}
}
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -520,102 +527,81 @@ void xPortSysTickHandler( void )
#pragma WEAK( vPortSetupTimerInterrupt ) #pragma WEAK( vPortSetupTimerInterrupt )
void vPortSetupTimerInterrupt( void ) void vPortSetupTimerInterrupt( void )
{ {
/* Calculate the constants required to configure the tick interrupt. */ /* Calculate the constants required to configure the tick interrupt. */
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
{ {
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
} }
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/* Stop and clear the SysTick. */ /* Stop and clear the SysTick. */
portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CTRL_REG = 0UL;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */ /* Configure SysTick to interrupt at the requested rate. */
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configASSERT_DEFINED == 1 ) #if ( configASSERT_DEFINED == 1 )
void vPortValidateInterruptPriority( void ) void vPortValidateInterruptPriority( void )
{ {
extern uint32_t ulPortGetIPSR( void ); extern uint32_t ulPortGetIPSR( void );
uint32_t ulCurrentInterrupt; uint32_t ulCurrentInterrupt;
uint8_t ucCurrentPriority; uint8_t ucCurrentPriority;
ulCurrentInterrupt = ulPortGetIPSR(); ulCurrentInterrupt = ulPortGetIPSR();
/* Is the interrupt number a user defined interrupt? */ /* Is the interrupt number a user defined interrupt? */
if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER ) if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
{ {
/* Look up the interrupt's priority. */ /* Look up the interrupt's priority. */
ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ]; ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
/* The following assertion will fail if a service routine (ISR) for /* The following assertion will fail if a service routine (ISR) for
an interrupt that has been assigned a priority above * an interrupt that has been assigned a priority above
configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
function. ISR safe FreeRTOS API functions must *only* be called * function. ISR safe FreeRTOS API functions must *only* be called
from interrupts that have been assigned a priority at or below * from interrupts that have been assigned a priority at or below
configMAX_SYSCALL_INTERRUPT_PRIORITY. * configMAX_SYSCALL_INTERRUPT_PRIORITY.
*
* Numerically low interrupt priority numbers represent logically high
* interrupt priorities, therefore the priority of the interrupt must
* be set to a value equal to or numerically *higher* than
* configMAX_SYSCALL_INTERRUPT_PRIORITY.
*
* Interrupts that use the FreeRTOS API must not be left at their
* default priority of zero as that is the highest possible priority,
* which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
* and therefore also guaranteed to be invalid.
*
* FreeRTOS maintains separate thread and ISR API functions to ensure
* interrupt entry is as fast and simple as possible.
*
* The following links provide detailed information:
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
* https://www.FreeRTOS.org/FAQHelp.html */
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
}
Numerically low interrupt priority numbers represent logically high /* Priority grouping: The interrupt controller (NVIC) allows the bits
interrupt priorities, therefore the priority of the interrupt must * that define each interrupt's priority to be split between bits that
be set to a value equal to or numerically *higher* than * define the interrupt's pre-emption priority bits and bits that define
configMAX_SYSCALL_INTERRUPT_PRIORITY. * the interrupt's sub-priority. For simplicity all bits must be defined
* to be pre-emption priority bits. The following assertion will fail if
Interrupts that use the FreeRTOS API must not be left at their * this is not the case (if some bits represent a sub-priority).
default priority of zero as that is the highest possible priority, *
which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY, * If the application only uses CMSIS libraries for interrupt
and therefore also guaranteed to be invalid. * configuration then the correct setting can be achieved on all Cortex-M
* devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
FreeRTOS maintains separate thread and ISR API functions to ensure * scheduler. Note however that some vendor specific peripheral libraries
interrupt entry is as fast and simple as possible. * assume a non-zero priority group setting, in which cases using a value
* of zero will result in unpredictable behaviour. */
The following links provide detailed information: configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
http://www.freertos.org/RTOS-Cortex-M3-M4.html }
http://www.freertos.org/FAQHelp.html */
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
}
/* Priority grouping: The interrupt controller (NVIC) allows the bits
that define each interrupt's priority to be split between bits that
define the interrupt's pre-emption priority bits and bits that define
the interrupt's sub-priority. For simplicity all bits must be defined
to be pre-emption priority bits. The following assertion will fail if
this is not the case (if some bits represent a sub-priority).
If the application only uses CMSIS libraries for interrupt
configuration then the correct setting can be achieved on all Cortex-M
devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
scheduler. Note however that some vendor specific peripheral libraries
assume a non-zero priority group setting, in which cases using a value
of zero will result in unpredictable behaviour. */
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
}
#endif /* configASSERT_DEFINED */ #endif /* configASSERT_DEFINED */

View file

@ -1,5 +1,5 @@
;/* ;/*
; * FreeRTOS Kernel V10.3.1 ; * FreeRTOS Kernel V10.4.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; * ; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
; * ; *
; * http://www.FreeRTOS.org ; * https://www.FreeRTOS.org
; * http://aws.amazon.com/freertos ; * https://github.com/FreeRTOS
; * ; *
; * 1 tab == 4 spaces! ; * 1 tab == 4 spaces!
; */ ; */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,19 +19,19 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -44,128 +44,127 @@ extern "C" {
*/ */
/* Type definitions. */ /* Type definitions. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Compiler directives. */ /* Compiler directives. */
#define portWEAK_SYMBOL __attribute__((weak)) #define portWEAK_SYMBOL __attribute__( ( weak ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Scheduler utilities. */ /* Scheduler utilities. */
#define portYIELD() \ #define portYIELD() \
{ \ { \
/* Set a PendSV to request a context switch. */ \ /* Set a PendSV to request a context switch. */ \
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
__asm( " dsb" ); \ __asm( " dsb"); \
__asm( " isb" ); \ __asm( " isb"); \
} }
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD() #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specific optimisations. */ /* Architecture specific optimisations. */
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#endif #endif
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Check the configuration. */ /* Check the configuration. */
#if( configMAX_PRIORITIES > 32 ) #if ( configMAX_PRIORITIES > 32 )
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
#endif #endif
/* Store/clear the ready priorities in a bit map. */ /* Store/clear the ready priorities in a bit map. */
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Critical section management. */ /* Critical section management. */
extern void vPortEnterCritical( void ); extern void vPortEnterCritical( void );
extern void vPortExitCritical( void ); extern void vPortExitCritical( void );
#define portDISABLE_INTERRUPTS() \ #define portDISABLE_INTERRUPTS() \
{ \ { \
_set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \ _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
__asm( " dsb" ); \ __asm( " dsb"); \
__asm( " isb" ); \ __asm( " isb"); \
} }
#define portENABLE_INTERRUPTS() _set_interrupt_priority( 0 ) #define portENABLE_INTERRUPTS() _set_interrupt_priority( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
#define portSET_INTERRUPT_MASK_FROM_ISR() _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm( " dsb" ); __asm( " isb" ) #define portSET_INTERRUPT_MASK_FROM_ISR() _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm( " dsb" ); __asm( " isb")
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) _set_interrupt_priority( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) _set_interrupt_priority( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Tickless idle/low power functionality. */ /* Tickless idle/low power functionality. */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. These are /* Task function macros as described on the FreeRTOS.org WEB site. These are
not necessary for to use this port. They are defined so the common demo files * not necessary for to use this port. They are defined so the common demo files
(which build with all the ports) will build. */ * (which build with all the ports) will build. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef configASSERT #ifdef configASSERT
void vPortValidateInterruptPriority( void ); void vPortValidateInterruptPriority( void );
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
#endif #endif
/* portNOP() is not required by this port. */ /* portNOP() is not required by this port. */
#define portNOP() #define portNOP()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,85 +19,85 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the ARM CM4F port. * Implementation of functions defined in portable.h for the ARM CM4F port.
*----------------------------------------------------------*/ *----------------------------------------------------------*/
/* Scheduler includes. */ /* Scheduler includes. */
#include "FreeRTOS.h" #include "FreeRTOS.h"
#include "task.h" #include "task.h"
#ifndef __TI_VFP_SUPPORT__ #ifndef __TI_VFP_SUPPORT__
#error This port can only be used when the project options are configured to enable hardware floating point support. #error This port can only be used when the project options are configured to enable hardware floating point support.
#endif #endif
#if( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 ) #if ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 )
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
#endif #endif
#ifndef configSYSTICK_CLOCK_HZ #ifndef configSYSTICK_CLOCK_HZ
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
/* Ensure the SysTick is clocked at the same frequency as the core. */ /* Ensure the SysTick is clocked at the same frequency as the core. */
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL ) #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
#else #else
/* The way the SysTick is clocked is not modified in case it is not the same
as the core. */ /* The way the SysTick is clocked is not modified in case it is not the same
#define portNVIC_SYSTICK_CLK_BIT ( 0 ) * as the core. */
#define portNVIC_SYSTICK_CLK_BIT ( 0 )
#endif #endif
/* Constants required to manipulate the core. Registers first... */ /* Constants required to manipulate the core. Registers first... */
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) ) #define portNVIC_SYSTICK_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000e010 ) )
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) ) #define portNVIC_SYSTICK_LOAD_REG ( *( ( volatile uint32_t * ) 0xe000e014 ) )
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) ) #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( *( ( volatile uint32_t * ) 0xe000e018 ) )
#define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) ) #define portNVIC_SHPR3_REG ( *( ( volatile uint32_t * ) 0xe000ed20 ) )
/* ...then bits in the registers. */ /* ...then bits in the registers. */
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL ) #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL ) #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL ) #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL ) #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL ) #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
#define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL ) #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
#define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL ) #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
/* Constants required to check the validity of an interrupt priority. */ /* Constants required to check the validity of an interrupt priority. */
#define portFIRST_USER_INTERRUPT_NUMBER ( 16 ) #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 ) #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
#define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) ) #define portAIRCR_REG ( *( ( volatile uint32_t * ) 0xE000ED0C ) )
#define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff ) #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
#define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 ) #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
#define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 ) #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL ) #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
#define portPRIGROUP_SHIFT ( 8UL ) #define portPRIGROUP_SHIFT ( 8UL )
/* Masks off all bits but the VECTACTIVE bits in the ICSR register. */ /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
#define portVECTACTIVE_MASK ( 0xFFUL ) #define portVECTACTIVE_MASK ( 0xFFUL )
/* Constants required to manipulate the VFP. */ /* Constants required to manipulate the VFP. */
#define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */ #define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
#define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL ) #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
/* Constants required to set up the initial stack. */ /* Constants required to set up the initial stack. */
#define portINITIAL_XPSR ( 0x01000000 ) #define portINITIAL_XPSR ( 0x01000000 )
#define portINITIAL_EXC_RETURN ( 0xfffffffd ) #define portINITIAL_EXC_RETURN ( 0xfffffffd )
/* The systick is a 24-bit counter. */ /* The systick is a 24-bit counter. */
#define portMAX_24_BIT_NUMBER ( 0xffffffUL ) #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
/* A fiddle factor to estimate the number of SysTick counts that would have /* A fiddle factor to estimate the number of SysTick counts that would have
occurred while the SysTick counter is stopped during tickless idle * occurred while the SysTick counter is stopped during tickless idle
calculations. */ * calculations. */
#define portMISSED_COUNTS_FACTOR ( 45UL ) #define portMISSED_COUNTS_FACTOR ( 45UL )
/* For strict compliance with the Cortex-M spec the task start address should /* For strict compliance with the Cortex-M spec the task start address should
have bit-0 clear, as it is loaded into the PC on exit from an ISR. */ * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
#define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL ) #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )
/* /*
* Setup the timer to generate the tick interrupts. The implementation in this * Setup the timer to generate the tick interrupts. The implementation in this
@ -129,34 +129,34 @@ static void prvTaskExitError( void );
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Required to allow portasm.asm access the configMAX_SYSCALL_INTERRUPT_PRIORITY /* Required to allow portasm.asm access the configMAX_SYSCALL_INTERRUPT_PRIORITY
setting. */ * setting. */
const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY; const uint32_t ulMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY;
/* Each task maintains its own interrupt status in the critical nesting /* Each task maintains its own interrupt status in the critical nesting
variable. */ * variable. */
static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
/* /*
* The number of SysTick increments that make up one tick period. * The number of SysTick increments that make up one tick period.
*/ */
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
static uint32_t ulTimerCountsForOneTick = 0; static uint32_t ulTimerCountsForOneTick = 0;
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/* /*
* The maximum number of tick periods that can be suppressed is limited by the * The maximum number of tick periods that can be suppressed is limited by the
* 24 bit resolution of the SysTick timer. * 24 bit resolution of the SysTick timer.
*/ */
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
static uint32_t xMaximumPossibleSuppressedTicks = 0; static uint32_t xMaximumPossibleSuppressedTicks = 0;
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/* /*
* Compensate for the CPU cycles that pass while the SysTick is stopped (low * Compensate for the CPU cycles that pass while the SysTick is stopped (low
* power functionality only. * power functionality only.
*/ */
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
static uint32_t ulStoppedTimerCompensation = 0; static uint32_t ulStoppedTimerCompensation = 0;
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/* /*
@ -165,9 +165,9 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
* a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY. * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
*/ */
#if ( configASSERT_DEFINED == 1 ) #if ( configASSERT_DEFINED == 1 )
static uint8_t ucMaxSysCallPriority = 0; static uint8_t ucMaxSysCallPriority = 0;
static uint32_t ulMaxPRIGROUPValue = 0; static uint32_t ulMaxPRIGROUPValue = 0;
static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16; static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
#endif /* configASSERT_DEFINED */ #endif /* configASSERT_DEFINED */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -175,47 +175,52 @@ static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
/* /*
* See header file for description. * See header file for description.
*/ */
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
TaskFunction_t pxCode,
void * pvParameters )
{ {
/* Simulate the stack frame as it would be created by a context switch /* Simulate the stack frame as it would be created by a context switch
interrupt. */ * interrupt. */
/* Offset added to account for the way the MCU uses the stack on entry/exit /* Offset added to account for the way the MCU uses the stack on entry/exit
of interrupts, and to ensure alignment. */ * of interrupts, and to ensure alignment. */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */ *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */ *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */ *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
/* Save code space by skipping register initialisation. */ /* Save code space by skipping register initialisation. */
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
/* A save method is being used that requires each task to maintain its /* A save method is being used that requires each task to maintain its
own exec return value. */ * own exec return value. */
pxTopOfStack--; pxTopOfStack--;
*pxTopOfStack = portINITIAL_EXC_RETURN; *pxTopOfStack = portINITIAL_EXC_RETURN;
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
return pxTopOfStack; return pxTopOfStack;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
static void prvTaskExitError( void ) static void prvTaskExitError( void )
{ {
/* A function that implements a task must not exit or attempt to return to /* A function that implements a task must not exit or attempt to return to
its caller as there is nothing to return to. If a task wants to exit it * its caller as there is nothing to return to. If a task wants to exit it
should instead call vTaskDelete( NULL ). * should instead call vTaskDelete( NULL ).
*
* Artificially force an assert() to be triggered if configASSERT() is
* defined, then stop here so application writers can catch the error. */
configASSERT( uxCriticalNesting == ~0UL );
portDISABLE_INTERRUPTS();
Artificially force an assert() to be triggered if configASSERT() is for( ; ; )
defined, then stop here so application writers can catch the error. */ {
configASSERT( uxCriticalNesting == ~0UL ); }
portDISABLE_INTERRUPTS();
for( ;; );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -224,314 +229,318 @@ static void prvTaskExitError( void )
*/ */
BaseType_t xPortStartScheduler( void ) BaseType_t xPortStartScheduler( void )
{ {
#if( configASSERT_DEFINED == 1 ) #if ( configASSERT_DEFINED == 1 )
{ {
volatile uint32_t ulOriginalPriority; volatile uint32_t ulOriginalPriority;
volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
volatile uint8_t ucMaxPriorityValue; volatile uint8_t ucMaxPriorityValue;
/* Determine the maximum priority from which ISR safe FreeRTOS API /* Determine the maximum priority from which ISR safe FreeRTOS API
functions can be called. ISR safe functions are those that end in * functions can be called. ISR safe functions are those that end in
"FromISR". FreeRTOS maintains separate thread and ISR API functions to * "FromISR". FreeRTOS maintains separate thread and ISR API functions to
ensure interrupt entry is as fast and simple as possible. * ensure interrupt entry is as fast and simple as possible.
*
* Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pucFirstUserPriorityRegister;
Save the interrupt priority value that is about to be clobbered. */ /* Determine the number of priority bits available. First write to all
ulOriginalPriority = *pucFirstUserPriorityRegister; * possible bits. */
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Determine the number of priority bits available. First write to all /* Read the value back to see how many bits stuck. */
possible bits. */ ucMaxPriorityValue = *pucFirstUserPriorityRegister;
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
/* Read the value back to see how many bits stuck. */ /* Use the same mask on the maximum system call priority. */
ucMaxPriorityValue = *pucFirstUserPriorityRegister; ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
/* Use the same mask on the maximum system call priority. */ /* Calculate the maximum acceptable priority group value for the number
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; * of bits read back. */
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
/* Calculate the maximum acceptable priority group value for the number while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
of bits read back. */ {
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; ulMaxPRIGROUPValue--;
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) ucMaxPriorityValue <<= ( uint8_t ) 0x01;
{ }
ulMaxPRIGROUPValue--;
ucMaxPriorityValue <<= ( uint8_t ) 0x01;
}
#ifdef __NVIC_PRIO_BITS #ifdef __NVIC_PRIO_BITS
{ {
/* Check the CMSIS configuration that defines the number of /* Check the CMSIS configuration that defines the number of
priority bits matches the number of priority bits actually queried * priority bits matches the number of priority bits actually queried
from the hardware. */ * from the hardware. */
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS ); configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
} }
#endif #endif
#ifdef configPRIO_BITS
{
/* Check the FreeRTOS configuration that defines the number of
priority bits matches the number of priority bits actually queried
from the hardware. */
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
}
#endif
/* Shift the priority group value back to its position within the AIRCR #ifdef configPRIO_BITS
register. */ {
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; /* Check the FreeRTOS configuration that defines the number of
ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; * priority bits matches the number of priority bits actually queried
* from the hardware. */
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
}
#endif
/* Restore the clobbered interrupt priority register to its original /* Shift the priority group value back to its position within the AIRCR
value. */ * register. */
*pucFirstUserPriorityRegister = ulOriginalPriority; ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
} ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
#endif /* conifgASSERT_DEFINED */
/* Make PendSV and SysTick the lowest priority interrupts. */ /* Restore the clobbered interrupt priority register to its original
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI; * value. */
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI; *pucFirstUserPriorityRegister = ulOriginalPriority;
}
#endif /* conifgASSERT_DEFINED */
/* Start the timer that generates the tick ISR. Interrupts are disabled /* Make PendSV and SysTick the lowest priority interrupts. */
here already. */ portNVIC_SHPR3_REG |= portNVIC_PENDSV_PRI;
vPortSetupTimerInterrupt(); portNVIC_SHPR3_REG |= portNVIC_SYSTICK_PRI;
/* Initialise the critical nesting count ready for the first task. */ /* Start the timer that generates the tick ISR. Interrupts are disabled
uxCriticalNesting = 0; * here already. */
vPortSetupTimerInterrupt();
/* Ensure the VFP is enabled - it should be anyway. */ /* Initialise the critical nesting count ready for the first task. */
vPortEnableVFP(); uxCriticalNesting = 0;
/* Lazy save always. */ /* Ensure the VFP is enabled - it should be anyway. */
*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; vPortEnableVFP();
/* Start the first task. */ /* Lazy save always. */
vPortStartFirstTask(); *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
/* Should not get here! */ /* Start the first task. */
return 0; vPortStartFirstTask();
/* Should not get here! */
return 0;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortEndScheduler( void ) void vPortEndScheduler( void )
{ {
/* Not implemented in ports where there is nothing to return to. /* Not implemented in ports where there is nothing to return to.
Artificially force an assert. */ * Artificially force an assert. */
configASSERT( uxCriticalNesting == 1000UL ); configASSERT( uxCriticalNesting == 1000UL );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortEnterCritical( void ) void vPortEnterCritical( void )
{ {
portDISABLE_INTERRUPTS(); portDISABLE_INTERRUPTS();
uxCriticalNesting++; uxCriticalNesting++;
/* This is not the interrupt safe version of the enter critical function so /* This is not the interrupt safe version of the enter critical function so
assert() if it is being called from an interrupt context. Only API * assert() if it is being called from an interrupt context. Only API
functions that end in "FromISR" can be used in an interrupt. Only assert if * functions that end in "FromISR" can be used in an interrupt. Only assert if
the critical nesting count is 1 to protect against recursive calls if the * the critical nesting count is 1 to protect against recursive calls if the
assert function also uses a critical section. */ * assert function also uses a critical section. */
if( uxCriticalNesting == 1 ) if( uxCriticalNesting == 1 )
{ {
configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void vPortExitCritical( void ) void vPortExitCritical( void )
{ {
configASSERT( uxCriticalNesting ); configASSERT( uxCriticalNesting );
uxCriticalNesting--; uxCriticalNesting--;
if( uxCriticalNesting == 0 )
{ if( uxCriticalNesting == 0 )
portENABLE_INTERRUPTS(); {
} portENABLE_INTERRUPTS();
}
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
void xPortSysTickHandler( void ) void xPortSysTickHandler( void )
{ {
/* The SysTick runs at the lowest interrupt priority, so when this interrupt /* The SysTick runs at the lowest interrupt priority, so when this interrupt
executes all interrupts must be unmasked. There is therefore no need to * executes all interrupts must be unmasked. There is therefore no need to
save and then restore the interrupt mask value as its value is already * save and then restore the interrupt mask value as its value is already
known. */ * known. */
( void ) portSET_INTERRUPT_MASK_FROM_ISR(); ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
{ {
/* Increment the RTOS tick. */ /* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE ) if( xTaskIncrementTick() != pdFALSE )
{ {
/* A context switch is required. Context switching is performed in /* A context switch is required. Context switching is performed in
the PendSV interrupt. Pend the PendSV interrupt. */ * the PendSV interrupt. Pend the PendSV interrupt. */
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
} }
} }
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 ); portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
#pragma WEAK( vPortSuppressTicksAndSleep ) #pragma WEAK( vPortSuppressTicksAndSleep )
void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
{ {
uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements; uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
TickType_t xModifiableIdleTime; TickType_t xModifiableIdleTime;
/* Make sure the SysTick reload value does not overflow the counter. */ /* Make sure the SysTick reload value does not overflow the counter. */
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks ) if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
{ {
xExpectedIdleTime = xMaximumPossibleSuppressedTicks; xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
} }
/* Stop the SysTick momentarily. The time the SysTick is stopped for /* Stop the SysTick momentarily. The time the SysTick is stopped for
is accounted for as best it can be, but using the tickless mode will * is accounted for as best it can be, but using the tickless mode will
inevitably result in some tiny drift of the time maintained by the * inevitably result in some tiny drift of the time maintained by the
kernel with respect to calendar time. */ * kernel with respect to calendar time. */
portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT; portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
/* Calculate the reload value required to wait xExpectedIdleTime /* Calculate the reload value required to wait xExpectedIdleTime
tick periods. -1 is used because this code will execute part way * tick periods. -1 is used because this code will execute part way
through one of the tick periods. */ * through one of the tick periods. */
ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
if( ulReloadValue > ulStoppedTimerCompensation )
{
ulReloadValue -= ulStoppedTimerCompensation;
}
/* Enter a critical section but don't use the taskENTER_CRITICAL() if( ulReloadValue > ulStoppedTimerCompensation )
method as that will mask interrupts that should exit sleep mode. */ {
__asm( " cpsid i" ); ulReloadValue -= ulStoppedTimerCompensation;
__asm( " dsb" ); }
__asm( " isb" );
/* Enter a critical section but don't use the taskENTER_CRITICAL()
* method as that will mask interrupts that should exit sleep mode. */
__asm( " cpsid i");
__asm( " dsb");
__asm( " isb");
/* If a context switch is pending or a task is waiting for the scheduler /* If a context switch is pending or a task is waiting for the scheduler
to be unsuspended then abandon the low power entry. */ * to be unsuspended then abandon the low power entry. */
if( eTaskConfirmSleepModeStatus() == eAbortSleep ) if( eTaskConfirmSleepModeStatus() == eAbortSleep )
{ {
/* Restart from whatever is left in the count register to complete /* Restart from whatever is left in the count register to complete
this tick period. */ * this tick period. */
portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG; portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
/* Restart SysTick. */ /* Restart SysTick. */
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
/* Reset the reload register to the value required for normal tick /* Reset the reload register to the value required for normal tick
periods. */ * periods. */
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
/* Re-enable interrupts - see comments above __disable_interrupt() /* Re-enable interrupts - see comments above __disable_interrupt()
call above. */ * call above. */
__asm( " cpsie i" ); __asm( " cpsie i");
} }
else else
{ {
/* Set the new reload value. */ /* Set the new reload value. */
portNVIC_SYSTICK_LOAD_REG = ulReloadValue; portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
/* Clear the SysTick count flag and set the count value back to /* Clear the SysTick count flag and set the count value back to
zero. */ * zero. */
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Restart SysTick. */ /* Restart SysTick. */
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT; portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
set its parameter to 0 to indicate that its implementation contains * set its parameter to 0 to indicate that its implementation contains
its own wait for interrupt or wait for event instruction, and so wfi * its own wait for interrupt or wait for event instruction, and so wfi
should not be executed again. However, the original expected idle * should not be executed again. However, the original expected idle
time variable must remain unmodified, so a copy is taken. */ * time variable must remain unmodified, so a copy is taken. */
xModifiableIdleTime = xExpectedIdleTime; xModifiableIdleTime = xExpectedIdleTime;
configPRE_SLEEP_PROCESSING( xModifiableIdleTime ); configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
if( xModifiableIdleTime > 0 )
{
__asm( " dsb" );
__asm( " wfi" );
__asm( " isb" );
}
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
/* Re-enable interrupts to allow the interrupt that brought the MCU if( xModifiableIdleTime > 0 )
out of sleep mode to execute immediately. see comments above {
__disable_interrupt() call above. */ __asm( " dsb");
__asm( " cpsie i" ); __asm( " wfi");
__asm( " dsb" ); __asm( " isb");
__asm( " isb" ); }
/* Disable interrupts again because the clock is about to be stopped configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
and interrupts that execute while the clock is stopped will increase
any slippage between the time maintained by the RTOS and calendar
time. */
__asm( " cpsid i" );
__asm( " dsb" );
__asm( " isb" );
/* Disable the SysTick clock without reading the /* Re-enable interrupts to allow the interrupt that brought the MCU
portNVIC_SYSTICK_CTRL_REG register to ensure the * out of sleep mode to execute immediately. see comments above
portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again, * __disable_interrupt() call above. */
the time the SysTick is stopped for is accounted for as best it can __asm( " cpsie i");
be, but using the tickless mode will inevitably result in some tiny __asm( " dsb");
drift of the time maintained by the kernel with respect to calendar __asm( " isb");
time*/
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
/* Determine if the SysTick clock has already counted to zero and /* Disable interrupts again because the clock is about to be stopped
been set back to the current reload value (the reload back being * and interrupts that execute while the clock is stopped will increase
correct for the entire expected idle time) or if the SysTick is yet * any slippage between the time maintained by the RTOS and calendar
to count to zero (in which case an interrupt other than the SysTick * time. */
must have brought the system out of sleep mode). */ __asm( " cpsid i");
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 ) __asm( " dsb");
{ __asm( " isb");
uint32_t ulCalculatedLoadValue;
/* The tick interrupt is already pending, and the SysTick count /* Disable the SysTick clock without reading the
reloaded with ulReloadValue. Reset the * portNVIC_SYSTICK_CTRL_REG register to ensure the
portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick * portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
period. */ * the time the SysTick is stopped for is accounted for as best it can
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG ); * be, but using the tickless mode will inevitably result in some tiny
* drift of the time maintained by the kernel with respect to calendar
* time*/
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
/* Don't allow a tiny value, or values that have somehow /* Determine if the SysTick clock has already counted to zero and
underflowed because the post sleep hook did something * been set back to the current reload value (the reload back being
that took too long. */ * correct for the entire expected idle time) or if the SysTick is yet
if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) ) * to count to zero (in which case an interrupt other than the SysTick
{ * must have brought the system out of sleep mode). */
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ); if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
} {
uint32_t ulCalculatedLoadValue;
portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue; /* The tick interrupt is already pending, and the SysTick count
* reloaded with ulReloadValue. Reset the
* portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
* period. */
ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
/* As the pending tick will be processed as soon as this /* Don't allow a tiny value, or values that have somehow
function exits, the tick value maintained by the tick is stepped * underflowed because the post sleep hook did something
forward by one less than the time spent waiting. */ * that took too long. */
ulCompleteTickPeriods = xExpectedIdleTime - 1UL; if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
} {
else ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
{ }
/* Something other than the tick interrupt ended the sleep.
Work out how long the sleep lasted rounded to complete tick
periods (not the ulReload value which accounted for part
ticks). */
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
/* How many complete tick periods passed while the processor portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
was waiting? */
ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
/* The reload value is set to whatever fraction of a single tick /* As the pending tick will be processed as soon as this
period remains. */ * function exits, the tick value maintained by the tick is stepped
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; * forward by one less than the time spent waiting. */
} ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
}
else
{
/* Something other than the tick interrupt ended the sleep.
* Work out how long the sleep lasted rounded to complete tick
* periods (not the ulReload value which accounted for part
* ticks). */
ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG /* How many complete tick periods passed while the processor
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard * was waiting? */
value. */ ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
vTaskStepTick( ulCompleteTickPeriods );
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
/* Exit with interrupts enabled. */ /* The reload value is set to whatever fraction of a single tick
__asm( " cpsie i" ); * period remains. */
} portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
} }
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
* again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
* value. */
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
vTaskStepTick( ulCompleteTickPeriods );
portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
/* Exit with interrupts enabled. */
__asm( " cpsie i");
}
}
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -543,102 +552,81 @@ void xPortSysTickHandler( void )
#pragma WEAK( vPortSetupTimerInterrupt ) #pragma WEAK( vPortSetupTimerInterrupt )
void vPortSetupTimerInterrupt( void ) void vPortSetupTimerInterrupt( void )
{ {
/* Calculate the constants required to configure the tick interrupt. */ /* Calculate the constants required to configure the tick interrupt. */
#if( configUSE_TICKLESS_IDLE == 1 ) #if ( configUSE_TICKLESS_IDLE == 1 )
{ {
ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
} }
#endif /* configUSE_TICKLESS_IDLE */ #endif /* configUSE_TICKLESS_IDLE */
/* Stop and clear the SysTick. */ /* Stop and clear the SysTick. */
portNVIC_SYSTICK_CTRL_REG = 0UL; portNVIC_SYSTICK_CTRL_REG = 0UL;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */ /* Configure SysTick to interrupt at the requested rate. */
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#if( configASSERT_DEFINED == 1 ) #if ( configASSERT_DEFINED == 1 )
void vPortValidateInterruptPriority( void ) void vPortValidateInterruptPriority( void )
{ {
extern uint32_t ulPortGetIPSR( void ); extern uint32_t ulPortGetIPSR( void );
uint32_t ulCurrentInterrupt; uint32_t ulCurrentInterrupt;
uint8_t ucCurrentPriority; uint8_t ucCurrentPriority;
ulCurrentInterrupt = ulPortGetIPSR(); ulCurrentInterrupt = ulPortGetIPSR();
/* Is the interrupt number a user defined interrupt? */ /* Is the interrupt number a user defined interrupt? */
if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER ) if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
{ {
/* Look up the interrupt's priority. */ /* Look up the interrupt's priority. */
ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ]; ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
/* The following assertion will fail if a service routine (ISR) for /* The following assertion will fail if a service routine (ISR) for
an interrupt that has been assigned a priority above * an interrupt that has been assigned a priority above
configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API * configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
function. ISR safe FreeRTOS API functions must *only* be called * function. ISR safe FreeRTOS API functions must *only* be called
from interrupts that have been assigned a priority at or below * from interrupts that have been assigned a priority at or below
configMAX_SYSCALL_INTERRUPT_PRIORITY. * configMAX_SYSCALL_INTERRUPT_PRIORITY.
*
* Numerically low interrupt priority numbers represent logically high
* interrupt priorities, therefore the priority of the interrupt must
* be set to a value equal to or numerically *higher* than
* configMAX_SYSCALL_INTERRUPT_PRIORITY.
*
* Interrupts that use the FreeRTOS API must not be left at their
* default priority of zero as that is the highest possible priority,
* which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
* and therefore also guaranteed to be invalid.
*
* FreeRTOS maintains separate thread and ISR API functions to ensure
* interrupt entry is as fast and simple as possible.
*
* The following links provide detailed information:
* https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
* https://www.FreeRTOS.org/FAQHelp.html */
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
}
Numerically low interrupt priority numbers represent logically high /* Priority grouping: The interrupt controller (NVIC) allows the bits
interrupt priorities, therefore the priority of the interrupt must * that define each interrupt's priority to be split between bits that
be set to a value equal to or numerically *higher* than * define the interrupt's pre-emption priority bits and bits that define
configMAX_SYSCALL_INTERRUPT_PRIORITY. * the interrupt's sub-priority. For simplicity all bits must be defined
* to be pre-emption priority bits. The following assertion will fail if
Interrupts that use the FreeRTOS API must not be left at their * this is not the case (if some bits represent a sub-priority).
default priority of zero as that is the highest possible priority, *
which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY, * If the application only uses CMSIS libraries for interrupt
and therefore also guaranteed to be invalid. * configuration then the correct setting can be achieved on all Cortex-M
* devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
FreeRTOS maintains separate thread and ISR API functions to ensure * scheduler. Note however that some vendor specific peripheral libraries
interrupt entry is as fast and simple as possible. * assume a non-zero priority group setting, in which cases using a value
* of zero will result in unpredictable behaviour. */
The following links provide detailed information: configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
http://www.freertos.org/RTOS-Cortex-M3-M4.html }
http://www.freertos.org/FAQHelp.html */
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
}
/* Priority grouping: The interrupt controller (NVIC) allows the bits
that define each interrupt's priority to be split between bits that
define the interrupt's pre-emption priority bits and bits that define
the interrupt's sub-priority. For simplicity all bits must be defined
to be pre-emption priority bits. The following assertion will fail if
this is not the case (if some bits represent a sub-priority).
If the application only uses CMSIS libraries for interrupt
configuration then the correct setting can be achieved on all Cortex-M
devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
scheduler. Note however that some vendor specific peripheral libraries
assume a non-zero priority group setting, in which cases using a value
of zero will result in unpredictable behaviour. */
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
}
#endif /* configASSERT_DEFINED */ #endif /* configASSERT_DEFINED */

View file

@ -1,5 +1,5 @@
;/* ;/*
; * FreeRTOS Kernel V10.3.1 ; * FreeRTOS Kernel V10.4.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; * ; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
; * ; *
; * http://www.FreeRTOS.org ; * https://www.FreeRTOS.org
; * http://aws.amazon.com/freertos ; * https://github.com/FreeRTOS
; * ; *
; * 1 tab == 4 spaces! ; * 1 tab == 4 spaces!
; */ ; */

View file

@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,19 +19,19 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -44,122 +44,121 @@ extern "C" {
*/ */
/* Type definitions. */ /* Type definitions. */
#define portCHAR char #define portCHAR char
#define portFLOAT float #define portFLOAT float
#define portDOUBLE double #define portDOUBLE double
#define portLONG long #define portLONG long
#define portSHORT short #define portSHORT short
#define portSTACK_TYPE uint32_t #define portSTACK_TYPE uint32_t
#define portBASE_TYPE long #define portBASE_TYPE long
typedef portSTACK_TYPE StackType_t; typedef portSTACK_TYPE StackType_t;
typedef long BaseType_t; typedef long BaseType_t;
typedef unsigned long UBaseType_t; typedef unsigned long UBaseType_t;
#if( configUSE_16_BIT_TICKS == 1 ) #if ( configUSE_16_BIT_TICKS == 1 )
typedef uint16_t TickType_t; typedef uint16_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffff #define portMAX_DELAY ( TickType_t ) 0xffff
#else #else
typedef uint32_t TickType_t; typedef uint32_t TickType_t;
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
not need to be guarded with a critical section. */ * not need to be guarded with a critical section. */
#define portTICK_TYPE_IS_ATOMIC 1 #define portTICK_TYPE_IS_ATOMIC 1
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specifics. */ /* Architecture specifics. */
#define portSTACK_GROWTH ( -1 ) #define portSTACK_GROWTH ( -1 )
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
#define portBYTE_ALIGNMENT 8 #define portBYTE_ALIGNMENT 8
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Scheduler utilities. */ /* Scheduler utilities. */
#define portYIELD() \ #define portYIELD() \
{ \ { \
/* Set a PendSV to request a context switch. */ \ /* Set a PendSV to request a context switch. */ \
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
__asm( " dsb" ); \ __asm( " dsb"); \
__asm( " isb" ); \ __asm( " isb"); \
} }
#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD() #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Architecture specific optimisations. */ /* Architecture specific optimisations. */
#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#endif #endif
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
/* Check the configuration. */ /* Check the configuration. */
#if( configMAX_PRIORITIES > 32 ) #if ( configMAX_PRIORITIES > 32 )
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice. #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
#endif #endif
/* Store/clear the ready priorities in a bit map. */ /* Store/clear the ready priorities in a bit map. */
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) ) #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */ #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Critical section management. */ /* Critical section management. */
extern void vPortEnterCritical( void ); extern void vPortEnterCritical( void );
extern void vPortExitCritical( void ); extern void vPortExitCritical( void );
#define portDISABLE_INTERRUPTS() \ #define portDISABLE_INTERRUPTS() \
{ \ { \
_set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \ _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); \
__asm( " dsb" ); \ __asm( " dsb"); \
__asm( " isb" ); \ __asm( " isb"); \
} }
#define portENABLE_INTERRUPTS() _set_interrupt_priority( 0 ) #define portENABLE_INTERRUPTS() _set_interrupt_priority( 0 )
#define portENTER_CRITICAL() vPortEnterCritical() #define portENTER_CRITICAL() vPortEnterCritical()
#define portEXIT_CRITICAL() vPortExitCritical() #define portEXIT_CRITICAL() vPortExitCritical()
#define portSET_INTERRUPT_MASK_FROM_ISR() _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm( " dsb" ); __asm( " isb" ) #define portSET_INTERRUPT_MASK_FROM_ISR() _set_interrupt_priority( configMAX_SYSCALL_INTERRUPT_PRIORITY ); __asm( " dsb" ); __asm( " isb")
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) _set_interrupt_priority( x ) #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) _set_interrupt_priority( x )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Tickless idle/low power functionality. */ /* Tickless idle/low power functionality. */
#ifndef portSUPPRESS_TICKS_AND_SLEEP #ifndef portSUPPRESS_TICKS_AND_SLEEP
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
#endif #endif
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Task function macros as described on the FreeRTOS.org WEB site. These are /* Task function macros as described on the FreeRTOS.org WEB site. These are
not necessary for to use this port. They are defined so the common demo files * not necessary for to use this port. They are defined so the common demo files
(which build with all the ports) will build. */ * (which build with all the ports) will build. */
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef configASSERT #ifdef configASSERT
void vPortValidateInterruptPriority( void ); void vPortValidateInterruptPriority( void );
#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority() #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
#endif #endif
/* portNOP() is not required by this port. */ /* portNOP() is not required by this port. */
#define portNOP() #define portNOP()
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
;/* ;/*
; * FreeRTOS Kernel V10.3.1 ; * FreeRTOS Kernel V10.4.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; * ; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
; * ; *
; * http://www.FreeRTOS.org ; * https://www.FreeRTOS.org
; * http://aws.amazon.com/freertos ; * https://github.com/FreeRTOS
; * ; *
; * 1 tab == 4 spaces! ; * 1 tab == 4 spaces!
; */ ; */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
;/* ;/*
; * FreeRTOS Kernel V10.3.1 ; * FreeRTOS Kernel V10.4.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; * ; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
; * ; *
; * http://www.FreeRTOS.org ; * https://www.FreeRTOS.org
; * http://aws.amazon.com/freertos ; * https://github.com/FreeRTOS
; * ; *
; * 1 tab == 4 spaces! ; * 1 tab == 4 spaces!
; */ ; */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
;/* ;/*
; * FreeRTOS Kernel V10.3.1 ; * FreeRTOS Kernel V10.4.1
; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
; * ; *
; * Permission is hereby granted, free of charge, to any person obtaining a copy of ; * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
; * ; *
; * http://www.FreeRTOS.org ; * https://www.FreeRTOS.org
; * http://aws.amazon.com/freertos ; * https://github.com/FreeRTOS
; * ; *
; * 1 tab == 4 spaces! ; * 1 tab == 4 spaces!
; */ ; */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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@ -1,5 +1,5 @@
/* /*
* FreeRTOS Kernel V10.3.1 * FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy of * Permission is hereby granted, free of charge, to any person obtaining a copy of
@ -19,8 +19,8 @@
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
* http://www.FreeRTOS.org * https://www.FreeRTOS.org
* http://aws.amazon.com/freertos * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces! * 1 tab == 4 spaces!
*/ */

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