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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-01 08:54:14 -04:00
Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library.
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6 changed files with 311 additions and 161 deletions
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@ -101,7 +101,11 @@
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#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )
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#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )
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#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )
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#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )
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#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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#define portPRIGROUP_SHIFT ( 8UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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@ -174,6 +178,7 @@ extern void vPortStartFirstTask( void );
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*/
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#if ( configASSERT_DEFINED == 1 )
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static unsigned char ucMaxSysCallPriority = 0;
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static unsigned long ulMaxPRIGROUPValue = 0;
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static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;
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#endif /* configASSERT_DEFINED */
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@ -209,6 +214,7 @@ portBASE_TYPE xPortStartScheduler( void )
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{
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volatile unsigned long ulOriginalPriority;
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volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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volatile unsigned char ucMaxPriorityValue;
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/* Determine the maximum priority from which ISR safe FreeRTOS API
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functions can be called. ISR safe functions are those that end in
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@ -218,13 +224,29 @@ portBASE_TYPE xPortStartScheduler( void )
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Save the interrupt priority value that is about to be clobbered. */
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ulOriginalPriority = *pcFirstUserPriorityRegister;
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/* Write the configMAX_SYSCALL_INTERRUPT_PRIORITY value to an interrupt
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priority register. */
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*pcFirstUserPriorityRegister = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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/* Determine the number of priority bits available. First write to all
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possible bits. */
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*pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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/* Read back the written priority to obtain its value as seen by the
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hardware, which will only implement a subset of the priority bits. */
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ucMaxSysCallPriority = *pcFirstUserPriorityRegister;
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/* Read the value back to see how many bits stuck. */
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ucMaxPriorityValue = *pcFirstUserPriorityRegister;
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/* Use the same mask on the maximum system call priority. */
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ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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/* Calculate the maximum acceptable priority group value for the number
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of bits read back. */
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ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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{
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ulMaxPRIGROUPValue--;
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ucMaxPriorityValue <<= ( unsigned char ) 0x01;
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}
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/* Shift the priority group value back to its position within the AIRCR
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register. */
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ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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/* Restore the clobbered interrupt priority register to its original
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value. */
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@ -475,43 +497,46 @@ __weak void vPortSetupTimerInterrupt( void )
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/* Look up the interrupt's priority. */
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ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
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/* The following assertion will fail if a service routine (ISR) for
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/* The following assertion will fail if a service routine (ISR) for
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an interrupt that has been assigned a priority above
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configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
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function. ISR safe FreeRTOS API functions must *only* be called
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function. ISR safe FreeRTOS API functions must *only* be called
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from interrupts that have been assigned a priority at or below
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configMAX_SYSCALL_INTERRUPT_PRIORITY.
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Numerically low interrupt priority numbers represent logically high
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interrupt priorities, therefore the priority of the interrupt must
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be set to a value equal to or numerically *higher* than
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interrupt priorities, therefore the priority of the interrupt must
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be set to a value equal to or numerically *higher* than
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configMAX_SYSCALL_INTERRUPT_PRIORITY.
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Interrupts that use the FreeRTOS API must not be left at their
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default priority of zero as that is the highest possible priority,
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which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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and therefore also guaranteed to be invalid.
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FreeRTOS maintains separate thread and ISR API functions to ensure
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which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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and therefore also guaranteed to be invalid.
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FreeRTOS maintains separate thread and ISR API functions to ensure
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interrupt entry is as fast and simple as possible.
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The following links provide detailed information:
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http://www.freertos.org/RTOS-Cortex-M3-M4.html
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http://www.freertos.org/FAQHelp.html */
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configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
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}
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/* Priority grouping: The interrupt controller (NVIC) allows the bits
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that define each interrupt's priority to be split between bits that
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/* Priority grouping: The interrupt controller (NVIC) allows the bits
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that define each interrupt's priority to be split between bits that
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define the interrupt's pre-emption priority bits and bits that define
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the interrupt's sub-priority. For simplicity all bits must be defined
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the interrupt's sub-priority. For simplicity all bits must be defined
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to be pre-emption priority bits. The following assertion will fail if
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this is not the case (if some bits represent a sub-priority).
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If CMSIS libraries are being used then the correct setting can be
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achieved by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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scheduler. */
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configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) == 0 );
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this is not the case (if some bits represent a sub-priority).
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If the application only uses CMSIS libraries for interrupt
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configuration then the correct setting can be achieved on all Cortex-M
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devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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scheduler. Note however that some vendor specific peripheral libraries
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assume a non-zero priority group setting, in which cases using a value
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of zero will result in unpredicable behaviour. */
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configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
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}
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#endif /* configASSERT_DEFINED */
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@ -105,7 +105,11 @@
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#define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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#define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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#define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )
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#define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )
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#define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )
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#define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )
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#define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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#define portPRIGROUP_SHIFT ( 8UL )
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/* Constants required to manipulate the VFP. */
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#define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */
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@ -182,6 +186,7 @@ extern void vPortEnableVFP( void );
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*/
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#if ( configASSERT_DEFINED == 1 )
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static unsigned char ucMaxSysCallPriority = 0;
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static unsigned long ulMaxPRIGROUPValue = 0;
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static const volatile unsigned char * const pcInterruptPriorityRegisters = ( const volatile unsigned char * const ) portNVIC_IP_REGISTERS_OFFSET_16;
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#endif /* configASSERT_DEFINED */
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@ -229,6 +234,7 @@ portBASE_TYPE xPortStartScheduler( void )
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{
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volatile unsigned long ulOriginalPriority;
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volatile char * const pcFirstUserPriorityRegister = ( volatile char * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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volatile unsigned char ucMaxPriorityValue;
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/* Determine the maximum priority from which ISR safe FreeRTOS API
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functions can be called. ISR safe functions are those that end in
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@ -238,13 +244,29 @@ portBASE_TYPE xPortStartScheduler( void )
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Save the interrupt priority value that is about to be clobbered. */
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ulOriginalPriority = *pcFirstUserPriorityRegister;
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/* Write the configMAX_SYSCALL_INTERRUPT_PRIORITY value to an interrupt
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priority register. */
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*pcFirstUserPriorityRegister = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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/* Determine the number of priority bits available. First write to all
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possible bits. */
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*pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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/* Read back the written priority to obtain its value as seen by the
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hardware, which will only implement a subset of the priority bits. */
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ucMaxSysCallPriority = *pcFirstUserPriorityRegister;
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/* Read the value back to see how many bits stuck. */
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ucMaxPriorityValue = *pcFirstUserPriorityRegister;
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/* Use the same mask on the maximum system call priority. */
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ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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/* Calculate the maximum acceptable priority group value for the number
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of bits read back. */
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ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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{
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ulMaxPRIGROUPValue--;
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ucMaxPriorityValue <<= ( unsigned char ) 0x01;
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}
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/* Shift the priority group value back to its position within the AIRCR
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register. */
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ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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/* Restore the clobbered interrupt priority register to its original
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value. */
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@ -501,43 +523,46 @@ __weak void vPortSetupTimerInterrupt( void )
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/* Look up the interrupt's priority. */
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ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
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/* The following assertion will fail if a service routine (ISR) for
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/* The following assertion will fail if a service routine (ISR) for
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an interrupt that has been assigned a priority above
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configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
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function. ISR safe FreeRTOS API functions must *only* be called
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function. ISR safe FreeRTOS API functions must *only* be called
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from interrupts that have been assigned a priority at or below
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configMAX_SYSCALL_INTERRUPT_PRIORITY.
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Numerically low interrupt priority numbers represent logically high
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interrupt priorities, therefore the priority of the interrupt must
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be set to a value equal to or numerically *higher* than
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interrupt priorities, therefore the priority of the interrupt must
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be set to a value equal to or numerically *higher* than
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configMAX_SYSCALL_INTERRUPT_PRIORITY.
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Interrupts that use the FreeRTOS API must not be left at their
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default priority of zero as that is the highest possible priority,
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which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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and therefore also guaranteed to be invalid.
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FreeRTOS maintains separate thread and ISR API functions to ensure
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which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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and therefore also guaranteed to be invalid.
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FreeRTOS maintains separate thread and ISR API functions to ensure
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interrupt entry is as fast and simple as possible.
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The following links provide detailed information:
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http://www.freertos.org/RTOS-Cortex-M3-M4.html
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http://www.freertos.org/FAQHelp.html */
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configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
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}
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/* Priority grouping: The interrupt controller (NVIC) allows the bits
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that define each interrupt's priority to be split between bits that
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/* Priority grouping: The interrupt controller (NVIC) allows the bits
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that define each interrupt's priority to be split between bits that
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define the interrupt's pre-emption priority bits and bits that define
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the interrupt's sub-priority. For simplicity all bits must be defined
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the interrupt's sub-priority. For simplicity all bits must be defined
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to be pre-emption priority bits. The following assertion will fail if
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this is not the case (if some bits represent a sub-priority).
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If CMSIS libraries are being used then the correct setting can be
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achieved by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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scheduler. */
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configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) == 0 );
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this is not the case (if some bits represent a sub-priority).
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If the application only uses CMSIS libraries for interrupt
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configuration then the correct setting can be achieved on all Cortex-M
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devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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scheduler. Note however that some vendor specific peripheral libraries
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assume a non-zero priority group setting, in which cases using a value
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of zero will result in unpredicable behaviour. */
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configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
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}
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#endif /* configASSERT_DEFINED */
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