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Continue to work on Fujitsu 32bit port.

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This commit is contained in:
Richard Barry 2008-02-11 18:28:03 +00:00
parent 7e6a2b0bd5
commit 6610911d3e
4 changed files with 327 additions and 104 deletions
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77
Demo/MB91460_Softune/91460_template_91467d.dat
View file

@ -10,84 +10,23 @@ $0
-I "..\..\Source\include"
-I "..\..\Source\portable\Softune\MB91460"
-I ".\SRC\utility"
-O 3
-K SIZE
-O 0
-K SHORTADDRESS
-B
-K SCHEDULE
-K NOSCHEDULE
-K A1
-K SARG
-Xdof
-INF STACK
-x vTaskIncrementTick,vTaskSwitchContext
-K EOPT
-K NOEOPT
-K NOLIB
-K NOUNROLL
$other
-Xalign
-D__91467D
$time
1202672931
$end
$..\..\Source\queue.c,0
-g
-w 1
-INF LIST
-I ".\SRC"
-I ".\SRC\watchdog"
-I "..\Common\include"
-I "..\..\Source\include"
-I "..\..\Source\portable\Softune\MB91460"
-I ".\SRC\utility"
-O 3
-K SIZE
-K SHORTADDRESS
-B
-K SCHEDULE
-K A1
-K SARG
-Xdof
-INF STACK
-x vTaskIncrementTick,vTaskSwitchContext
-K EOPT
-K NOLIB
-K NOUNROLL
$other
-Xalign
-D__91467D
-w 0
$time
1202672960
$end
$..\..\Source\tasks.c,0
-g
-w 1
-INF LIST
-I ".\SRC"
-I ".\SRC\watchdog"
-I "..\Common\include"
-I "..\..\Source\include"
-I "..\..\Source\portable\Softune\MB91460"
-I ".\SRC\utility"
-O 3
-K SIZE
-K SHORTADDRESS
-B
-K SCHEDULE
-K A1
-K SARG
-Xdof
-INF STACK
-x vTaskIncrementTick,vTaskSwitchContext
-K EOPT
-K NOLIB
-K NOUNROLL
$other
-Xalign
-D__91467D
-w 0
$time
1202672960
1202736093
$end
$1
-g
@ -133,7 +72,7 @@ $2
-Xdof
$other
$time
1202669532
1202753534
$end
$3
-dt s,d,r,a
@ -143,7 +82,7 @@ $3
-Xdof
$other
$time
1202669532
1202753534
$end
$4
-Xdof
@ -217,7 +156,7 @@ $2
-Xdof
$other
$time
1202669532
1202753534
$end
$3
-dt s,d,r,a
@ -227,7 +166,7 @@ $3
-Xdof
$other
$time
1202669532
1202753534
$end
$4
-Xdof

2
Demo/MB91460_Softune/91467d_FreeRTOS.wsp
View file

@ -18,6 +18,6 @@ AutoLoad=1
WSP=C:\E\Dev\FreeRTOS\WorkingCopy2\Demo\MB91460_Softune\
[EditState]
STATE-1=..\..\Source\portable\Softune\MB91460\port.c:233
STATE-1=SRC\main.c:1
Count=1

294
Demo/MB91460_Softune/SRC/main.c
View file

@ -107,6 +107,24 @@ static portSHORT prvCheckOtherTasksAreStillRunning( void );
*/
static void prvSetupHardware( void );
/*
* Tasks that test the context switch mechanism by filling the CPU registers
* with known values then checking that each register contains the value
* expected. Each of the two tasks use different values, and as low priority
* tasks, get swapped in and out regularly.
*/
static void vFirstRegisterTestTask( void *pvParameters );
static void vSecondRegisterTestTask( void *pvParameters );
/*---------------------------------------------------------------------------*/
/* The variable that is set to true should an error be found in one of the
register test tasks. */
unsigned portLONG ulRegTestError = pdFALSE;
/* Variables used to ensure the register check tasks are still executing. */
static volatile unsigned portLONG ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;
/*---------------------------------------------------------------------------*/
/* Start all the demo application tasks, then start the scheduler. */
@ -131,6 +149,9 @@ void main(void)
/* Start the 'Check' task which is defined in this file. */
xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
xTaskCreate( vFirstRegisterTestTask, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
xTaskCreate( vSecondRegisterTestTask, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
/* Start the task that write trace information to the UART. */
vUtilityStartTraceTask( mainUTILITY_TASK_PRIORITY );
@ -159,7 +180,6 @@ static void vErrorChecks( void *pvParameters )
{
portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;
/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
works correctly. */
xLastExecutionTime = xTaskGetTickCount();
@ -192,6 +212,7 @@ portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;
static portSHORT prvCheckOtherTasksAreStillRunning( void )
{
portBASE_TYPE lReturn = pdPASS;
static unsigned portLONG ulLastRegTest1Counter = 0UL, ulLastRegTest2Counter = 0UL;
/* The demo tasks maintain a count that increments every cycle of the task
provided that the task has never encountered an error. This function
@ -254,6 +275,26 @@ portBASE_TYPE lReturn = pdPASS;
lReturn = pdFAIL;
}
/* Have the register test tasks found any errors? */
if( ulRegTestError != pdFALSE )
{
lReturn = pdFAIL;
}
/* Are the register test tasks still running? */
if( ulLastRegTest1Counter == ulRegTest1Counter )
{
lReturn = pdFAIL;
}
if( ulLastRegTest2Counter == ulRegTest2Counter )
{
lReturn = pdFAIL;
}
ulLastRegTest1Counter = ulRegTest1Counter;
ulLastRegTest2Counter = ulRegTest2Counter;
return lReturn;
}
/*-----------------------------------------------------------*/
@ -279,7 +320,7 @@ static void prvSetupHardware( void )
/* The below callback function is called from Delayed ISR if configUSE_IDLE_HOOK
is configured as 1. */
#if configUSE_IDLE_HOOK == 1
void vApplicationIdleHook ( void )
void vApplicationIdleHook( void )
{
/* Are we using the idle task to kick the watchdog? */
#if WATCHDOG == WTC_IN_IDLE
@ -291,18 +332,265 @@ is configured as 1. */
#endif
}
#endif
/*-----------------------------------------------------------*/
/*
The below callback function is called from Tick ISR if configUSE_TICK_HOOK
is configured as 1. */
#if configUSE_TICK_HOOK == 1
void vApplicationTickHook ( void )
void vApplicationTickHook( void )
{
#if WATCHDOG == WTC_IN_TICK
Kick_Watchdog();
#endif
}
#endif
/*-----------------------------------------------------------*/
static void vFirstRegisterTestTask( void *pvParameters )
{
extern volatile unsigned portLONG ulCriticalNesting;
/* Fills the registers with known values (different to the values
used in vSecondRegisterTestTask()), then checks that the registers still
all contain the expected value. This is done to test the context save
and restore mechanism as this task is swapped onto and off of the CPU.
The critical nesting depth is also saved as part of the context so also
check this maintains an expected value. */
ulCriticalNesting = 0x12345678;
for( ;; )
{
#pragma asm
;Load known values into each register.
LDI #0x11111111, R0
LDI #0x22222222, R1
LDI #0x33333333, R2
LDI #0x44444444, R3
LDI #0x55555555, R4
LDI #0x66666666, R5
LDI #0x77777777, R6
LDI #0x88888888, R7
LDI #0x99999999, R8
LDI #0xaaaaaaaa, R9
LDI #0xbbbbbbbb, R10
LDI #0xcccccccc, R11
LDI #0xdddddddd, R12
;Check each register still contains the expected value.
LDI #0x11111111, R13
CMP R13, R0
BNE First_Set_Error
NOP
LDI #0x22222222, R13
CMP R13, R1
BNE First_Set_Error
NOP
LDI #0x33333333, R13
CMP R13, R2
BNE First_Set_Error
NOP
LDI #0x44444444, R13
CMP R13, R3
BNE First_Set_Error
NOP
LDI #0x55555555, R13
CMP R13, R4
BNE First_Set_Error
NOP
LDI #0x66666666, R13
CMP R13, R5
BNE First_Set_Error
NOP
LDI #0x77777777, R13
CMP R13, R6
BNE First_Set_Error
NOP
LDI #0x88888888, R13
CMP R13, R7
BNE First_Set_Error
NOP
LDI #0x99999999, R13
CMP R13, R8
BNE First_Set_Error
NOP
LDI #0xaaaaaaaa, R13
CMP R13, R9
BNE First_Set_Error
NOP
LDI #0xbbbbbbbb, R13
CMP R13, R10
BNE First_Set_Error
NOP
LDI #0xcccccccc, R13
CMP R13, R11
BNE First_Set_Error
NOP
LDI #0xdddddddd, R13
CMP R13, R12
BNE First_Set_Error
NOP
BRA First_Start_Next_Loop
NOP
First_Set_Error:
; Latch that an error has occurred.
LDI #_ulRegTestError, R0
LDI #0x00000001, R1
ST R1, @R0
First_Start_Next_Loop:
#pragma endasm
ulRegTest1Counter++;
if( ulCriticalNesting != 0x12345678 )
{
ulRegTestError = pdTRUE;
}
}
}
/*-----------------------------------------------------------*/
static void vSecondRegisterTestTask( void *pvParameters )
{
extern volatile unsigned portLONG ulCriticalNesting;
/* Fills the registers with known values (different to the values
used in vFirstRegisterTestTask()), then checks that the registers still
all contain the expected value. This is done to test the context save
and restore mechanism as this task is swapped onto and off of the CPU.
The critical nesting depth is also saved as part of the context so also
check this maintains an expected value. */
ulCriticalNesting = 0x87654321;
for( ;; )
{
#pragma asm
;Load known values into each register.
LDI #0x11111111, R1
LDI #0x22222222, R2
LDI #0x33333333, R3
LDI #0x44444444, R4
LDI #0x55555555, R5
LDI #0x66666666, R6
LDI #0x77777777, R7
LDI #0x88888888, R8
LDI #0x99999999, R9
LDI #0xaaaaaaaa, R10
LDI #0xbbbbbbbb, R11
LDI #0xcccccccc, R12
LDI #0xdddddddd, R0
;Check each register still contains the expected value.
LDI #0x11111111, R13
CMP R13, R1
BNE Second_Set_Error
NOP
LDI #0x22222222, R13
CMP R13, R2
BNE Second_Set_Error
NOP
LDI #0x33333333, R13
CMP R13, R3
BNE Second_Set_Error
NOP
LDI #0x44444444, R13
CMP R13, R4
BNE Second_Set_Error
NOP
LDI #0x55555555, R13
CMP R13, R5
BNE Second_Set_Error
NOP
LDI #0x66666666, R13
CMP R13, R6
BNE Second_Set_Error
NOP
LDI #0x77777777, R13
CMP R13, R7
BNE Second_Set_Error
NOP
LDI #0x88888888, R13
CMP R13, R8
BNE Second_Set_Error
NOP
LDI #0x99999999, R13
CMP R13, R9
BNE Second_Set_Error
NOP
LDI #0xaaaaaaaa, R13
CMP R13, R10
BNE Second_Set_Error
NOP
LDI #0xbbbbbbbb, R13
CMP R13, R11
BNE Second_Set_Error
NOP
LDI #0xcccccccc, R13
CMP R13, R12
BNE Second_Set_Error
NOP
LDI #0xdddddddd, R13
CMP R13, R0
BNE Second_Set_Error
NOP
BRA Second_Start_Next_Loop
NOP
Second_Set_Error:
; Latch that an error has occurred.
LDI #_ulRegTestError, R0
LDI #0x00000001, R1
ST R1, @R0
Second_Start_Next_Loop:
#pragma endasm
ulRegTest2Counter++;
if( ulCriticalNesting != 0x87654321 )
{
ulRegTestError = pdTRUE;
}
}
}
/*-----------------------------------------------------------*/

58
Demo/MB91460_Softune/STANDALONE/Mondeb_57K6_com1.sup
View file

@ -25,12 +25,12 @@ Ondemand Load Condition=Disable
Batch File=
[Window]
Flag=Enable
AssemblySize=3 2 829 426
AssemblySize=325 90 1151 598
AssemblyState=0
AssemblyFGColor=0 0 255
CommandSize=132 138 958 562
CommandState=0
Assembly Address=H'00044700
Assembly Address=H'00044F1C
Memory Address=H'0002F038
Memory Mode=H'00000003
Memory Ascii=H'00000001
@ -98,16 +98,16 @@ MemorySize=66 69 892 493
MemoryState=0
Layer0=1005,
Layer1=1004,
Layer2=1003,
Source0Name=SRC\Start91460.asm
Source0Size=110 115 936 539
Layer2=2000,..\..\Source\tasks.c
Source0Name=..\..\Source\tasks.c
Source0Size=204 103 1030 527
Source0State=0
Source0Line=914
Source0Line=46C
Source0Mode=2
Source1Name=..\..\Source\tasks.c
Source1Size=204 103 1030 527
Source1Name=..\..\Source\portable\Softune\MB91460\port.c
Source1Size=310 3 1136 427
Source1State=0
Source1Line=6AE
Source1Line=DB
Source1Mode=2
SymbolSize=0 0 0 0
SymbolState=0
@ -120,38 +120,34 @@ Memory Mark Color3=0 255 0
Memory Mark Color4=0 255 255
Memory Mark Color5=0 128 192
Memory Mark Color6=255 128 64
Layer3=2000,SRC\watchdog\watchdog.c
Layer4=2000,..\..\Source\portable\Softune\MB91460\port.c
Layer5=1002,
Layer6=2000,..\..\Source\tasks.c
Layer7=2000,SRC\Start91460.asm
Layer3=1006,
Layer4=1003,
Layer5=2000,..\..\Source\portable\Softune\MB91460\port.c
Layer6=2000,SRC\watchdog\watchdog.c
Layer7=1002,
LocalSize=44 46 870 470
LocalState=0
WatchSize=0 0 826 424
WatchState=0
Source2Name=..\..\Source\portable\Softune\MB91460\port.c
Source2Size=0 0 826 424
Source2Name=SRC\main.c
Source2Size=66 69 1074 448
Source2State=0
Source2Line=2D
Source2Line=7C
Source2Mode=2
Source3Name=SRC\watchdog\watchdog.c
Source3Size=0 0 938 522
Source3Size=44 46 998 421
Source3State=0
Source3Line=24
Source3Line=1C
Source3Mode=2
Source4Name=SRC\main.c
Source4Size=66 69 1074 448
Source4State=0
Source4Line=6A
Source4Mode=2
Layer8=2000,SRC\main.c
Layer8=2000,SRC\Start91460.asm
Watch Variable0=[ulCriticalNesting],82030000,1,-1 -1
Layer9=1007,
Layer10=2000,..\Common\Minimal\semtest.c
Source5Name=..\Common\Minimal\semtest.c
Source5Size=22 23 976 398
Source5State=0
Source5Line=C8
Source5Mode=2
Layer10=2000,SRC\main.c
Source4Name=SRC\Start91460.asm
Source4Size=198 207 1086 679
Source4State=0
Source4Line=913
Source4Mode=2
[Path Environment]
Flag=Enable
Source=