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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-01 08:54:14 -04:00
Continue to work on Fujitsu 32bit port.
This commit is contained in:
Richard Barry
parent
7e6a2b0bd5
commit
6610911d3e
4 changed files with 327 additions and 104 deletions
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@ -107,6 +107,24 @@ static portSHORT prvCheckOtherTasksAreStillRunning( void );
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*/
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static void prvSetupHardware( void );
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/*
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* Tasks that test the context switch mechanism by filling the CPU registers
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* with known values then checking that each register contains the value
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* expected. Each of the two tasks use different values, and as low priority
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* tasks, get swapped in and out regularly.
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*/
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static void vFirstRegisterTestTask( void *pvParameters );
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static void vSecondRegisterTestTask( void *pvParameters );
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/*---------------------------------------------------------------------------*/
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/* The variable that is set to true should an error be found in one of the
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register test tasks. */
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unsigned portLONG ulRegTestError = pdFALSE;
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/* Variables used to ensure the register check tasks are still executing. */
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static volatile unsigned portLONG ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL;
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/*---------------------------------------------------------------------------*/
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/* Start all the demo application tasks, then start the scheduler. */
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@ -131,6 +149,9 @@ void main(void)
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/* Start the 'Check' task which is defined in this file. */
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xTaskCreate( vErrorChecks, ( signed portCHAR * ) "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
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xTaskCreate( vFirstRegisterTestTask, ( signed portCHAR * ) "Reg1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
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xTaskCreate( vSecondRegisterTestTask, ( signed portCHAR * ) "Reg2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
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/* Start the task that write trace information to the UART. */
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vUtilityStartTraceTask( mainUTILITY_TASK_PRIORITY );
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@ -159,7 +180,6 @@ static void vErrorChecks( void *pvParameters )
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{
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portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;
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/* Initialise xLastExecutionTime so the first call to vTaskDelayUntil()
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works correctly. */
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xLastExecutionTime = xTaskGetTickCount();
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@ -192,6 +212,7 @@ portTickType xDelayPeriod = mainNO_ERROR_CHECK_DELAY, xLastExecutionTime;
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static portSHORT prvCheckOtherTasksAreStillRunning( void )
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{
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portBASE_TYPE lReturn = pdPASS;
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static unsigned portLONG ulLastRegTest1Counter = 0UL, ulLastRegTest2Counter = 0UL;
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/* The demo tasks maintain a count that increments every cycle of the task
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provided that the task has never encountered an error. This function
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@ -253,7 +274,27 @@ portBASE_TYPE lReturn = pdPASS;
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{
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lReturn = pdFAIL;
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}
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/* Have the register test tasks found any errors? */
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if( ulRegTestError != pdFALSE )
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{
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lReturn = pdFAIL;
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}
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/* Are the register test tasks still running? */
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if( ulLastRegTest1Counter == ulRegTest1Counter )
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{
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lReturn = pdFAIL;
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}
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if( ulLastRegTest2Counter == ulRegTest2Counter )
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{
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lReturn = pdFAIL;
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}
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ulLastRegTest1Counter = ulRegTest1Counter;
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ulLastRegTest2Counter = ulRegTest2Counter;
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return lReturn;
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}
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/*-----------------------------------------------------------*/
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@ -279,7 +320,7 @@ static void prvSetupHardware( void )
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/* The below callback function is called from Delayed ISR if configUSE_IDLE_HOOK
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is configured as 1. */
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#if configUSE_IDLE_HOOK == 1
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void vApplicationIdleHook ( void )
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void vApplicationIdleHook( void )
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{
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/* Are we using the idle task to kick the watchdog? */
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#if WATCHDOG == WTC_IN_IDLE
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@ -291,18 +332,265 @@ is configured as 1. */
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#endif
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}
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#endif
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/*-----------------------------------------------------------*/
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/*
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The below callback function is called from Tick ISR if configUSE_TICK_HOOK
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is configured as 1. */
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#if configUSE_TICK_HOOK == 1
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void vApplicationTickHook ( void )
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void vApplicationTickHook( void )
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{
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#if WATCHDOG == WTC_IN_TICK
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Kick_Watchdog();
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#endif
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}
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#endif
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/*-----------------------------------------------------------*/
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static void vFirstRegisterTestTask( void *pvParameters )
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{
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extern volatile unsigned portLONG ulCriticalNesting;
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/* Fills the registers with known values (different to the values
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used in vSecondRegisterTestTask()), then checks that the registers still
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all contain the expected value. This is done to test the context save
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and restore mechanism as this task is swapped onto and off of the CPU.
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The critical nesting depth is also saved as part of the context so also
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check this maintains an expected value. */
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ulCriticalNesting = 0x12345678;
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for( ;; )
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{
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#pragma asm
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;Load known values into each register.
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LDI #0x11111111, R0
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LDI #0x22222222, R1
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LDI #0x33333333, R2
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LDI #0x44444444, R3
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LDI #0x55555555, R4
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LDI #0x66666666, R5
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LDI #0x77777777, R6
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LDI #0x88888888, R7
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LDI #0x99999999, R8
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LDI #0xaaaaaaaa, R9
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LDI #0xbbbbbbbb, R10
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LDI #0xcccccccc, R11
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LDI #0xdddddddd, R12
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;Check each register still contains the expected value.
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LDI #0x11111111, R13
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CMP R13, R0
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BNE First_Set_Error
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NOP
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LDI #0x22222222, R13
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CMP R13, R1
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BNE First_Set_Error
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NOP
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LDI #0x33333333, R13
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CMP R13, R2
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BNE First_Set_Error
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NOP
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LDI #0x44444444, R13
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CMP R13, R3
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BNE First_Set_Error
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NOP
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LDI #0x55555555, R13
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CMP R13, R4
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BNE First_Set_Error
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NOP
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LDI #0x66666666, R13
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CMP R13, R5
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BNE First_Set_Error
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NOP
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LDI #0x77777777, R13
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CMP R13, R6
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BNE First_Set_Error
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NOP
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LDI #0x88888888, R13
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CMP R13, R7
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BNE First_Set_Error
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NOP
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LDI #0x99999999, R13
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CMP R13, R8
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BNE First_Set_Error
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NOP
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LDI #0xaaaaaaaa, R13
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CMP R13, R9
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BNE First_Set_Error
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NOP
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LDI #0xbbbbbbbb, R13
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CMP R13, R10
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BNE First_Set_Error
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NOP
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LDI #0xcccccccc, R13
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CMP R13, R11
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BNE First_Set_Error
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NOP
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LDI #0xdddddddd, R13
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CMP R13, R12
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BNE First_Set_Error
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NOP
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BRA First_Start_Next_Loop
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NOP
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First_Set_Error:
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; Latch that an error has occurred.
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LDI #_ulRegTestError, R0
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LDI #0x00000001, R1
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ST R1, @R0
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First_Start_Next_Loop:
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#pragma endasm
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ulRegTest1Counter++;
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if( ulCriticalNesting != 0x12345678 )
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{
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ulRegTestError = pdTRUE;
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}
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}
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}
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/*-----------------------------------------------------------*/
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static void vSecondRegisterTestTask( void *pvParameters )
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{
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extern volatile unsigned portLONG ulCriticalNesting;
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/* Fills the registers with known values (different to the values
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used in vFirstRegisterTestTask()), then checks that the registers still
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all contain the expected value. This is done to test the context save
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and restore mechanism as this task is swapped onto and off of the CPU.
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The critical nesting depth is also saved as part of the context so also
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check this maintains an expected value. */
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ulCriticalNesting = 0x87654321;
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for( ;; )
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{
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#pragma asm
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;Load known values into each register.
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LDI #0x11111111, R1
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LDI #0x22222222, R2
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LDI #0x33333333, R3
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LDI #0x44444444, R4
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LDI #0x55555555, R5
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LDI #0x66666666, R6
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LDI #0x77777777, R7
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LDI #0x88888888, R8
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LDI #0x99999999, R9
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LDI #0xaaaaaaaa, R10
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LDI #0xbbbbbbbb, R11
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LDI #0xcccccccc, R12
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LDI #0xdddddddd, R0
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;Check each register still contains the expected value.
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LDI #0x11111111, R13
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CMP R13, R1
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BNE Second_Set_Error
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NOP
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LDI #0x22222222, R13
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CMP R13, R2
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BNE Second_Set_Error
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NOP
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LDI #0x33333333, R13
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CMP R13, R3
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BNE Second_Set_Error
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NOP
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LDI #0x44444444, R13
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CMP R13, R4
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BNE Second_Set_Error
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NOP
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LDI #0x55555555, R13
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CMP R13, R5
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BNE Second_Set_Error
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NOP
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LDI #0x66666666, R13
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CMP R13, R6
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BNE Second_Set_Error
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NOP
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LDI #0x77777777, R13
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CMP R13, R7
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BNE Second_Set_Error
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NOP
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LDI #0x88888888, R13
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CMP R13, R8
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BNE Second_Set_Error
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NOP
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LDI #0x99999999, R13
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CMP R13, R9
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BNE Second_Set_Error
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NOP
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LDI #0xaaaaaaaa, R13
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CMP R13, R10
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BNE Second_Set_Error
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NOP
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LDI #0xbbbbbbbb, R13
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CMP R13, R11
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BNE Second_Set_Error
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NOP
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LDI #0xcccccccc, R13
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CMP R13, R12
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BNE Second_Set_Error
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NOP
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LDI #0xdddddddd, R13
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CMP R13, R0
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BNE Second_Set_Error
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NOP
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BRA Second_Start_Next_Loop
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NOP
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Second_Set_Error:
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; Latch that an error has occurred.
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LDI #_ulRegTestError, R0
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LDI #0x00000001, R1
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ST R1, @R0
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Second_Start_Next_Loop:
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#pragma endasm
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ulRegTest2Counter++;
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if( ulCriticalNesting != 0x87654321 )
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{
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ulRegTestError = pdTRUE;
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}
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}
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}
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/*-----------------------------------------------------------*/
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