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Update RISC-V port to use a separate interrupt stack.
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3 changed files with 78 additions and 24 deletions
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@ -49,7 +49,7 @@
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.extern pullMachineTimerCompareRegister
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.extern pullNextTime
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.extern ulTimerIncrementsForOneTick
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.extern xISRStackTop
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/*-----------------------------------------------------------*/
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@ -136,14 +136,13 @@ vPortTrapHandler:
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csrr a0, mcause
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csrr a1, mepc
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mv a2, sp
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test_if_environment_call:
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li t0, 11 /* 11 == environment call when using qemu. */
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bne a0, t0, test_if_timer
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addi a1, a1, 4 /* Synchronous so return to the instruction after the environment call. */
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sw a1, 0( sp ) /* Save updated exception return address. */
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/*_RB_ Does stack need aligning here? */
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lw sp, xISRStackTop /* Switch to ISR stack before function call. */
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jal vTaskSwitchContext
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j processed_source
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@ -167,13 +166,15 @@ test_if_timer:
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add t6, t3, t5 /* Add overflow to high word of ullNextTime. */
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sw t4, 0(t1) /* Store new low word of ullNextTime. */
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sw t6, 4(t1) /* Store new high word of ullNextTime. */
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lw sp, xISRStackTop /* Switch to ISR stack before function call. */
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jal xTaskIncrementTick
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beqz a0, processed_source /* Don't switch context if incrementing tick didn't unblock a task. */
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jal vTaskSwitchContext
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j processed_source
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as_yet_unhandled:
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j as_yet_unhandled /* External interrupt? */
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// ebreak /* External interrupt? */
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j as_yet_unhandled
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processed_source:
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lw sp, pxCurrentTCB /* Load pxCurrentTCB. */
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