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Update RISC-V port to use a separate interrupt stack.
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3 changed files with 78 additions and 24 deletions
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@ -34,6 +34,16 @@
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#include "task.h"
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#include "portmacro.h"
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#ifdef configISR_STACK_SIZE
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/* The stack used by interrupt service routines. */
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static __attribute__ ((aligned(16))) StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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const StackType_t * const xISRStackTop = &( xISRStack[ ( configISR_STACK_SIZE & ~portBYTE_ALIGNMENT_MASK ) - 1 ] );
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#else
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#warning What should _sp be named?
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extern const uint32_t _sp[];
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const uint32_t xISRStackTop = ( uint32_t ) _sp;
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#endif
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/*
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* Setup the timer to generate the tick interrupts. The implementation in this
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* file is weak to allow application writers to change the timer used to
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@ -54,6 +64,30 @@ const uint64_t *pullNextTime = &ullNextTime;
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const uint32_t ulTimerIncrementsForOneTick = ( uint32_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* Assumes increment won't go over 32-bits. */
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volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCLINT_BASE_ADDRESS + 0x4000 );
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/* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
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stack checking. A problem in the ISR stack will trigger an assert, not call the
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stack overflow hook function (because the stack overflow hook is specific to a
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task stack, not the ISR stack). */
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#if( configCHECK_FOR_STACK_OVERFLOW > 2 )
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#warning This path not tested, or even compiled yet.
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/* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for
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the task stacks, and so will legitimately appear in many positions within
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the ISR stack. */
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#define portISR_STACK_FILL_BYTE 0xee
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static const uint8_t ucExpectedStackBytes[] = {
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
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#define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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#else
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/* Define the function away. */
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#define portCHECK_ISR_STACK()
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#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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/*-----------------------------------------------------------*/
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void prvTaskExitError( void )
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@ -194,22 +228,11 @@ volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLI
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/* Prepare the time to use after the next tick interrupt. */
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ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;
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/* Enable timer interrupt */
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/* Enable timer interrupt. */
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__asm volatile( "csrs mie, %0" :: "r"(0x80) ); /* 1<<7 for timer interrupt. */
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}
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/*-----------------------------------------------------------*/
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void Software_IRQHandler( void )
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{
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volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCLINT_BASE_ADDRESS;
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vTaskSwitchContext();
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/* Clear software interrupt. */
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*( ( uint32_t * ) configCLINT_BASE_ADDRESS ) &= 0x08UL;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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extern void xPortStartFirstTask( void );
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@ -218,10 +241,15 @@ extern void xPortStartFirstTask( void );
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{
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volatile uint32_t mtvec = 0;
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/* Check the least significant two bits of mtvec are 00 - indicating single
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vector mode. */
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/* Check the least significant two bits of mtvec are 00 - indicating
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single vector mode. */
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__asm volatile( "csrr %0, mtvec" : "=r"( mtvec ) );
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configASSERT( ( mtvec & 0x03UL ) == 0 );
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/* Check alignment of the interrupt stack - which is the same as the
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stack that was being used by main() prior to the scheduler being
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started. */
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configASSERT( ( xISRStackTop & portBYTE_ALIGNMENT_MASK ) == 0 );
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}
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#endif
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