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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-19 21:11:57 -04:00
Continue to remove unnecessary 'signed char *' casts from strings that are now just plain char * types.
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@ -216,7 +216,7 @@ const char *const pcHeader = "Task State Priority Stack #\r\n********
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/* Generate a table of task stats. */
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strcpy( ( char * ) pcWriteBuffer, pcHeader );
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vTaskList( pcWriteBuffer + strlen( pcHeader ) );
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vTaskList( ( char * ) pcWriteBuffer + strlen( pcHeader ) );
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/* There is no more data to return after this single string, so return
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pdFALSE. */
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@ -1,159 +0,0 @@
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#define mainISR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
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#define mainISRTASK_LED ( 2 )
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#define mainT5PRESCALAR ( 6 )
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#define mainT5_SEMAPHORE_RATE ( 31250 )
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static void prvISRBlockTask( void* pvParameters )
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{
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/* local variables marked as volatile so the compiler does not optimize them away */
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volatile uint64_t resAcc;
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volatile uint32_t arg1, arg2;
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/* Create the semaphore used to signal this task */
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vSemaphoreCreateBinary( xBlockSemaphore );
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/* Set up timer 5 to generate an interrupt every 50 ms */
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T5CON = 0;
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TMR5 = 0;
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/* Timer 5 is going to interrupt at 20Hz Hz. (40,000,000 / (64 * 20) */
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T5CONbits.TCKPS = mainT5PRESCALAR;
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PR5 = mainT5_SEMAPHORE_RATE;
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/* Setup timer 5 interrupt priority to be the maximum allowed */
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IPC6bits.T5IP = ( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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/* Clear the interrupt as a starting condition. */
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IFS0bits.T5IF = 0;
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/* Enable the interrupt. */
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IEC0bits.T5IE = 1;
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/* Start the timer. */
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T5CONbits.TON = 1;
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arg1 = 10;
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arg2 = 2;
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for( ;; )
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{
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/* block on the binary semaphore given by an ISR */
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xSemaphoreTake( xBlockSemaphore, portMAX_DELAY );
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vParTestToggleLED( mainISRTASK_LED );
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/* perform some maths operations to exercise the accumulators */
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resAcc = resAcc * arg2 + arg1;
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}
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}
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/*-----------------------------------------------------------*/
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void vT5InterruptHandler( void )
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{
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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/* This function is the handler for the peripheral timer interrupt.
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The interrupt is initially signalled in a separate assembly file
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which switches to the system stack and then calls this function.
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It gives a semaphore which signals the prvISRBlockTask */
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xSemaphoreGiveFromISR( xBlockSemaphore, &xHigherPriorityTaskWoken );
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/* Clear the interrupt */
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IFS0CLR = _IFS0_T5IF_MASK;
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portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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}
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/*-----------------------------------------------------------*/
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#define DMA_BUFF_SIZE 400
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uint32_t dmaBuff[2][DMA_BUFF_SIZE];
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static void dmaTask(void* pvParameters)
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{
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uint32_t i;
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/* this tasks hammers the dma copying data from one buffer to another */
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DMACONbits.SUSPEND = 1; //Suspend ALL DMA transfers
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/* currently the data will be placed in the cache and nothing will be copied
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* by the dma as it only accesses physical memory, this test is designed to stress the system
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* and confirm correct operation in a heavy interrupt environment */
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for(i = 0; i < DMA_BUFF_SIZE; i++) {
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dmaBuff[0][i] = i;
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}
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/* set the transfer event control: what event is to start the DMA transfer */
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DCH1ECONbits.CHSIRQ = _TIMER_6_VECTOR;
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DCH1ECONbits.SIRQEN = 1;
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/* set up transfer */
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DCH1SSA = KVA_TO_PA((void*) &dmaBuff[0][0]);
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DCH1DSA = KVA_TO_PA((void*) &dmaBuff[1][0]);
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DCH1SSIZ = DMA_BUFF_SIZE;
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DCH1DSIZ = DMA_BUFF_SIZE;
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DCH1CSIZ = 4;
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/* setup interrupt response */
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IPC33bits.DMA1IP = 3;
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DCH1INTbits.CHBCIE = 1;
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IEC4bits.DMA1IE = 1;
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DCH1CONbits.CHPRI = 0b10;
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/* once we configured the DMA channel we can enable it */
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DCH1CONbits.CHEN = 1;
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DMACONbits.ON = 1;
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DMACONbits.SUSPEND = 0;
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/* setup T6 to trigger the transfers */
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T6CON = 0x0000;
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IEC0CLR = _IEC0_T6IE_MASK;
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IFS0CLR = _IFS0_T6IF_MASK;
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TMR6 = 0;
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PR6 = 1;
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T6CONSET = _T6CON_ON_MASK;
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/* once the dma is setup we delete this task */
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vTaskDelete(NULL);
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}
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void __attribute__((vector(_DMA1_VECTOR), interrupt(ipl3))) DMAInterruptHandler(void)
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{
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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uint32_t i;
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/* clear the destination buffer */
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for(i = 0; i < DMA_BUFF_SIZE; i++) {
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dmaBuff[1][i] = 0;
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}
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xSemaphoreGiveFromISR( xBlockSemaphore, &xHigherPriorityTaskWoken );
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/* we have just finished copying from buffer0 to buffer 1 so restart the copy operation */
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DCH1INTCLR = _DCH1INT_CHBCIF_MASK;
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IFS4CLR = _IFS4_DMA1IF_MASK;
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DCH1CONSET = _DCH1CON_CHEN_MASK;
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portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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}
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/*-----------------------------------------------------------*/
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* The Blinky ISR Test:
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* This demonstrates triggering an ISR from a peripheral timer. A task is created
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* which blocks on a semaphore. Separately a peripheral timer is set to cause an
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* interrupt every 50ms. The ISR handler (in a separate assembly file) then
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* releases the semaphore which causes the task to unblock and toggle an LED. This
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* sequence tests operation of the ISR and system stack handling.
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*
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static void prvISRBlockTask( void *pvParameters );
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static void dmaTask(void *pvParameters);
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/* The timer 5 interrupt handler. As this interrupt uses the FreeRTOS assembly
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entry point the IPL setting in the following function prototype has no effect. */
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void __attribute__( (interrupt(ipl3), vector(_TIMER_5_VECTOR))) vT5InterruptWrapper( void );
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/*-----------------------------------------------------------*/
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/* The semaphore used to signal the ISRBlockTask */
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static xSemaphoreHandle xBlockSemaphore;
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// xTaskCreate( prvISRBlockTask, ( signed char * ) "ISR", configMINIMAL_STACK_SIZE, ( void * ) NULL, mainISR_TASK_PRIORITY, NULL );
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// xTaskCreate( dmaTask, (signed char *) "DMA", configMINIMAL_STACK_SIZE, (void*) NULL, 2, NULL);
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@ -115,9 +115,14 @@ void vConfigureTimerForRunTimeStats( void );
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#define configUSE_CO_ROUTINES 1
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#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
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/* This demo makes use of one or more example stats formatting functions. These
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format the raw data provided by the uxTaskGetSystemState() function in to human
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readable ASCII form. See the notes in the implementation of vTaskList() within
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FreeRTOS/Source/tasks.c for limitations. */
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#define configUSE_STATS_FORMATTING_FUNCTIONS 1
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/* Set the following definitions to 1 to include the API function, or zero
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to exclude the API function. */
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#define INCLUDE_vTaskPrioritySet 1
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#define INCLUDE_uxTaskPriorityGet 1
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#define INCLUDE_vTaskDelete 1
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@ -59,7 +59,7 @@
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* vTracePrintF may use multiple records depending on the number of data args.
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******************************************************************************/
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#define EVENT_BUFFER_SIZE 100000 /* Adjust wrt. to available RAM */
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#define EVENT_BUFFER_SIZE 10000 /* Adjust wrt. to available RAM */
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/*******************************************************************************
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