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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2026-07-10 13:29:45 -04:00
Merge aca328e173 into ae46383c90
This commit is contained in:
commit
642c585297
4 changed files with 222 additions and 14 deletions
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@ -546,6 +546,14 @@
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* vTaskPreemptionEnable APIs. */
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#define configUSE_TASK_PREEMPTION_DISABLE 0
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/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
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* configUSE_SCHEDULER_CORE_MASK to 1 to enable the scheduler core mask feature.
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* When enabled, the vTaskSetSchedulerCoreMask and uxTaskGetSchedulerCoreMask
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* APIs can be used to control which cores are allowed to run non-idle tasks
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* system-wide at run time. Set to 0 to exclude this feature from the build.
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* Defaults to 1 if left undefined. */
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#define configUSE_SCHEDULER_CORE_MASK 1
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/* When using SMP (i.e. configNUMBER_OF_CORES is greater than one), set
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* configUSE_PASSIVE_IDLE_HOOK to 1 to allow the application writer to use
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* the passive idle task hook to add background functionality without the
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@ -516,6 +516,14 @@
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#define configUSE_CORE_AFFINITY 0
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#endif /* configUSE_CORE_AFFINITY */
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#ifndef configUSE_SCHEDULER_CORE_MASK
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#if ( configNUMBER_OF_CORES > 1 )
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#define configUSE_SCHEDULER_CORE_MASK 1
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#else
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#define configUSE_SCHEDULER_CORE_MASK 0
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#endif
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#endif /* configUSE_SCHEDULER_CORE_MASK */
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#if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_CORE_AFFINITY == 1 ) )
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#ifndef configTASK_DEFAULT_CORE_AFFINITY
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#define configTASK_DEFAULT_CORE_AFFINITY tskNO_AFFINITY
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@ -1850,6 +1858,22 @@
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#define traceRETURN_vTaskCoreAffinityGet( uxCoreAffinityMask )
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#endif
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#ifndef traceENTER_vTaskSetSchedulerCoreMask
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#define traceENTER_vTaskSetSchedulerCoreMask( uxCoreMask )
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#endif
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#ifndef traceRETURN_vTaskSetSchedulerCoreMask
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#define traceRETURN_vTaskSetSchedulerCoreMask()
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#endif
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#ifndef traceENTER_uxTaskGetSchedulerCoreMask
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#define traceENTER_uxTaskGetSchedulerCoreMask()
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#endif
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#ifndef traceRETURN_uxTaskGetSchedulerCoreMask
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#define traceRETURN_uxTaskGetSchedulerCoreMask( uxCoreMask )
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#endif
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#ifndef traceENTER_vTaskPreemptionDisable
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#define traceENTER_vTaskPreemptionDisable( xTask )
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#endif
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@ -2906,6 +2930,10 @@
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#error configUSE_CORE_AFFINITY is not supported in single core FreeRTOS
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#endif
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#if ( ( configNUMBER_OF_CORES == 1 ) && ( configUSE_SCHEDULER_CORE_MASK != 0 ) )
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#error configUSE_SCHEDULER_CORE_MASK is not supported in single core FreeRTOS
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#endif
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#if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_PORT_OPTIMISED_TASK_SELECTION != 0 ) )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION is not supported in SMP FreeRTOS
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#endif
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@ -1420,6 +1420,54 @@ BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
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UBaseType_t vTaskCoreAffinityGet( ConstTaskHandle_t xTask );
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#endif
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#if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_SCHEDULER_CORE_MASK == 1 ) )
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/**
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*
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* Controls which cores are allowed to run non-idle tasks system-wide.
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* Bit N = 1 means core N may run non-idle tasks; bit N = 0 means core N will
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* only run its idle task. configNUMBER_OF_CORES must be greater than 1 for
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* this function to be available.
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*
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* Masking a core (including core 0) does NOT power it off or stop its tick
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* ISR and scheduler from executing. All cores remain active; the mask only
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* controls whether the scheduler may dispatch a non-idle task onto a core.
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* A masked core continues to service its tick interrupt and enters the
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* scheduler normally, but will always be assigned the idle task.
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*
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* Passing 0 as the mask is valid; every core will run only its idle task
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* until a new mask is applied.
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*
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* If a core that is currently running a non-idle task becomes disabled by
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* the new mask, it is yielded immediately so the scheduler can replace the
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* running task with the idle task.
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*
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* @param uxCoreMask Bitmask of cores to enable. Cores are numbered 0 to
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* configNUMBER_OF_CORES - 1. Pass ( tskNO_AFFINITY ) to re-enable all cores.
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*
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* Example usage (4-core system, exclude core 2):
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*
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* // Allow scheduling on cores 0, 1 and 3 only.
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* vTaskSetSchedulerCoreMask( ( 1 << 0 ) | ( 1 << 1 ) | ( 1 << 3 ) );
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*
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* // Later, restore all four cores.
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* vTaskSetSchedulerCoreMask( ( 1 << 0 ) | ( 1 << 1 ) | ( 1 << 2 ) | ( 1 << 3 ) );
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*/
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void vTaskSetSchedulerCoreMask( UBaseType_t uxCoreMask ) PRIVILEGED_FUNCTION;
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/**
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* @brief Gets the current global scheduler core mask.
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*
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* @return Bitmask where bit N = 1 means core N is currently allowed to run
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* non-idle tasks.
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*
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* Example usage:
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*
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* UBaseType_t uxMask = uxTaskGetSchedulerCoreMask();
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*/
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UBaseType_t uxTaskGetSchedulerCoreMask( void ) PRIVILEGED_FUNCTION;
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#endif
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#if ( configUSE_TASK_PREEMPTION_DISABLE == 1 )
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/**
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124
tasks.c
124
tasks.c
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@ -513,6 +513,20 @@ PRIVILEGED_DATA STATIC UBaseType_t uxTaskNumber = ( UBaseType_t ) 0U;
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PRIVILEGED_DATA STATIC volatile TickType_t xNextTaskUnblockTime = ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
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PRIVILEGED_DATA STATIC TaskHandle_t xIdleTaskHandles[ configNUMBER_OF_CORES ]; /**< Holds the handles of the idle tasks. The idle tasks are created automatically when the scheduler is started. */
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#if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_SCHEDULER_CORE_MASK == 1 ) )
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/* Global scheduler core mask. Bit N = 1 means core N is allowed to run
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* non-idle tasks. Defaults to all cores enabled. Use
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* vTaskSetSchedulerCoreMask() / uxTaskGetSchedulerCoreMask() to change it
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* at run time.
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*
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* The mask is derived by right-shifting ~0 rather than left-shifting 1,
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* because left-shifting by a value equal to the type width is undefined
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* behaviour in C (C11 §6.5.7). Using UBaseType_t throughout also avoids
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* the assumption that unsigned long is at least as wide as UBaseType_t. */
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PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerCoreMask =
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( ( UBaseType_t ) ( ~( UBaseType_t ) 0U ) >> ( ( sizeof( UBaseType_t ) * ( size_t ) 8U ) - ( size_t ) configNUMBER_OF_CORES ) );
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#endif /* #if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_SCHEDULER_CORE_MASK == 1 ) ) */
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/* Improve support for OpenOCD. The kernel tracks Ready tasks via priority lists.
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* For tracking the state of remote threads, OpenOCD uses uxTopUsedPriority
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* to determine the number of priority lists to read back from the remote target. */
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@ -944,6 +958,12 @@ STATIC void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
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#if ( configUSE_CORE_AFFINITY == 1 )
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if( ( pxTCB->uxCoreAffinityMask & ( ( UBaseType_t ) 1U << ( UBaseType_t ) xCoreID ) ) != 0U )
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#endif
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{
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#if ( configUSE_SCHEDULER_CORE_MASK == 1 )
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/* Non-idle tasks may not be scheduled on disabled cores. */
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if( ( ( pxTCB->uxTaskAttributes & taskATTRIBUTE_IS_IDLE ) != 0U ) ||
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( ( uxSchedulerCoreMask & ( ( UBaseType_t ) 1U << ( UBaseType_t ) xCoreID ) ) != 0U ) )
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#endif
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{
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#if ( configUSE_TASK_PREEMPTION_DISABLE == 1 )
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if( pxCurrentTCBs[ xCoreID ]->xPreemptionDisable == pdFALSE )
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@ -954,6 +974,7 @@ STATIC void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
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}
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}
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}
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}
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else
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{
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mtCOVERAGE_TEST_MARKER();
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@ -1093,6 +1114,12 @@ STATIC void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
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#if ( configUSE_CORE_AFFINITY == 1 )
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if( ( pxTCB->uxCoreAffinityMask & ( ( UBaseType_t ) 1U << ( UBaseType_t ) xCoreID ) ) != 0U )
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#endif
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{
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#if ( configUSE_SCHEDULER_CORE_MASK == 1 )
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/* Non-idle tasks may not run on scheduler-disabled cores. */
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if( ( ( pxTCB->uxTaskAttributes & taskATTRIBUTE_IS_IDLE ) != 0U ) ||
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( ( uxSchedulerCoreMask & ( ( UBaseType_t ) 1U << ( UBaseType_t ) xCoreID ) ) != 0U ) )
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#endif
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{
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/* If the task is not being executed by any core swap it in. */
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pxCurrentTCBs[ xCoreID ]->xTaskRunState = taskTASK_NOT_RUNNING;
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@ -1104,6 +1131,7 @@ STATIC void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
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xTaskScheduled = pdTRUE;
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}
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}
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}
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else if( pxTCB == pxCurrentTCBs[ xCoreID ] )
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{
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configASSERT( ( pxTCB->xTaskRunState == xCoreID ) || ( pxTCB->xTaskRunState == taskTASK_SCHEDULED_TO_YIELD ) );
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@ -1111,12 +1139,19 @@ STATIC void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
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#if ( configUSE_CORE_AFFINITY == 1 )
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if( ( pxTCB->uxCoreAffinityMask & ( ( UBaseType_t ) 1U << ( UBaseType_t ) xCoreID ) ) != 0U )
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#endif
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{
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#if ( configUSE_SCHEDULER_CORE_MASK == 1 )
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/* Non-idle tasks may not continue on scheduler-disabled cores. */
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if( ( ( pxTCB->uxTaskAttributes & taskATTRIBUTE_IS_IDLE ) != 0U ) ||
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( ( uxSchedulerCoreMask & ( ( UBaseType_t ) 1U << ( UBaseType_t ) xCoreID ) ) != 0U ) )
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#endif
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{
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/* The task is already running on this core, mark it as scheduled. */
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pxTCB->xTaskRunState = xCoreID;
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xTaskScheduled = pdTRUE;
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}
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}
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}
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else
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{
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/* This task is running on the core other than xCoreID. */
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@ -3103,6 +3138,95 @@ STATIC void prvInitialiseNewTask( TaskFunction_t pxTaskCode,
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/*-----------------------------------------------------------*/
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#if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_SCHEDULER_CORE_MASK == 1 ) )
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void vTaskSetSchedulerCoreMask( UBaseType_t uxCoreMask )
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{
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BaseType_t xCoreID;
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UBaseType_t uxOldMask;
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UBaseType_t uxDisabledCores;
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UBaseType_t uxEnabledCores;
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traceENTER_vTaskSetSchedulerCoreMask( uxCoreMask );
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/* Verify that uxCoreMask does not reference cores beyond the number of
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* physical cores available. Any bit at position configNUMBER_OF_CORES
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* or higher is invalid. */
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configASSERT( ( uxCoreMask & ~( ( UBaseType_t ) ( ~( UBaseType_t ) 0U ) >> ( ( sizeof( UBaseType_t ) * ( size_t ) 8U ) - ( size_t ) configNUMBER_OF_CORES ) ) ) == 0U );
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taskENTER_CRITICAL();
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{
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uxOldMask = uxSchedulerCoreMask;
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/* Clamp to the number of physical cores so stray bits are ignored.
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* The valid-core mask is derived by right-shifting ~0 to avoid
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* left-shift UB and unsigned long width assumptions (see the
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* uxSchedulerCoreMask initialiser for a full explanation). */
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uxSchedulerCoreMask = uxCoreMask &
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( ( UBaseType_t ) ( ~( UBaseType_t ) 0U ) >> ( ( sizeof( UBaseType_t ) * ( size_t ) 8U ) - ( size_t ) configNUMBER_OF_CORES ) );
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if( xSchedulerRunning != pdFALSE )
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{
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/* For each core that was just disabled (was allowed, now disallowed),
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* yield it immediately if it is running a non-idle task so the
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* scheduler re-selects the idle task on that core. For each core
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* that was just enabled (was disallowed, now allowed), request a
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* context switch immediately so it stops idling and promptly starts
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* executing any available ready tasks. The two masks are mutually
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* exclusive so a single loop suffices. */
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uxDisabledCores = uxOldMask & ~uxSchedulerCoreMask;
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uxEnabledCores = ~uxOldMask & uxSchedulerCoreMask;
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for( xCoreID = ( BaseType_t ) 0; xCoreID < ( BaseType_t ) configNUMBER_OF_CORES; xCoreID++ )
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{
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UBaseType_t uxCoreBit = ( UBaseType_t ) 1U << ( UBaseType_t ) xCoreID;
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if( ( uxDisabledCores & uxCoreBit ) != 0U )
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{
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if( ( pxCurrentTCBs[ xCoreID ]->uxTaskAttributes & taskATTRIBUTE_IS_IDLE ) == 0U )
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{
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prvYieldCore( xCoreID );
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}
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}
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else if( ( uxEnabledCores & uxCoreBit ) != 0U )
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{
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prvYieldCore( xCoreID );
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}
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else
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{
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mtCOVERAGE_TEST_MARKER();
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}
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}
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}
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}
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taskEXIT_CRITICAL();
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traceRETURN_vTaskSetSchedulerCoreMask();
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}
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#endif /* #if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_SCHEDULER_CORE_MASK == 1 ) ) */
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/*-----------------------------------------------------------*/
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#if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_SCHEDULER_CORE_MASK == 1 ) )
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UBaseType_t uxTaskGetSchedulerCoreMask( void )
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{
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UBaseType_t uxCoreMask;
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traceENTER_uxTaskGetSchedulerCoreMask();
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portBASE_TYPE_ENTER_CRITICAL();
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{
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uxCoreMask = uxSchedulerCoreMask;
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}
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portBASE_TYPE_EXIT_CRITICAL();
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traceRETURN_uxTaskGetSchedulerCoreMask( uxCoreMask );
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return uxCoreMask;
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}
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#endif /* #if ( ( configNUMBER_OF_CORES > 1 ) && ( configUSE_SCHEDULER_CORE_MASK == 1 ) ) */
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/*-----------------------------------------------------------*/
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#if ( configUSE_TASK_PREEMPTION_DISABLE == 1 )
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void vTaskPreemptionDisable( const TaskHandle_t xTask )
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