Fix assert check in svc enter, remove un-used defines

This commit is contained in:
Soren Ptak 2024-01-04 08:59:47 -05:00
parent 0fc0a5fbba
commit 63dfe612be
2 changed files with 15 additions and 39 deletions

View file

@ -78,7 +78,7 @@
#if ( portENABLE_FPU == 1 ) #if ( portENABLE_FPU == 1 )
/* Save the floating point context */ /* Save the floating point context */
/* Load the Floating Point Status and Control Register (FPSRC) into R1 */ /* Copy the Floating Point Status and Control Register (FPSRC) */
FMRX R0, FPSCR FMRX R0, FPSCR
/* Push the value of FPSCR onto the stack */ /* Push the value of FPSCR onto the stack */
STM LR!, { R0 } STM LR!, { R0 }
@ -86,7 +86,7 @@
VSTM LR!, { D0-D15 } VSTM LR!, { D0-D15 }
#endif /* ( portENABLE_FPU == 1 ) */ #endif /* ( portENABLE_FPU == 1 ) */
/* Restore the saved R0 */ /* Restore the saved register */
POP { R0 } POP { R0 }
/* Save the pre-exception Registers, Stack Pointer (SP), and LR */ /* Save the pre-exception Registers, Stack Pointer (SP), and LR */
STM LR, { R0-R14 }^ STM LR, { R0-R14 }^
@ -94,9 +94,9 @@
ADD LR, LR, #portGPR_LENGTH ADD LR, LR, #portGPR_LENGTH
/* Pop the pushed LR, which is the pre-exception Program Counter (PC) */ /* Pop the pushed LR, which is the pre-exception Program Counter (PC) */
POP { R0 } POP { R0 }
/* Move the pre-exception Current Program Status and Control Register (CPSR) /* Copy the pre-exception Current Program Status and Control Register (CPSR)
* which is banked as the Saved Program Status and Control Register (SPSR) * which is banked as the Saved Program Status and Control Register (SPSR)
* to R1 to save as part of the context. */ * to save it as part of the context. */
MRS R1, SPSR MRS R1, SPSR
/* Store the pre-exception CPSR and PC */ /* Store the pre-exception CPSR and PC */
STM LR!, { R0-R1 } STM LR!, { R0-R1 }
@ -373,14 +373,14 @@ svcSystemCallEnter:
/* Ensure ulTaskStackPointer is null, signifying initial entry */ /* Ensure ulTaskStackPointer is null, signifying initial entry */
TEQ R12, #0x0 TEQ R12, #0x0
/* Make sure that the function pointer loaded is not NULL */ /* Make sure that the function pointer loaded is not NULL */
TEQNE R14, #0x0 CMPEQ R14, #0x0
/* Hard code the ascii value of the function name and line number to call /* Hard code the ascii value of the function name and line number to call
* assert if the ulTaskStackPointer is not null. */ * assert if the ulTaskStackPointer is not null. */
MOVWNE R0, #0x706F MOVWEQ R0, #0x706F
MOVTNE R0, #0x7274 MOVTEQ R0, #0x7274
MOVNE R1, #458 MOVEQ R1, #458
BNE vAssertCalled BEQ vAssertCalled
/* Store the task's SP and LR to xSYSTEM_CALL_STACK_INFO */ /* Store the task's SP and LR to xSYSTEM_CALL_STACK_INFO */
STM R11, {R13-R14}^ STM R11, {R13-R14}^
@ -480,13 +480,13 @@ vPortEnableInterrupts:
prvMpuSetRegion: prvMpuSetRegion:
/* Only 15 possible regions, drop all other bits */ /* Only 15 possible regions, drop all other bits */
AND R0, R0, #15 AND R0, R0, #15
/* Select the MPU Region selected by region */ /* Select the MPU Region selected by ulRegionNumber */
MCR p15, #0, R0, c6, c2, #0 MCR p15, #0, R0, c6, c2, #0
/* Set the Base Address to be base */ /* Set the Base Address to be ulBaseAddress */
MCR p15, #0, R1, c6, c1, #0 MCR p15, #0, R1, c6, c1, #0
/* Set the Access Attributes to be access */ /* Set the Access Attributes to be ulRegionPermissions */
MCR p15, #0, R3, c6, c1, #4 MCR p15, #0, R3, c6, c1, #4
/* Set the Size and Enable bits to be size */ /* Set the Size and Enable bits to be ulRegionSize */
MCR p15, #0, R2, c6, c1, #2 MCR p15, #0, R2, c6, c1, #2
/* Return to caller */ /* Return to caller */
BX LR BX LR

View file

@ -37,16 +37,14 @@ extern "C" {
#ifndef configTOTAL_MPU_REGIONS #ifndef configTOTAL_MPU_REGIONS
#error "Set configTOTAL_MPU_REGIONS to the humber of MPU regions in FreeRTOSConfig.h" #error "Set configTOTAL_MPU_REGIONS to the humber of MPU regions in FreeRTOSConfig.h"
#endif /* configTOTAL_MPU_REGIONS */ #elif( configTOTAL_MPU_REGIONS == 8 )
#if( configTOTAL_MPU_REGIONS == 8 )
#define portMPU_TOTAL_REGIONS ( 8UL ) #define portMPU_TOTAL_REGIONS ( 8UL )
#elif( configTOTAL_MPU_REGIONS == 12 ) #elif( configTOTAL_MPU_REGIONS == 12 )
#define portMPU_TOTAL_REGIONS ( 12UL ) #define portMPU_TOTAL_REGIONS ( 12UL )
#elif( configTOTAL_MPU_REGIONS == 16 ) #elif( configTOTAL_MPU_REGIONS == 16 )
#define portMPU_TOTAL_REGIONS ( 16UL ) #define portMPU_TOTAL_REGIONS ( 16UL )
#else #else
#error Please specify the number of MPU regions available for your microcontroller #error "Set configTOTAL_MPU_REGIONS to the humber of MPU regions in FreeRTOSConfig.h"
#endif #endif
/** On the ArmV7-R Architecture the Operating mode of the Processor is set using /** On the ArmV7-R Architecture the Operating mode of the Processor is set using
@ -143,28 +141,6 @@ extern "C" {
#define portMPU_SUBREGION_6_DISABLE ( 0x1UL << 14UL ) #define portMPU_SUBREGION_6_DISABLE ( 0x1UL << 14UL )
#define portMPU_SUBREGION_7_DISABLE ( 0x1UL << 15UL ) #define portMPU_SUBREGION_7_DISABLE ( 0x1UL << 15UL )
#define MPU_REGION_COUNT_OFFSET 8U
#define MPU_REGION_COUNT_MASK ( 0xFFUL << MPU_REGION_COUNT_OFFSET )
#define portSTACK_GUARD \
portMPU_SUBREGION_0_DISABLE | portMPU_SUBREGION_1_DISABLE | \
portMPU_SUBREGION_2_DISABLE | portMPU_SUBREGION_3_DISABLE | \
portMPU_SUBREGION_4_DISABLE | portMPU_SUBREGION_5_DISABLE | \
portMPU_SUBREGION_6_DISABLE | portMPU_SUBREGION_7_DISABLE
#define portUND_STACK_GUARD portSTACK_GUARD & ~portMPU_SUBREGION_0_DISABLE
#define portSVC_STACK_GUARD portSTACK_GUARD & ~portMPU_SUBREGION_1_DISABLE
#define portFIQ_STACK_GUARD \
portSTACK_GUARD & ~portMPU_SUBREGION_2_DISABLE | ~portMPU_SUBREGION_3_DISABLE
#define portABT_STACK_GUARD \
portSTACK_GUARD & ~portMPU_SUBREGION_4_DISABLE | ~portMPU_SUBREGION_5_DISABLE
#define portIRQ_STACK_GUARD \
( ( portSTACK_GUARD ) & ( ~portMPU_SUBREGION_7_DISABLE ) & \
( ~portMPU_SUBREGION_7_DISABLE ) )
/* Default MPU regions */ /* Default MPU regions */
#define portFIRST_CONFIGURABLE_REGION ( 0 ) #define portFIRST_CONFIGURABLE_REGION ( 0 )
#define portLAST_CONFIGURABLE_REGION ( portMPU_TOTAL_REGIONS - 6UL ) #define portLAST_CONFIGURABLE_REGION ( portMPU_TOTAL_REGIONS - 6UL )