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Remove debug code from the TriCore port.c file.

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This commit is contained in:
Richard Barry 2011-11-22 13:27:17 +00:00
parent 3780e672a8
commit 63cab86cc7
1 changed files with 1 additions and 5 deletions
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6
Source/portable/GCC/TriCore_1782/port.c
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@ -315,8 +315,6 @@ unsigned long *pxUpperCSA = NULL;
unsigned long xUpperCSA = 0UL; unsigned long xUpperCSA = 0UL;
extern volatile unsigned long *pxCurrentTCB; extern volatile unsigned long *pxCurrentTCB;
COUNT_NEST();
/* Just to avoid compiler warnings about unused parameters. */ /* Just to avoid compiler warnings about unused parameters. */
( void ) iArg; ( void ) iArg;
@ -381,7 +379,6 @@ COUNT_NEST();
CPU_SRC0.bits.SETR = 0; CPU_SRC0.bits.SETR = 0;
_isync(); _isync();
} }
ulNest--;
#endif #endif
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -517,7 +514,7 @@ static void prvInterruptYield( int iId )
unsigned long *pxUpperCSA = NULL; unsigned long *pxUpperCSA = NULL;
unsigned long xUpperCSA = 0UL; unsigned long xUpperCSA = 0UL;
extern volatile unsigned long *pxCurrentTCB; extern volatile unsigned long *pxCurrentTCB;
COUNT_NEST();
/* Just to remove compiler warnings. */ /* Just to remove compiler warnings. */
( void ) iId; ( void ) iId;
@ -549,7 +546,6 @@ COUNT_NEST();
pxUpperCSA[ 0 ] = *pxCurrentTCB; pxUpperCSA[ 0 ] = *pxCurrentTCB;
CPU_SRC0.bits.SETR = 0; CPU_SRC0.bits.SETR = 0;
_isync(); _isync();
ulNest--;
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/