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Kernel changes:
Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0. New ports: Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices. Added Cortex-M4F port layer for CCS. New demo applications: Added demo application for STM32F7. Added demo application for SAMv71.
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557 changed files with 284426 additions and 16 deletions
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@ -130,7 +130,7 @@ static void prvHeapInit( void );
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/* The size of the structure placed at the beginning of each allocated memory
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block must by correctly byte aligned. */
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static const size_t xHeapStructSize = ( ( sizeof( BlockLink_t ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );
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static const size_t xHeapStructSize = ( ( sizeof( BlockLink_t ) + ( ( ( size_t ) portBYTE_ALIGNMENT_MASK ) - ( size_t ) 1 ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK ) );
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/* Create a couple of list links to mark the start and end of the list. */
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static BlockLink_t xStart, *pxEnd = NULL;
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@ -377,7 +377,7 @@ size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
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if( ( ulAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
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{
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ulAddress += ( portBYTE_ALIGNMENT - 1 );
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ulAddress &= ~portBYTE_ALIGNMENT_MASK;
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ulAddress &= ~( ( uint32_t ) portBYTE_ALIGNMENT_MASK );
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xTotalHeapSize -= ulAddress - ( uint32_t ) ucHeap;
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}
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@ -392,7 +392,7 @@ size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
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at the end of the heap space. */
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ulAddress = ( ( uint32_t ) pucAlignedHeap ) + xTotalHeapSize;
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ulAddress -= xHeapStructSize;
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ulAddress &= ~portBYTE_ALIGNMENT_MASK;
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ulAddress &= ~( ( uint32_t ) portBYTE_ALIGNMENT_MASK );
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pxEnd = ( void * ) ulAddress;
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pxEnd->xBlockSize = 0;
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pxEnd->pxNextFreeBlock = NULL;
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