From 6270e2aebfb24caead2dc928f31043cccd6b62fd Mon Sep 17 00:00:00 2001 From: Florian La Roche Date: Tue, 9 Apr 2024 07:21:12 +0200 Subject: [PATCH] Update the memory alignment within the Cortex-R5 port asm code (#1023) Update alignment in ARM_CR5 port. This is the same patch as 553caa18ced4906cf5060823ada7a10e73c7b535 provided by Richard Barry for issue #426 (ARM_CA9). Signed-off-by: Florian La Roche --- portable/GCC/ARM_CR5/portASM.S | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/portable/GCC/ARM_CR5/portASM.S b/portable/GCC/ARM_CR5/portASM.S index 1590ee4e8..3c39ef1b6 100644 --- a/portable/GCC/ARM_CR5/portASM.S +++ b/portable/GCC/ARM_CR5/portASM.S @@ -76,8 +76,8 @@ /* Save the floating point context, if any. */ FMRXNE R1, FPSCR - VPUSHNE {D0-D15} PUSHNE {R1} + VPUSHNE {D0-D15} /* Save ulPortTaskHasFPUContext itself. */ PUSH {R3} @@ -110,8 +110,8 @@ CMP R1, #0 /* Restore the floating point context, if any. */ - POPNE {R0} VPOPNE {D0-D15} + POPNE {R0} VMSRNE FPSCR, R0 #endif /* __ARM_FP */ @@ -147,8 +147,15 @@ FreeRTOS_SWI_Handler: /* Save the context of the current task and select a new task to run. */ portSAVE_CONTEXT + + /* Ensure bit 2 of the stack pointer is clear. */ + MOV r2, sp + AND r2, r2, #4 + SUB sp, sp, r2 + LDR R0, vTaskSwitchContextConst BLX R0 + portRESTORE_CONTEXT @@ -256,6 +263,11 @@ switch_before_exit: POP {LR} portSAVE_CONTEXT + /* Ensure bit 2 of the stack pointer is clear. */ + MOV r2, sp + AND r2, r2, #4 + SUB sp, sp, r2 + /* Call the function that selects the new task to execute. vTaskSwitchContext() if vTaskSwitchContext() uses LDRD or STRD instructions, or 8 byte aligned stack allocated data. LR does not need