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Follow review suggestion to update code changes
This commit is contained in:
parent
9478a6562e
commit
624e0e20a2
3 changed files with 13 additions and 8 deletions
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@ -602,10 +602,10 @@
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/* Set configENABLE_MVE to 1 to enable the M-Profile Vector Extension (MVE)
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/* Set configENABLE_MVE to 1 to enable the M-Profile Vector Extension (MVE)
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* support, or 0 to leave the MVE support disabled. This option is only
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* support, or 0 to leave the MVE support disabled. This option is only
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* applicable to Cortex-M55 and Cortex-M85 ports as M-Profile Vector Extension
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* applicable to Cortex-M52, Cortex-M55 and Cortex-M85 ports as M-Profile
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* (MVE) is available only on these architectures. configENABLE_MVE must be left
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* Vector Extension (MVE) is available only on these architectures.
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* undefined, or defined to 0 for the Cortex-M23,Cortex-M33 and Cortex-M35P
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* configENABLE_MVE must be left undefined, or defined to 0 for the
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* ports. */
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* Cortex-M23,Cortex-M33 and Cortex-M35P ports. */
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#define configENABLE_MVE 1
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#define configENABLE_MVE 1
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/******************************************************************************/
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/******************************************************************************/
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@ -186,15 +186,18 @@ add_library(freertos_kernel_port OBJECT
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GCC/ARM_CM52/non_secure/port.c
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GCC/ARM_CM52/non_secure/port.c
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GCC/ARM_CM52/non_secure/portasm.c
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GCC/ARM_CM52/non_secure/portasm.c
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GCC/ARM_CM52/non_secure/mpu_wrappers_v2_asm.c>
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GCC/ARM_CM52/non_secure/mpu_wrappers_v2_asm.c>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_SECURE>:
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_SECURE>:
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GCC/ARM_CM52/secure/secure_context_port.c
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GCC/ARM_CM52/secure/secure_context_port.c
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GCC/ARM_CM52/secure/secure_context.c
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GCC/ARM_CM52/secure/secure_context.c
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GCC/ARM_CM52/secure/secure_heap.c
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GCC/ARM_CM52/secure/secure_heap.c
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GCC/ARM_CM52/secure/secure_init.c>
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GCC/ARM_CM52/secure/secure_init.c>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_NTZ_NONSECURE>:
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_NTZ_NONSECURE>:
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GCC/ARM_CM52_NTZ/non_secure/port.c
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GCC/ARM_CM52_NTZ/non_secure/port.c
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GCC/ARM_CM52_NTZ/non_secure/portasm.c
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GCC/ARM_CM52_NTZ/non_secure/portasm.c
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GCC/ARM_CM52_NTZ/non_secure/mpu_wrappers_v2_asm.c>
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GCC/ARM_CM52_NTZ/non_secure/mpu_wrappers_v2_asm.c>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_TFM>:
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_TFM>:
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GCC/ARM_CM52_NTZ/non_secure/port.c
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GCC/ARM_CM52_NTZ/non_secure/port.c
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GCC/ARM_CM52_NTZ/non_secure/portasm.c
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GCC/ARM_CM52_NTZ/non_secure/portasm.c
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@ -1004,6 +1007,7 @@ target_include_directories(freertos_kernel_port_headers INTERFACE
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_SECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM52/secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_SECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM52/secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM52_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM52_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_TFM>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM52_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM52_TFM>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM52_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM85_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM85_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM85_SECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85/secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM85_SECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85/secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM85_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},GCC_ARM_CM85_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/GCC/ARM_CM85_NTZ/non_secure>
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@ -1143,6 +1147,7 @@ target_include_directories(freertos_kernel_port_headers INTERFACE
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM52_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM52/secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM52_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM52/secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM52_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM52_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM52_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM52_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM52_TFM>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM52_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM52_TFM>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM52_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM85_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM85_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM85_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85/secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM85_SECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85/secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM85_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85_NTZ/non_secure>
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$<$<STREQUAL:${FREERTOS_PORT},IAR_ARM_CM85_NTZ_NONSECURE>:${CMAKE_CURRENT_LIST_DIR}/IAR/ARM_CM85_NTZ/non_secure>
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8
portable/ThirdParty/GCC/ARM_TFM/README.md
vendored
8
portable/ThirdParty/GCC/ARM_TFM/README.md
vendored
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@ -2,8 +2,8 @@
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This port adds the support that FreeRTOS applications can call the secure
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This port adds the support that FreeRTOS applications can call the secure
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services in Trusted Firmware M(TF-M) through Platform Security Architecture
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services in Trusted Firmware M(TF-M) through Platform Security Architecture
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(PSA) API based on the ARM Cortex-M23, Cortex-M33, Cortex-M55 and Cortex-M85
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(PSA) API based on the ARM Cortex-M23, Cortex-M33, Cortex-M52, Cortex-M55
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platform.
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and Cortex-M85 platform.
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The Platform Security Architecture (PSA) makes it quicker, easier and cheaper
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The Platform Security Architecture (PSA) makes it quicker, easier and cheaper
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to design security into a device from the ground up. PSA is made up of four key
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to design security into a device from the ground up. PSA is made up of four key
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@ -38,7 +38,7 @@ _**Note:** `TFM_NS_MANAGE_NSID` must be configured as "OFF" when building TF-M_.
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## Build the Non-Secure Side
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## Build the Non-Secure Side
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Please copy all the files in `freertos_kernel/portable/GCC/ARM_CM[23|33|55|85]_NTZ` into the `freertos_kernel/portable/ThirdParty/GCC/ARM_TFM` folder before using this port. Note that TrustZone is enabled in this port. The TF-M runs in the Secure Side.
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Please copy all the files in `freertos_kernel/portable/GCC/ARM_CM[23|33|52|55|85]_NTZ` into the `freertos_kernel/portable/ThirdParty/GCC/ARM_TFM` folder before using this port. Note that TrustZone is enabled in this port. The TF-M runs in the Secure Side.
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Please call the API `tfm_ns_interface_init()` which is defined in `/interface/src/os_wrapper/tfm_ns_interface_rtos.c` by trusted-firmware-m (tag: TF-Mv2.0.0) at the very beginning of your application. Otherwise, it will always fail when calling a TF-M service in the Nonsecure Side.
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Please call the API `tfm_ns_interface_init()` which is defined in `/interface/src/os_wrapper/tfm_ns_interface_rtos.c` by trusted-firmware-m (tag: TF-Mv2.0.0) at the very beginning of your application. Otherwise, it will always fail when calling a TF-M service in the Nonsecure Side.
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@ -57,7 +57,7 @@ Please refer to [TF-M documentation](https://trustedfirmware-m.readthedocs.io/en
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* `configENABLE_MVE`
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* `configENABLE_MVE`
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The setting of this macro is decided by the setting in Secure Side which is platform-specific.
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The setting of this macro is decided by the setting in Secure Side which is platform-specific.
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If the Secure Side enables Non-Secure access to MVE, then this macro can be configured as 0 or 1. Otherwise, this macro can only be configured as 0.
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If the Secure Side enables Non-Secure access to MVE, then this macro can be configured as 0 or 1. Otherwise, this macro can only be configured as 0.
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Please note that only Cortex-M55 and Cortex-M85 support MVE.
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Please note that only Cortex-M52, Cortex-M55 and Cortex-M85 support MVE.
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Please refer to [TF-M documentation](https://trustedfirmware-m.readthedocs.io/en/latest/integration_guide/tfm_fpu_support.html) for MVE usage on the Non-Secure side.
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Please refer to [TF-M documentation](https://trustedfirmware-m.readthedocs.io/en/latest/integration_guide/tfm_fpu_support.html) for MVE usage on the Non-Secure side.
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* `configENABLE_TRUSTZONE`
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* `configENABLE_TRUSTZONE`
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